/// the parent's frame or return address, and so on.
FRAMEADDR, RETURNADDR,
- /// FRAME_ALLOC_RECOVER - Represents the llvm.framerecover
- /// intrinsic. Materializes the offset from the frame pointer of another
- /// function to the result of llvm.frameallocate.
- FRAME_ALLOC_RECOVER,
+ /// LOCAL_RECOVER - Represents the llvm.localrecover intrinsic.
+ /// Materializes the offset from the local object pointer of another
+ /// function to a particular local object passed to llvm.localescape. The
+ /// operand is the MCSymbol label used to represent this offset, since
+ /// typically the offset is not known until after code generation of the
+ /// parent.
+ LOCAL_RECOVER,
/// READ_REGISTER, WRITE_REGISTER - This node represents llvm.register on
/// the DAG, which implements the named register global variables extension.
/// and returns an outchain.
EH_SJLJ_LONGJMP,
+ /// OUTCHAIN = EH_SJLJ_SETUP_DISPATCH(INCHAIN)
+ /// The target initializes the dispatch table here.
+ EH_SJLJ_SETUP_DISPATCH,
+
/// TargetConstant* - Like Constant*, but the DAG does not do any folding,
/// simplification, or lowering of the constant. They are used for constants
/// which are known to fit in the immediate fields of their users, or for
TargetExternalSymbol,
TargetBlockAddress,
+ MCSymbol,
+
/// TargetIndex - Like a constant pool entry, but with completely
/// target-dependent semantics. Holds target flags, a 32-bit index, and a
/// 64-bit index. Targets can use this however they like.
/// part.
MULHU, MULHS,
+ /// [US]{MIN/MAX} - Binary minimum or maximum or signed or unsigned
+ /// integers.
+ SMIN, SMAX, UMIN, UMAX,
+
/// Bitwise operators - logical and, logical or, logical xor.
AND, OR, XOR,
SHL, SRA, SRL, ROTL, ROTR,
/// Byte Swap and Counting operators.
- BSWAP, CTTZ, CTLZ, CTPOP,
+ BSWAP, CTTZ, CTLZ, CTPOP, BITREVERSE,
+
+ /// [SU]ABSDIFF - Signed/Unsigned absolute difference of two input integer
+ /// vector. These nodes are generated from llvm.*absdiff* intrinsics.
+ SABSDIFF, UABSDIFF,
/// Bit counting operators with an undefined result for zero inputs.
CTTZ_ZERO_UNDEF, CTLZ_ZERO_UNDEF,
/// then the result type must also be a vector type.
SETCC,
+ /// Like SetCC, ops #0 and #1 are the LHS and RHS operands to compare, but
+ /// op #2 is a *carry value*. This operator checks the result of
+ /// "LHS - RHS - Carry", and can be used to compare two wide integers:
+ /// (setcce lhshi rhshi (subc lhslo rhslo) cc). Only valid for integers.
+ SETCCE,
+
/// SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded
- /// integer shift operations, just like ADD/SUB_PARTS. The operation
- /// ordering is:
+ /// integer shift operations. The operation ordering is:
/// [Lo,Hi] = op [LoLHS,HiLHS], Amt
SHL_PARTS, SRA_PARTS, SRL_PARTS,
FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
FLOG, FLOG2, FLOG10, FEXP, FEXP2,
FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR,
+ /// FMINNUM/FMAXNUM - Perform floating-point minimum or maximum on two
+ /// values.
+ /// In the case where a single input is NaN, the non-NaN input is returned.
+ ///
+ /// The return value of (FMINNUM 0.0, -0.0) could be either 0.0 or -0.0.
FMINNUM, FMAXNUM,
+ /// FMINNAN/FMAXNAN - Behave identically to FMINNUM/FMAXNUM, except that
+ /// when a single input is NaN, NaN is returned.
+ FMINNAN, FMAXNAN,
/// FSINCOS - Compute both fsin and fcos as a single operation.
FSINCOS,
/// take a chain as input and return a chain.
EH_LABEL,
+ /// CATCHPAD - Represents a catchpad instruction.
+ CATCHPAD,
+
+ /// CATCHRET - Represents a return from a catch block funclet. Used for
+ /// MSVC compatible exception handling. Takes a chain operand and a
+ /// destination basic block operand.
+ CATCHRET,
+
+ /// CLEANUPRET - Represents a return from a cleanup block funclet. Used for
+ /// MSVC compatible exception handling. Takes only a chain operand.
+ CLEANUPRET,
+
/// STACKSAVE - STACKSAVE has one operand, an input chain. It produces a
/// value, the same type as the pointer type for the system, and an output
/// chain.
PCMARKER,
/// READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic.
- /// The only operand is a chain and a value and a chain are produced. The
- /// value is the contents of the architecture specific cycle counter like
- /// register (or other high accuracy low latency clock source)
+ /// It produces a chain and one i64 value. The only operand is a chain.
+ /// If i64 is not legal, the result will be expanded into smaller values.
+ /// Still, it returns an i64, so targets should set legality for i64.
+ /// The result is the content of the architecture-specific cycle
+ /// counter-like register (or other high accuracy low latency clock source).
READCYCLECOUNTER,
/// HANDLENODE node - Used as a handle for various purposes.
/// which do not reference a specific memory location should be less than
/// this value. Those that do must not be less than this value, and can
/// be used with SelectionDAG::getMemIntrinsicNode.
- static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END+200;
+ static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END+300;
//===--------------------------------------------------------------------===//
/// MemIndexedMode enum - This enum defines the load / store indexed