#include "llvm/BasicBlock.h"
#include "llvm/ADT/DenseMap.h"
+#include "llvm/ADT/SmallSet.h"
#include "llvm/CodeGen/SelectionDAGNodes.h"
namespace llvm {
+class AllocaInst;
class ConstantFP;
+class Instruction;
class MachineBasicBlock;
+class MachineConstantPool;
class MachineFunction;
+class MachineFrameInfo;
+class MachineModuleInfo;
class MachineRegisterInfo;
class TargetData;
class TargetInstrInfo;
class FastISel {
protected:
MachineBasicBlock *MBB;
+ DenseMap<const Value *, unsigned> LocalValueMap;
+ DenseMap<const Value *, unsigned> &ValueMap;
+ DenseMap<const BasicBlock *, MachineBasicBlock *> &MBBMap;
+ DenseMap<const AllocaInst *, int> &StaticAllocaMap;
+#ifndef NDEBUG
+ SmallSet<Instruction*, 8> &CatchInfoLost;
+#endif
MachineFunction &MF;
+ MachineModuleInfo *MMI;
MachineRegisterInfo &MRI;
+ MachineFrameInfo &MFI;
+ MachineConstantPool &MCP;
const TargetMachine &TM;
const TargetData &TD;
const TargetInstrInfo &TII;
const TargetLowering &TLI;
public:
- /// SelectInstructions - Do "fast" instruction selection over the
- /// LLVM IR instructions in the range [Begin, N) where N is either
- /// End or the first unsupported instruction. Return N.
- /// ValueMap is filled in with a mapping of LLVM IR Values to
- /// virtual register numbers. MBB is a block to which to append
- /// the generated MachineInstrs.
- BasicBlock::iterator
- SelectInstructions(BasicBlock::iterator Begin, BasicBlock::iterator End,
- DenseMap<const Value *, unsigned> &ValueMap,
- DenseMap<const BasicBlock *, MachineBasicBlock *> &MBBMap,
- MachineBasicBlock *MBB);
+ /// startNewBlock - Set the current block, to which generated
+ /// machine instructions will be appended, and clear the local
+ /// CSE map.
+ ///
+ void startNewBlock(MachineBasicBlock *mbb) {
+ setCurrentBlock(mbb);
+ LocalValueMap.clear();
+ }
+
+ /// setCurrentBlock - Set the current block, to which generated
+ /// machine instructions will be appended.
+ ///
+ void setCurrentBlock(MachineBasicBlock *mbb) {
+ MBB = mbb;
+ }
+
+ /// SelectInstruction - Do "fast" instruction selection for the given
+ /// LLVM IR instruction, and append generated machine instructions to
+ /// the current block. Return true if selection was successful.
+ ///
+ bool SelectInstruction(Instruction *I);
+
+ /// SelectInstruction - Do "fast" instruction selection for the given
+ /// LLVM IR operator (Instruction or ConstantExpr), and append
+ /// generated machine instructions to the current block. Return true
+ /// if selection was successful.
+ ///
+ bool SelectOperator(User *I, unsigned Opcode);
/// TargetSelectInstruction - This method is called by target-independent
/// code when the normal FastISel process fails to select an instruction.
/// fit into FastISel's framework. It returns true if it was successful.
///
virtual bool
- TargetSelectInstruction(Instruction *I,
- DenseMap<const Value *, unsigned> &ValueMap,
- DenseMap<const BasicBlock *, MachineBasicBlock *> &MBBMap,
- MachineBasicBlock *MBB) = 0;
+ TargetSelectInstruction(Instruction *I) = 0;
+
+ /// getRegForValue - Create a virtual register and arrange for it to
+ /// be assigned the value for the given LLVM value.
+ unsigned getRegForValue(Value *V);
+
+ /// lookUpRegForValue - Look up the value to see if its value is already
+ /// cached in a register. It may be defined by instructions across blocks or
+ /// defined locally.
+ unsigned lookUpRegForValue(Value *V);
+
+ /// getRegForGEPIndex - This is a wrapper around getRegForValue that also
+ /// takes care of truncating or sign-extending the given getelementptr
+ /// index value.
+ unsigned getRegForGEPIndex(Value *V);
virtual ~FastISel();
protected:
- explicit FastISel(MachineFunction &mf);
+ FastISel(MachineFunction &mf,
+ MachineModuleInfo *mmi,
+ DenseMap<const Value *, unsigned> &vm,
+ DenseMap<const BasicBlock *, MachineBasicBlock *> &bm,
+ DenseMap<const AllocaInst *, int> &am
+#ifndef NDEBUG
+ , SmallSet<Instruction*, 8> &cil
+#endif
+ );
/// FastEmit_r - This method is called by target-independent code
/// to request that an instruction with the given type and opcode
/// from a specified index of a superregister.
unsigned FastEmitInst_extractsubreg(unsigned Op0, uint32_t Idx);
- unsigned getRegForValue(Value *V,
- DenseMap<const Value*, unsigned> &ValueMap);
+ /// FastEmitBranch - Emit an unconditional branch to the given block,
+ /// unless it is the immediate (fall-through) successor, and update
+ /// the CFG.
+ void FastEmitBranch(MachineBasicBlock *MBB);
- void UpdateValueMap(Instruction* I, unsigned Reg,
- DenseMap<const Value*, unsigned> &ValueMap);
+ void UpdateValueMap(Value* I, unsigned Reg);
unsigned createResultReg(const TargetRegisterClass *RC);
+
+ /// TargetMaterializeConstant - Emit a constant in a register using
+ /// target-specific logic, such as constant pool loads.
+ virtual unsigned TargetMaterializeConstant(Constant* C) {
+ return 0;
+ }
+
+ /// TargetMaterializeAlloca - Emit an alloca address in a register using
+ /// target-specific logic.
+ virtual unsigned TargetMaterializeAlloca(AllocaInst* C) {
+ return 0;
+ }
private:
- bool SelectBinaryOp(Instruction *I, ISD::NodeType ISDOpcode,
- DenseMap<const Value*, unsigned> &ValueMap);
+ bool SelectBinaryOp(User *I, ISD::NodeType ISDOpcode);
+
+ bool SelectGetElementPtr(User *I);
- bool SelectGetElementPtr(Instruction *I,
- DenseMap<const Value*, unsigned> &ValueMap);
+ bool SelectCall(User *I);
- bool SelectBitCast(Instruction *I,
- DenseMap<const Value*, unsigned> &ValueMap);
+ bool SelectBitCast(User *I);
- bool SelectCast(Instruction *I, ISD::NodeType Opcode,
- DenseMap<const Value*, unsigned> &ValueMap);
+ bool SelectCast(User *I, ISD::NodeType Opcode);
};
}
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