======================
-LLVM 3.3 Release Notes
+LLVM 3.5 Release Notes
======================
.. contents::
:local:
.. warning::
- These are in-progress notes for the upcoming LLVM 3.3 release. You may
- prefer the `LLVM 3.2 Release Notes <http://llvm.org/releases/3.2/docs
+ These are in-progress notes for the upcoming LLVM 3.6 release. You may
+ prefer the `LLVM 3.5 Release Notes <http://llvm.org/releases/3.5.0/docs
/ReleaseNotes.html>`_.
============
This document contains the release notes for the LLVM Compiler Infrastructure,
-release 3.3. Here we describe the status of LLVM, including major improvements
+release 3.6. Here we describe the status of LLVM, including major improvements
from the previous release, improvements in various subprojects of LLVM, and
some of the current users of the code. All LLVM releases may be downloaded
from the `LLVM releases web site <http://llvm.org/releases/>`_.
functionality, or simply have a lot to talk about), see the `NOTE` below
for adding a new subsection.
-* The CellSPU port has been removed. It can still be found in older versions.
+* Support for AuroraUX has been removed.
-* The IR-level extended linker APIs (for example, to link bitcode files out of
- archives) have been removed. Any existing clients of these features should
- move to using a linker with integrated LTO support.
-
-* LLVM and Clang's documentation has been migrated to the `Sphinx
- <http://sphinx-doc.org/>`_ documentation generation system which uses
- easy-to-write reStructuredText. See `llvm/docs/README.txt` for more
- information.
-
-* TargetTransformInfo (TTI) is a new interface that can be used by IR-level
- passes to obtain target-specific information, such as the costs of
- instructions. Only "Lowering" passes such as LSR and the vectorizer are
- allowed to use the TTI infrastructure.
-
-* We've improved the X86 and ARM cost model.
+* Added support for a `native object file-based bitcode wrapper format
+ <BitCodeFormat.html#native-object-file>`_.
* ... next change ...
Makes programs 10x faster by doing Special New Thing.
-AArch64 target
---------------
+Prefix data rework
+------------------
+
+The semantics of the ``prefix`` attribute have been changed. Users
+that want the previous ``prefix`` semantics should instead use
+``prologue``. To motivate this change, let's examine the primary
+usecases that these attributes aim to serve,
+
+ 1. Code sanitization metadata (e.g. Clang's undefined behavior
+ sanitizer)
+
+ 2. Function hot-patching: Enable the user to insert ``nop`` operations
+ at the beginning of the function which can later be safely replaced
+ with a call to some instrumentation facility.
+
+ 3. Language runtime metadata: Allow a compiler to insert data for
+ use by the runtime during execution. GHC is one example of a
+ compiler that needs this functionality for its
+ tables-next-to-code functionality.
+
+Previously ``prefix`` served cases (1) and (2) quite well by allowing the user
+to introduce arbitrary data at the entrypoint but before the function
+body. Case (3), however, was poorly handled by this approach as it
+required that prefix data was valid executable code.
+
+In this release the concept of prefix data has been redefined to be
+data which occurs immediately before the function entrypoint (i.e. the
+symbol address). Since prefix data now occurs before the function
+entrypoint, there is no need for the data to be valid code.
+
+The previous notion of prefix data now goes under the name "prologue
+data" to emphasize its duality with the function epilogue.
+
+The intention here is to handle cases (1) and (2) with prologue data and
+case (3) with prefix data. See the language reference for further details
+on the semantics of these attributes.
+
+This refactoring arose out of discussions_ with Reid Kleckner in
+response to a proposal to introduce the notion of symbol offsets to
+enable handling of case (3).
+
+.. _discussions: http://lists.cs.uiuc.edu/pipermail/llvmdev/2014-May/073235.html
+
+
+Changes to the ARM Backend
+--------------------------
-We've added support for AArch64, ARM's 64-bit architecture. Development is still
-in fairly early stages, but we expect successful compilation when:
+ During this release ...
-- compiling standard compliant C99 and C++03 with Clang;
-- using Linux as a target platform;
-- where code + static data doesn't exceed 4GB in size (heap allocated data has
- no limitation).
-Some additional functionality is also implemented, notably DWARF debugging,
-GNU-style thread local storage and inline assembly.
+Changes to the MIPS Target
+--------------------------
-Loop Vectorizer
----------------
+During this release ...
-We've continued the work on the loop vectorizer. The loop vectorizer now
-has the following features:
+Changes to the PowerPC Target
+-----------------------------
-- Loops with unknown trip count.
-- Runtime checks of pointers
-- Reductions, Inductions
-- If Conversion
-- Pointer induction variables
-- Reverse iterators
-- Vectorization of mixed types
-- Vectorization of function calls
-- Partial unrolling during vectorization
+During this release ...
-R600 Backend
-------------
+External Open Source Projects Using LLVM 3.6
+============================================
-The R600 backend was added in this release, it supports AMD GPUs
-(HD2XXX - HD7XXX). This backend is used in AMD's Open Source
-graphics / compute drivers which are developed as part of the `Mesa3D
-<http://www.mesa3d.org>`_ project.
+An exciting aspect of LLVM is that it is used as an enabling technology for
+a lot of other language and tools projects. This section lists some of the
+projects that have already been updated to work with LLVM 3.6.
+* A project
Additional Information
projects / oota-llvm.git / blobdiff