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<title>LLVM's Analysis and Transform Passes</title>
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+ <link rel="stylesheet" href="_static/llvm.css" type="text/css">
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<tr><td><a href="#module-debuginfo">-module-debuginfo</a></td><td>Decodes module-level debug info</td></tr>
<tr><td><a href="#no-aa">-no-aa</a></td><td>No Alias Analysis (always returns 'may' alias)</td></tr>
<tr><td><a href="#no-profile">-no-profile</a></td><td>No Profile Information</td></tr>
-<tr><td><a href="#postdomfrontier">-postdomfrontier</a></td><td>Post-Dominance Frontier Construction</td></tr>
<tr><td><a href="#postdomtree">-postdomtree</a></td><td>Post-Dominator Tree Construction</td></tr>
<tr><td><a href="#print-alias-sets">-print-alias-sets</a></td><td>Alias Set Printer</td></tr>
<tr><td><a href="#print-callgraph">-print-callgraph</a></td><td>Print a call graph</td></tr>
<tr><td><a href="#adce">-adce</a></td><td>Aggressive Dead Code Elimination</td></tr>
<tr><td><a href="#always-inline">-always-inline</a></td><td>Inliner for always_inline functions</td></tr>
<tr><td><a href="#argpromotion">-argpromotion</a></td><td>Promote 'by reference' arguments to scalars</td></tr>
+<tr><td><a href="#bb-vectorize">-bb-vectorize</a></td><td>Combine instructions to form vector instructions within basic blocks</td></tr>
<tr><td><a href="#block-placement">-block-placement</a></td><td>Profile Guided Basic Block Placement</td></tr>
<tr><td><a href="#break-crit-edges">-break-crit-edges</a></td><td>Break critical edges in CFG</td></tr>
<tr><td><a href="#codegenprepare">-codegenprepare</a></td><td>Optimize for code generation</td></tr>
<a name="basicaa">-basicaa: Basic Alias Analysis (stateless AA impl)</a>
</h3>
<div>
- <p>
- This is the default implementation of the Alias Analysis interface
- that simply implements a few identities (two different globals cannot alias,
- etc), but otherwise does no analysis.
- </p>
+ <p>A basic alias analysis pass that implements identities (two different
+ globals cannot alias, etc), but does no stateful analysis.</p>
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</h3>
<div>
<p>
- Always returns "I don't know" for alias queries. NoAA is unlike other alias
- analysis implementations, in that it does not chain to a previous analysis. As
- such it doesn't follow many of the rules that other alias analyses must.
+ This is the default implementation of the Alias Analysis interface. It always
+ returns "I don't know" for alias queries. NoAA is unlike other alias analysis
+ implementations, in that it does not chain to a previous analysis. As such it
+ doesn't follow many of the rules that other alias analyses must.
</p>
</div>
</h3>
<div>
<p>Provides other passes access to information on how the size and alignment
- required by the the target ABI for various data types.</p>
+ required by the target ABI for various data types.</p>
</div>
</div>
</p>
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+<h3>
+ <a name="bb-vectorize">-bb-vectorize: Basic-Block Vectorization</a>
+</h3>
+<div>
+ <p>This pass combines instructions inside basic blocks to form vector
+ instructions. It iterates over each basic block, attempting to pair
+ compatible instructions, repeating this process until no additional
+ pairs are selected for vectorization. When the outputs of some pair
+ of compatible instructions are used as inputs by some other pair of
+ compatible instructions, those pairs are part of a potential
+ vectorization chain. Instruction pairs are only fused into vector
+ instructions when they are part of a chain longer than some
+ threshold length. Moreover, the pass attempts to find the best
+ possible chain for each pair of compatible instructions. These
+ heuristics are intended to prevent vectorization in cases where
+ it would not yield a performance increase of the resulting code.
+ </p>
+</div>
+
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<h3>
<a name="block-placement">-block-placement: Profile Guided Basic Block Placement</a>
</h3>
<div>
<p>
- This file demotes all registers to memory references. It is intented to be
+ This file demotes all registers to memory references. It is intended to be
the inverse of <a href="#mem2reg"><tt>-mem2reg</tt></a>. By converting to
<tt>load</tt> instructions, the only values live across basic blocks are
<tt>alloca</tt> instructions and <tt>load</tt> instructions before
<li>Verify that a function's argument list agrees with its declared
type.</li>
<li>It is illegal to specify a name for a void value.</li>
- <li>It is illegal to have a internal global value with no initializer.</li>
+ <li>It is illegal to have an internal global value with no initializer.</li>
<li>It is illegal to have a ret instruction that returns a value that does
not agree with the function return value type.</li>
<li>Function call argument types match the function prototype.</li>
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