Update the target feature matrix to reflect some new features in the MBlaze backend.

[oota-llvm.git] / docs / CodeGenerator.html

diff --git a/docs/CodeGenerator.html b/docs/CodeGenerator.html
index d4e932a969fe9deb84ca7a6e375207a39a9164d9..0bd78aea1f4c63e5440d8b0986e57a31251e96ef 100644 (file)
--- a/docs/CodeGenerator.html
+++ b/docs/CodeGenerator.html
@@ -1030,9 +1030,9 @@ printer, and the type generated by the assembly parser and disassembler.
       SelectionDAG optimizer is run to clean up redundancies exposed by type
       legalization.</li>
 
-  <li><a href="#selectiondag_legalize">Legalize SelectionDAG Types</a> &mdash;
-      This stage transforms SelectionDAG nodes to eliminate any types that are
-      unsupported on the target.</li>
+  <li><a href="#selectiondag_legalize">Legalize SelectionDAG Ops</a> &mdash;
+      This stage transforms SelectionDAG nodes to eliminate any operations 
+      that are unsupported on the target.</li>
 
   <li><a href="#selectiondag_optimize">Optimize SelectionDAG</a> &mdash; The
       SelectionDAG optimizer is run to eliminate inefficiencies introduced by
@@ -1998,7 +1998,23 @@ def : InstAlias&lt;"clrq $reg", (XOR64rr GR64:$reg, GR64:$reg)&gt;;
 <p>This example also shows that tied operands are only listed once.  In the X86
 backend, XOR8rr has two input GR8's and one output GR8 (where an input is tied
 to the output).  InstAliases take a flattened operand list without duplicates
-for tied operands.</p>
+for tied operands.  The result of an instruction alias can also use immediates
+and fixed physical registers which are added as simple immediate operands in the
+result, for example:</p>
+
+<div class="doc_code">
+<pre>
+// Fixed Immediate operand.
+def : InstAlias&lt;"aad", (AAD8i8 10)&gt;;
+
+// Fixed register operand.
+def : InstAlias&lt;"fcomi", (COM_FIr ST1)&gt;;
+
+// Simple alias.
+def : InstAlias&lt;"fcomi $reg", (COM_FIr RST:$reg)&gt;;
+</pre>
+</div>
+
 
 <p>Instruction aliases can also have a Requires clause to make them
 subtarget specific.</p>
@@ -2091,7 +2107,7 @@ is the key:</p>
   <td class="no"></td> <!-- CellSPU -->
   <td class="no"></td> <!-- MBlaze -->
   <td class="unknown"></td> <!-- MSP430 -->
-  <td class="unknown"></td> <!-- Mips -->
+  <td class="no"></td> <!-- Mips -->
   <td class="no"></td> <!-- PTX -->
   <td class="yes"></td> <!-- PowerPC -->
   <td class="yes"></td> <!-- Sparc -->
@@ -2106,7 +2122,7 @@ is the key:</p>
   <td class="no"></td> <!-- Alpha -->
   <td class="no"></td> <!-- Blackfin -->
   <td class="no"></td> <!-- CellSPU -->
-  <td class="no"></td> <!-- MBlaze -->
+  <td class="yes"></td> <!-- MBlaze -->
   <td class="no"></td> <!-- MSP430 -->
   <td class="no"></td> <!-- Mips -->
   <td class="no"></td> <!-- PTX -->
@@ -2123,7 +2139,7 @@ is the key:</p>
   <td class="no"></td> <!-- Alpha -->
   <td class="no"></td> <!-- Blackfin -->
   <td class="no"></td> <!-- CellSPU -->
-  <td class="no"></td> <!-- MBlaze -->
+  <td class="yes"></td> <!-- MBlaze -->
   <td class="no"></td> <!-- MSP430 -->
   <td class="no"></td> <!-- Mips -->
   <td class="no"></td> <!-- PTX -->
@@ -2140,9 +2156,9 @@ is the key:</p>
   <td class="unknown"></td> <!-- Alpha -->
   <td class="yes"></td> <!-- Blackfin -->
   <td class="no"></td> <!-- CellSPU -->
-  <td class="no"></td> <!-- MBlaze -->
+  <td class="yes"></td> <!-- MBlaze -->
   <td class="unknown"></td> <!-- MSP430 -->
-  <td class="unknown"></td> <!-- Mips -->
+  <td class="no"></td> <!-- Mips -->
   <td class="unknown"></td> <!-- PTX -->
   <td class="yes"></td> <!-- PowerPC -->
   <td class="unknown"></td> <!-- Sparc -->
@@ -2154,12 +2170,12 @@ is the key:</p>
 <tr>
   <td><a href="#feat_jit">jit</a></td>
   <td class="partial"><a href="#feat_jit_arm">*</a></td> <!-- ARM -->
-  <td class="unknown"></td> <!-- Alpha -->
+  <td class="no"></td> <!-- Alpha -->
   <td class="no"></td> <!-- Blackfin -->
   <td class="no"></td> <!-- CellSPU -->
   <td class="no"></td> <!-- MBlaze -->
   <td class="unknown"></td> <!-- MSP430 -->
-  <td class="unknown"></td> <!-- Mips -->
+  <td class="no"></td> <!-- Mips -->
   <td class="unknown"></td> <!-- PTX -->
   <td class="yes"></td> <!-- PowerPC -->
   <td class="unknown"></td> <!-- Sparc -->
@@ -2174,7 +2190,7 @@ is the key:</p>
   <td class="no"></td> <!-- Alpha -->
   <td class="no"></td> <!-- Blackfin -->
   <td class="no"></td> <!-- CellSPU -->
-  <td class="no"></td> <!-- MBlaze -->
+  <td class="yes"></td> <!-- MBlaze -->
   <td class="no"></td> <!-- MSP430 -->
   <td class="no"></td> <!-- Mips -->
   <td class="no"></td> <!-- PTX -->
@@ -2193,7 +2209,7 @@ is the key:</p>
   <td class="no"></td> <!-- CellSPU -->
   <td class="no"></td> <!-- MBlaze -->
   <td class="unknown"></td> <!-- MSP430 -->
-  <td class="unknown"></td> <!-- Mips -->
+  <td class="no"></td> <!-- Mips -->
   <td class="unknown"></td> <!-- PTX -->
   <td class="yes"></td> <!-- PowerPC -->
   <td class="unknown"></td> <!-- Sparc -->