add another case from the ppc backend. This is obviously a huge and

[oota-llvm.git] / configure

diff --git a/configure b/configure
index 877231a99adbad00c9690e6cdff52c54d88f6762..62b8fc9b396ac4e17205ee6dcd4f4a20949cdf75 100755 (executable)
--- a/configure
+++ b/configure
@@ -813,6 +813,7 @@ projects/llvm-java
 projects/llvm-tv
 projects/llvm-poolalloc
 projects/poolalloc
+projects/safecode
 projects/llvm-kernel'
 
 # Initialize some variables set by options.
@@ -1404,7 +1405,8 @@ Optional Features:
   --enable-threads        Use threads if available (default is YES)
   --enable-pic            Build LLVM with Position Independent Code (default
                           is YES)
-  --enable-shared         Link LLVM tools shared (default is NO)
+  --enable-shared         Build a shared library and link tools against it
+                          (default is NO)
   --enable-targets        Build specific host targets: all or
                           target1,target2,... Valid targets are: host, x86,
                           x86_64, sparc, powerpc, alpha, arm, mips, spu,
@@ -1977,6 +1979,8 @@ do
       llvm-poolalloc) subdirs="$subdirs projects/llvm-poolalloc"
  ;;
       poolalloc)    subdirs="$subdirs projects/poolalloc"
+ ;;
+      safecode)     subdirs="$subdirs projects/safecode"
  ;;
       llvm-kernel)  subdirs="$subdirs projects/llvm-kernel"
  ;;
@@ -2330,6 +2334,7 @@ else
   msp430-*)               llvm_cv_target_arch="MSP430" ;;
   s390x-*)                llvm_cv_target_arch="SystemZ" ;;
   bfin-*)                 llvm_cv_target_arch="Blackfin" ;;
+  mblaze-*)               llvm_cv_target_arch="MBlaze" ;;
   *)                      llvm_cv_target_arch="Unknown" ;;
 esac
 fi
@@ -4794,6 +4799,8 @@ else
     SystemZ)     TARGET_HAS_JIT=0
  ;;
     Blackfin)    TARGET_HAS_JIT=0
+ ;;
+    MBlaze)      TARGET_HAS_JIT=0
  ;;
     *)           TARGET_HAS_JIT=0
  ;;
@@ -4898,7 +4905,7 @@ if test "$enableval" = host-only ; then
   enableval=host
 fi
 case "$enableval" in
-  all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU PIC16 XCore MSP430 SystemZ Blackfin CBackend MSIL CppBackend" ;;
+  all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU PIC16 XCore MSP430 SystemZ Blackfin CBackend MSIL CppBackend MBlaze" ;;
   *)for a_target in `echo $enableval|sed -e 's/,/ /g' ` ; do
       case "$a_target" in
         x86)      TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
@@ -4917,6 +4924,7 @@ case "$enableval" in
         cbe)      TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;;
         msil)     TARGETS_TO_BUILD="MSIL $TARGETS_TO_BUILD" ;;
         cpp)      TARGETS_TO_BUILD="CppBackend $TARGETS_TO_BUILD" ;;
+        mblaze)   TARGETS_TO_BUILD="MBlaze $TARGETS_TO_BUILD" ;;
         host) case "$llvm_cv_target_arch" in
             x86)         TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
             x86_64)      TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
@@ -4925,6 +4933,7 @@ case "$enableval" in
             Alpha)       TARGETS_TO_BUILD="Alpha $TARGETS_TO_BUILD" ;;
             ARM)         TARGETS_TO_BUILD="ARM $TARGETS_TO_BUILD" ;;
             Mips)        TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;;
+            MBlaze)      TARGETS_TO_BUILD="MBlaze $TARGETS_TO_BUILD" ;;
             CellSPU|SPU) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;;
             PIC16)       TARGETS_TO_BUILD="PIC16 $TARGETS_TO_BUILD" ;;
             XCore)       TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;;
@@ -11127,7 +11136,7 @@ else
   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
   lt_status=$lt_dlunknown
   cat > conftest.$ac_ext <<EOF
-#line 11130 "configure"
+#line 11139 "configure"
 #include "confdefs.h"
 
 #if HAVE_DLFCN_H