The DAGCombiner was threading select over pairs of extending loads even

[oota-llvm.git] / CREDITS.TXT

diff --git a/CREDITS.TXT b/CREDITS.TXT
index 15d85ef7f4d7c2144dfc723e757cf66e5cec08f5..8cf3e8494c7d9e3da7f68cc491f9f5e2bb6ae0ef 100644 (file)
--- a/CREDITS.TXT
+++ b/CREDITS.TXT
@@ -39,7 +39,7 @@ N: Misha Brukman
 E: brukman+llvm@uiuc.edu
 W: http://misha.brukman.net
 D: Portions of X86 and Sparc JIT compilers, PowerPC backend
-D: Incremental bytecode loader
+D: Incremental bitcode loader
 
 N: Cameron Buschardt
 E: buschard@uiuc.edu
@@ -134,6 +134,11 @@ N: Gabor Greif
 E: ggreif@gmail.com
 D: Improvements for space efficiency
 
+N: James Grosbach
+E: grosbach@apple.com
+D: SjLj exception handling support
+D: General fixes and improvements for the ARM back-end
+
 N: Lang Hames
 E: lhames@gmail.com
 D: PBQP-based register allocator
@@ -247,6 +252,12 @@ N: Scott Michel
 E: scottm@aero.org
 D: Added STI Cell SPU backend.
 
+N: Takumi Nakamura
+E: geek4civic@gmail.com
+E: chapuni@hf.rim.or.jp
+D: Cygwin and MinGW support.
+S: Yokohama, Japan
+
 N: Edward O'Callaghan
 E: eocallaghan@auroraux.org
 W: http://www.auroraux.org
@@ -293,7 +304,10 @@ D: MSIL backend
 
 N: Duncan Sands
 E: baldrick@free.fr
-D: Ada front-end, exception handling improvements
+D: Ada support in llvm-gcc
+D: Dragonegg plugin
+D: Exception handling improvements
+D: Type legalizer rewrite
 
 N: Ruchira Sasanka
 E: sasanka@uiuc.edu