E: evan.cheng@apple.com
D: ARM and X86 backends
D: Instruction scheduler improvements
+D: Register allocator improvements
D: Loop optimizer improvements
D: Target-independent code generator improvements
N: Anton Korobeynikov
E: asl@math.spbu.ru
-D: Mingw32 fixes, cross-compiling support, minor changes here and there
+D: Mingw32 fixes, cross-compiling support, stdcall/fastcall calling conv.
+D: x86/linux PIC codegen, aliases, regparm/visibility attributes
+D: Switch lowering refactoring
N: Sumant Kowshik
E: kowshik@uiuc.edu