E: rafael.espindola@gmail.com
D: The ARM backend
+N: Dave Estes
+E: cestes@codeaurora.org
+D: AArch64 machine description for Cortex-A53
+
N: Alkis Evlogimenos
E: alkis@evlogimenos.com
D: Linear scan register allocator, many codegen improvements, Java frontend
D: PPC backend fixes for Linux
N: Louis Gerbarg
+E: lgg@apple.com
D: Portions of the PowerPC backend
N: Saem Ghani
N: James Grosbach
E: grosbach@apple.com
+I: grosbach
D: SjLj exception handling support
D: General fixes and improvements for the ARM back-end
D: MCJIT
D: ARM integrated assembler and assembly parser
+D: Led effort for the backend formerly known as ARM64
N: Lang Hames
E: lhames@gmail.com
D: GCC PCH Integration (llvm-gcc), llvm-gcc improvements
D: Optimizer improvements, Loop Index Split
+N: Ana Pazos
+E: apazos@codeaurora.org
+D: Fixes and improvements to the AArch64 backend
+
N: Wesley Peck
E: peckw@wesleypeck.com
W: http://wesleypeck.com/
N: Chad Rosier
E: mcrosier@codeaurora.org
-D: ARM fast-isel improvements
-D: Performance monitoring
+I: mcrosier
+D: AArch64 fast instruction selection pass
+D: Fixes and improvements to the ARM fast-isel pass
+D: Fixes and improvements to the AArch64 backend
N: Nadav Rotem
E: nrotem@apple.com