-/// EmitComputeAvailableFeatures - Emit the function to compute the list of
-/// available features given a subtarget.
-static void EmitComputeAvailableFeatures(AsmWriterInfo &Info,
- Record *AsmWriter,
- CodeGenTarget &Target,
- raw_ostream &O) {
- std::string ClassName = AsmWriter->getValueAsString("AsmWriterClassName");
-
- O << "unsigned " << Target.getName() << ClassName << "::\n"
- << "ComputeAvailableFeatures(const " << Target.getName()
- << "Subtarget *Subtarget) const {\n";
- O << " unsigned Features = 0;\n";
-
- for (std::map<const Record*, SubtargetFeatureInfo*>::const_iterator
- I = Info.SubtargetFeatures.begin(),
- E = Info.SubtargetFeatures.end(); I != E; ++I) {
- SubtargetFeatureInfo &SFI = *I->second;
- O << " if (" << SFI.TheDef->getValueAsString("CondString")
- << ")\n";
- O << " Features |= " << SFI.getEnumName() << ";\n";
- }
-
- O << " return Features;\n";
- O << "}\n\n";
-}
-
-static void EmitGetMapOperandNumber(raw_ostream &O) {
- O << "static unsigned getMapOperandNumber("
- << "const SmallVectorImpl<std::pair<StringRef, unsigned> > &OpMap,\n";
- O << " StringRef Name) {\n";
- O << " for (SmallVectorImpl<std::pair<StringRef, unsigned> >::"
- << "const_iterator\n";
- O << " I = OpMap.begin(), E = OpMap.end(); I != E; ++I)\n";
- O << " if (I->first == Name)\n";
- O << " return I->second;\n";
- O << " assert(false && \"Operand not in map!\");\n";
- O << " return 0;\n";
- O << "}\n\n";
-}
-
-void AsmWriterEmitter::EmitRegIsInRegClass(raw_ostream &O) {
- CodeGenTarget Target(Records);
-
- // Enumerate the register classes.
- const std::vector<CodeGenRegisterClass> &RegisterClasses =
- Target.getRegisterClasses();
-
- O << "namespace { // Register classes\n";
- O << " enum RegClass {\n";
-
- // Emit the register enum value for each RegisterClass.
- for (unsigned I = 0, E = RegisterClasses.size(); I != E; ++I) {
- if (I != 0) O << ",\n";
- O << " RC_" << RegisterClasses[I].TheDef->getName();
- }
-
- O << "\n };\n";
- O << "} // end anonymous namespace\n\n";
-
- // Emit a function that returns 'true' if a regsiter is part of a particular
- // register class. I.e., RAX is part of GR64 on X86.
- O << "static bool regIsInRegisterClass"
- << "(unsigned RegClass, unsigned Reg) {\n";
-
- // Emit the switch that checks if a register belongs to a particular register
- // class.
- O << " switch (RegClass) {\n";
- O << " default: break;\n";
-
- for (unsigned I = 0, E = RegisterClasses.size(); I != E; ++I) {
- const CodeGenRegisterClass &RC = RegisterClasses[I];
-
- // Give the register class a legal C name if it's anonymous.
- std::string Name = RC.TheDef->getName();
- O << " case RC_" << Name << ":\n";
-
- // Emit the register list now.
- unsigned IE = RC.getOrder().size();
- if (IE == 1) {
- O << " if (Reg == " << getQualifiedName(RC.getOrder()[0]) << ")\n";
- O << " return true;\n";
- } else {
- O << " switch (Reg) {\n";
- O << " default: break;\n";
-
- for (unsigned II = 0; II != IE; ++II) {
- Record *Reg = RC.getOrder()[II];
- O << " case " << getQualifiedName(Reg) << ":\n";
- }
-
- O << " return true;\n";
- O << " }\n";