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[AsmPrinter] Make isRepeatedByteSequence smarter about odd integer types
[oota-llvm.git]
/
test
/
CodeGen
/
X86
/
shift-bmi2.ll
diff --git
a/test/CodeGen/X86/shift-bmi2.ll
b/test/CodeGen/X86/shift-bmi2.ll
index 01167893a89eb0aa7181c0f0707ba902e53dbe67..63b6ec55fac8eb921a3c1025e3e672a5df64320d 100644
(file)
--- a/
test/CodeGen/X86/shift-bmi2.ll
+++ b/
test/CodeGen/X86/shift-bmi2.ll
@@
-27,20
+27,21
@@
entry:
define i32 @shl32p(i32* %p, i32 %shamt) nounwind uwtable readnone {
entry:
define i32 @shl32p(i32* %p, i32 %shamt) nounwind uwtable readnone {
entry:
- %x = load i32* %p
+ %x = load i32
, i32
* %p
%shl = shl i32 %x, %shamt
; BMI2: shl32p
%shl = shl i32 %x, %shamt
; BMI2: shl32p
-; BMI2: shlxl %{{.+}}, ({{.+}}), %{{.+}}
+; Source order scheduling prevents folding, rdar:14208996.
+; BMI2: shlxl %{{.+}}, %{{.+}}, %{{.+}}
; BMI2: ret
; BMI264: shl32p
; BMI2: ret
; BMI264: shl32p
-; BMI264: shlxl %{{.+}},
({{.+}})
, %{{.+}}
+; BMI264: shlxl %{{.+}},
%{{.+}}
, %{{.+}}
; BMI264: ret
ret i32 %shl
}
define i32 @shl32pi(i32* %p) nounwind uwtable readnone {
entry:
; BMI264: ret
ret i32 %shl
}
define i32 @shl32pi(i32* %p) nounwind uwtable readnone {
entry:
- %x = load i32* %p
+ %x = load i32
, i32
* %p
%shl = shl i32 %x, 5
; BMI2: shl32pi
; BMI2-NOT: shlxl
%shl = shl i32 %x, 5
; BMI2: shl32pi
; BMI2-NOT: shlxl
@@
-71,17
+72,17
@@
entry:
define i64 @shl64p(i64* %p, i64 %shamt) nounwind uwtable readnone {
entry:
define i64 @shl64p(i64* %p, i64 %shamt) nounwind uwtable readnone {
entry:
- %x = load i64* %p
+ %x = load i64
, i64
* %p
%shl = shl i64 %x, %shamt
; BMI264: shl64p
%shl = shl i64 %x, %shamt
; BMI264: shl64p
-; BMI264: shlxq %{{.+}},
({{.+}})
, %{{.+}}
+; BMI264: shlxq %{{.+}},
%{{.+}}
, %{{.+}}
; BMI264: ret
ret i64 %shl
}
define i64 @shl64pi(i64* %p) nounwind uwtable readnone {
entry:
; BMI264: ret
ret i64 %shl
}
define i64 @shl64pi(i64* %p) nounwind uwtable readnone {
entry:
- %x = load i64* %p
+ %x = load i64
, i64
* %p
%shl = shl i64 %x, 7
; BMI264: shl64pi
; BMI264-NOT: shlxq
%shl = shl i64 %x, 7
; BMI264: shl64pi
; BMI264-NOT: shlxq
@@
-103,13
+104,14
@@
entry:
define i32 @lshr32p(i32* %p, i32 %shamt) nounwind uwtable readnone {
entry:
define i32 @lshr32p(i32* %p, i32 %shamt) nounwind uwtable readnone {
entry:
- %x = load i32* %p
+ %x = load i32
, i32
* %p
%shl = lshr i32 %x, %shamt
; BMI2: lshr32p
%shl = lshr i32 %x, %shamt
; BMI2: lshr32p
-; BMI2: shrxl %{{.+}}, ({{.+}}), %{{.+}}
+; Source order scheduling prevents folding, rdar:14208996.
+; BMI2: shrxl %{{.+}}, %{{.+}}, %{{.+}}
; BMI2: ret
; BMI264: lshr32p
; BMI2: ret
; BMI264: lshr32p
-; BMI264: shrxl %{{.+}},
({{.+}})
, %{{.+}}
+; BMI264: shrxl %{{.+}},
%{{.+}}
, %{{.+}}
; BMI264: ret
ret i32 %shl
}
; BMI264: ret
ret i32 %shl
}
@@
-125,10
+127,10
@@
entry:
define i64 @lshr64p(i64* %p, i64 %shamt) nounwind uwtable readnone {
entry:
define i64 @lshr64p(i64* %p, i64 %shamt) nounwind uwtable readnone {
entry:
- %x = load i64* %p
+ %x = load i64
, i64
* %p
%shl = lshr i64 %x, %shamt
; BMI264: lshr64p
%shl = lshr i64 %x, %shamt
; BMI264: lshr64p
-; BMI264: shrxq %{{.+}},
({{.+}})
, %{{.+}}
+; BMI264: shrxq %{{.+}},
%{{.+}}
, %{{.+}}
; BMI264: ret
ret i64 %shl
}
; BMI264: ret
ret i64 %shl
}
@@
-147,13
+149,14
@@
entry:
define i32 @ashr32p(i32* %p, i32 %shamt) nounwind uwtable readnone {
entry:
define i32 @ashr32p(i32* %p, i32 %shamt) nounwind uwtable readnone {
entry:
- %x = load i32* %p
+ %x = load i32
, i32
* %p
%shl = ashr i32 %x, %shamt
; BMI2: ashr32p
%shl = ashr i32 %x, %shamt
; BMI2: ashr32p
-; BMI2: sarxl %{{.+}}, ({{.+}}), %{{.+}}
+; Source order scheduling prevents folding, rdar:14208996.
+; BMI2: sarxl %{{.+}}, %{{.+}}, %{{.+}}
; BMI2: ret
; BMI264: ashr32p
; BMI2: ret
; BMI264: ashr32p
-; BMI264: sarxl %{{.+}},
({{.+}})
, %{{.+}}
+; BMI264: sarxl %{{.+}},
%{{.+}}
, %{{.+}}
; BMI264: ret
ret i32 %shl
}
; BMI264: ret
ret i32 %shl
}
@@
-169,10
+172,10
@@
entry:
define i64 @ashr64p(i64* %p, i64 %shamt) nounwind uwtable readnone {
entry:
define i64 @ashr64p(i64* %p, i64 %shamt) nounwind uwtable readnone {
entry:
- %x = load i64* %p
+ %x = load i64
, i64
* %p
%shl = ashr i64 %x, %shamt
; BMI264: ashr64p
%shl = ashr i64 %x, %shamt
; BMI264: ashr64p
-; BMI264: sarxq %{{.+}},
({{.+}})
, %{{.+}}
+; BMI264: sarxq %{{.+}},
%{{.+}}
, %{{.+}}
; BMI264: ret
ret i64 %shl
}
; BMI264: ret
ret i64 %shl
}