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Stop producing .data.rel sections.
[oota-llvm.git]
/
test
/
CodeGen
/
X86
/
fast-isel-x86-64.ll
diff --git
a/test/CodeGen/X86/fast-isel-x86-64.ll
b/test/CodeGen/X86/fast-isel-x86-64.ll
index 33abc385ebd8ef187d015fbc4f5cf788d27ce17d..d748cba2f8f80e9aa4027b3587e72067b38ad3ad 100644
(file)
--- a/
test/CodeGen/X86/fast-isel-x86-64.ll
+++ b/
test/CodeGen/X86/fast-isel-x86-64.ll
@@
-1,5
+1,5
@@
-; RUN: llc < %s -mattr=-avx -fast-isel -mcpu=core2 -O0 -regalloc=fast -asm-verbose=0 -fast-isel-abort | FileCheck %s
-; RUN: llc < %s -mattr=+avx -fast-isel -mcpu=core2 -O0 -regalloc=fast -asm-verbose=0 -fast-isel-abort | FileCheck %s --check-prefix=AVX
+; RUN: llc < %s -mattr=-avx -fast-isel -mcpu=core2 -O0 -regalloc=fast -asm-verbose=0 -fast-isel-abort
=1
| FileCheck %s
+; RUN: llc < %s -mattr=+avx -fast-isel -mcpu=core2 -O0 -regalloc=fast -asm-verbose=0 -fast-isel-abort
=1
| FileCheck %s --check-prefix=AVX
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin10.0.0"
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin10.0.0"
@@
-20,7
+20,7
@@
define void @test2(i64 %x) nounwind ssp {
entry:
%x.addr = alloca i64, align 8
store i64 %x, i64* %x.addr, align 8
entry:
%x.addr = alloca i64, align 8
store i64 %x, i64* %x.addr, align 8
- %tmp = load i64* %x.addr, align 8
+ %tmp = load i64
, i64
* %x.addr, align 8
%cmp = icmp sgt i64 %tmp, 42
br i1 %cmp, label %if.then, label %if.end
%cmp = icmp sgt i64 %tmp, 42
br i1 %cmp, label %if.then, label %if.end
@@
-52,8
+52,8
@@
define i64 @test3() nounwind {
@rtx_length = external global [153 x i8]
define i32 @test4(i64 %idxprom9) nounwind {
@rtx_length = external global [153 x i8]
define i32 @test4(i64 %idxprom9) nounwind {
- %arrayidx10 = getelementptr inbounds [153 x i8]* @rtx_length, i32 0, i64 %idxprom9
- %tmp11 = load i8* %arrayidx10, align 1
+ %arrayidx10 = getelementptr inbounds [153 x i8]
, [153 x i8]
* @rtx_length, i32 0, i64 %idxprom9
+ %tmp11 = load i8
, i8
* %arrayidx10, align 1
%conv = zext i8 %tmp11 to i32
ret i32 %conv
%conv = zext i8 %tmp11 to i32
ret i32 %conv
@@
-190,7
+190,7
@@
define void @test16() nounwind {
; CHECK: movl $1, %edi
; CHECK: movb $0, %al
; CHECK: callq _test16callee
; CHECK: movl $1, %edi
; CHECK: movb $0, %al
; CHECK: callq _test16callee
- call void (...)
*
@test16callee(i32 1)
+ call void (...) @test16callee(i32 1)
br label %block2
block2:
br label %block2
block2:
@@
-201,7
+201,7
@@
block2:
; AVX: vmovsd LCP{{.*}}_{{.*}}(%rip), %xmm0
; AVX: movb $1, %al
; AVX: callq _test16callee
; AVX: vmovsd LCP{{.*}}_{{.*}}(%rip), %xmm0
; AVX: movb $1, %al
; AVX: callq _test16callee
- call void (...)
*
@test16callee(double 1.000000e+00)
+ call void (...) @test16callee(double 1.000000e+00)
ret void
}
ret void
}
@@
-212,7
+212,7
@@
declare void @foo() unnamed_addr ssp align 2
; w.r.t. the call.
define i32 @test17(i32 *%P) ssp nounwind {
entry:
; w.r.t. the call.
define i32 @test17(i32 *%P) ssp nounwind {
entry:
- %tmp = load i32* %P
+ %tmp = load i32
, i32
* %P
%cmp = icmp ne i32 %tmp, 5
call void @foo()
br i1 %cmp, label %if.then, label %if.else
%cmp = icmp ne i32 %tmp, 5
call void @foo()
br i1 %cmp, label %if.then, label %if.else
@@
-302,3
+302,13
@@
define void @test23(i8* noalias sret %result) {
}
declare i8* @foo23()
}
declare i8* @foo23()
+
+declare void @takesi32ptr(i32* %arg)
+
+; CHECK-LABEL: allocamaterialize
+define void @allocamaterialize() {
+ %a = alloca i32
+; CHECK: leaq {{.*}}, %rdi
+ call void @takesi32ptr(i32* %a)
+ ret void
+}