+
+; CHECK-LABEL: DAGCombineB:
+; CHECK: vpaddd %xmm
+; CHECK-NOT: vinsertf128 $1
+; CHECK: vpaddd %xmm
+define <8 x i32> @DAGCombineB(<8 x i32> %v1, <8 x i32> %v2) nounwind readonly {
+ %1 = add <8 x i32> %v1, %v2
+ %2 = add <8 x i32> %1, %v1
+ ret <8 x i32> %2
+}
+
+; CHECK-LABEL: insert_undef_pd:
+define <4 x double> @insert_undef_pd(<4 x double> %a0, <2 x double> %a1) {
+; CHECK: vmovaps %ymm1, %ymm0
+%res = call <4 x double> @llvm.x86.avx.vinsertf128.pd.256(<4 x double> undef, <2 x double> %a1, i8 0)
+ret <4 x double> %res
+}
+declare <4 x double> @llvm.x86.avx.vinsertf128.pd.256(<4 x double>, <2 x double>, i8) nounwind readnone
+
+
+; CHECK-LABEL: insert_undef_ps:
+define <8 x float> @insert_undef_ps(<8 x float> %a0, <4 x float> %a1) {
+; CHECK: vmovaps %ymm1, %ymm0
+%res = call <8 x float> @llvm.x86.avx.vinsertf128.ps.256(<8 x float> undef, <4 x float> %a1, i8 0)
+ret <8 x float> %res
+}
+declare <8 x float> @llvm.x86.avx.vinsertf128.ps.256(<8 x float>, <4 x float>, i8) nounwind readnone
+
+
+; CHECK-LABEL: insert_undef_si:
+define <8 x i32> @insert_undef_si(<8 x i32> %a0, <4 x i32> %a1) {
+; CHECK: vmovaps %ymm1, %ymm0
+%res = call <8 x i32> @llvm.x86.avx.vinsertf128.si.256(<8 x i32> undef, <4 x i32> %a1, i8 0)
+ret <8 x i32> %res
+}
+declare <8 x i32> @llvm.x86.avx.vinsertf128.si.256(<8 x i32>, <4 x i32>, i8) nounwind readnone
+
+; rdar://10643481
+; CHECK-LABEL: vinsertf128_combine:
+define <8 x float> @vinsertf128_combine(float* nocapture %f) nounwind uwtable readonly ssp {
+; CHECK-NOT: vmovaps
+; CHECK: vinsertf128
+entry:
+ %add.ptr = getelementptr inbounds float, float* %f, i64 4
+ %0 = bitcast float* %add.ptr to <4 x float>*
+ %1 = load <4 x float>, <4 x float>* %0, align 16
+ %2 = tail call <8 x float> @llvm.x86.avx.vinsertf128.ps.256(<8 x float> undef, <4 x float> %1, i8 1)
+ ret <8 x float> %2
+}
+
+; rdar://11076953
+; CHECK-LABEL: vinsertf128_ucombine:
+define <8 x float> @vinsertf128_ucombine(float* nocapture %f) nounwind uwtable readonly ssp {
+; CHECK-NOT: vmovups
+; CHECK: vinsertf128
+entry:
+ %add.ptr = getelementptr inbounds float, float* %f, i64 4
+ %0 = bitcast float* %add.ptr to <4 x float>*
+ %1 = load <4 x float>, <4 x float>* %0, align 8
+ %2 = tail call <8 x float> @llvm.x86.avx.vinsertf128.ps.256(<8 x float> undef, <4 x float> %1, i8 1)
+ ret <8 x float> %2
+}