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Add float patterns for Neon vld1-lane/dup and vst1-lane operations.
[oota-llvm.git]
/
test
/
CodeGen
/
ARM
/
vstlane.ll
diff --git
a/test/CodeGen/ARM/vstlane.ll
b/test/CodeGen/ARM/vstlane.ll
index c5387e04bdf7b7628afa9df5aa156e40ba7cc334..9aa8d59a289c3b2c36f349da62de6486851f123d 100644
(file)
--- a/
test/CodeGen/ARM/vstlane.ll
+++ b/
test/CodeGen/ARM/vstlane.ll
@@
-30,6
+30,15
@@
define void @vst1lanei32(i32* %A, <2 x i32>* %B) nounwind {
ret void
}
ret void
}
+define void @vst1lanef(float* %A, <2 x float>* %B) nounwind {
+;CHECK: vst1lanef:
+;CHECK: vst1.32 {d16[1]}, [r0]
+ %tmp1 = load <2 x float>* %B
+ %tmp2 = extractelement <2 x float> %tmp1, i32 1
+ store float %tmp2, float* %A
+ ret void
+}
+
define void @vst1laneQi8(i8* %A, <16 x i8>* %B) nounwind {
;CHECK: vst1laneQi8:
;CHECK: vst1.8 {d17[1]}, [r0]
define void @vst1laneQi8(i8* %A, <16 x i8>* %B) nounwind {
;CHECK: vst1laneQi8:
;CHECK: vst1.8 {d17[1]}, [r0]
@@
-57,6
+66,15
@@
define void @vst1laneQi32(i32* %A, <4 x i32>* %B) nounwind {
ret void
}
ret void
}
+define void @vst1laneQf(float* %A, <4 x float>* %B) nounwind {
+;CHECK: vst1laneQf:
+;CHECK: vst1.32 {d17[1]}, [r0]
+ %tmp1 = load <4 x float>* %B
+ %tmp2 = extractelement <4 x float> %tmp1, i32 3
+ store float %tmp2, float* %A
+ ret void
+}
+
define void @vst2lanei8(i8* %A, <8 x i8>* %B) nounwind {
;CHECK: vst2lanei8:
;Check the alignment value. Max for this instruction is 16 bits:
define void @vst2lanei8(i8* %A, <8 x i8>* %B) nounwind {
;CHECK: vst2lanei8:
;Check the alignment value. Max for this instruction is 16 bits: