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Be less conservative about forming IT blocks.
[oota-llvm.git]
/
test
/
CodeGen
/
ARM
/
2011-11-07-PromoteVectorLoadStore.ll
diff --git
a/test/CodeGen/ARM/2011-11-07-PromoteVectorLoadStore.ll
b/test/CodeGen/ARM/2011-11-07-PromoteVectorLoadStore.ll
index 8a65f2e82b75983826e78c52604dabd9580ec8d1..e7059716c49be166fcf4a40c095847fe811e485e 100644
(file)
--- a/
test/CodeGen/ARM/2011-11-07-PromoteVectorLoadStore.ll
+++ b/
test/CodeGen/ARM/2011-11-07-PromoteVectorLoadStore.ll
@@
-1,4
+1,4
@@
-; RUN: llc
< %s -march=arm -mattr=+neon
| FileCheck %s
+; RUN: llc
-mtriple=arm-eabi -mattr=+neon %s -o -
| FileCheck %s
; PR11319
@i8_res = global <2 x i8> <i8 0, i8 0>
; PR11319
@i8_res = global <2 x i8> <i8 0, i8 0>
@@
-7,8
+7,8
@@
define void @test_neon_vector_add_2xi8() nounwind {
; CHECK-LABEL: test_neon_vector_add_2xi8:
define void @test_neon_vector_add_2xi8() nounwind {
; CHECK-LABEL: test_neon_vector_add_2xi8:
- %1 = load <2 x i8>* @i8_src1
- %2 = load <2 x i8>* @i8_src2
+ %1 = load <2 x i8>
, <2 x i8>
* @i8_src1
+ %2 = load <2 x i8>
, <2 x i8>
* @i8_src2
%3 = add <2 x i8> %1, %2
store <2 x i8> %3, <2 x i8>* @i8_res
ret void
%3 = add <2 x i8> %1, %2
store <2 x i8> %3, <2 x i8>* @i8_res
ret void
@@
-16,8
+16,8
@@
define void @test_neon_vector_add_2xi8() nounwind {
define void @test_neon_ld_st_volatile_with_ashr_2xi8() {
; CHECK-LABEL: test_neon_ld_st_volatile_with_ashr_2xi8:
define void @test_neon_ld_st_volatile_with_ashr_2xi8() {
; CHECK-LABEL: test_neon_ld_st_volatile_with_ashr_2xi8:
- %1 = load volatile <2 x i8>* @i8_src1
- %2 = load volatile <2 x i8>* @i8_src2
+ %1 = load volatile <2 x i8>
, <2 x i8>
* @i8_src1
+ %2 = load volatile <2 x i8>
, <2 x i8>
* @i8_src2
%3 = ashr <2 x i8> %1, %2
store volatile <2 x i8> %3, <2 x i8>* @i8_res
ret void
%3 = ashr <2 x i8> %1, %2
store volatile <2 x i8> %3, <2 x i8>* @i8_res
ret void