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Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.
[oota-llvm.git]
/
lib
/
Target
/
TargetRegisterInfo.cpp
diff --git
a/lib/Target/TargetRegisterInfo.cpp
b/lib/Target/TargetRegisterInfo.cpp
index bae3343a850929a8338a1d7647b9e5ba52353f0e..90a8f8d8fdcce8c9a968e30b97c5cfe6da5e63ee 100644
(file)
--- a/
lib/Target/TargetRegisterInfo.cpp
+++ b/
lib/Target/TargetRegisterInfo.cpp
@@
-20,17
+20,11
@@
using namespace llvm;
using namespace llvm;
-TargetRegisterInfo::TargetRegisterInfo(const TargetRegister
Desc *D, unsigned NR
,
+TargetRegisterInfo::TargetRegisterInfo(const TargetRegister
InfoDesc *ID
,
regclass_iterator RCB, regclass_iterator RCE,
regclass_iterator RCB, regclass_iterator RCE,
- const char *const *subregindexnames,
- int CFSO, int CFDO)
- : Desc(D), SubRegIndexNames(subregindexnames), NumRegs(NR),
+ const char *const *subregindexnames)
+ : InfoDesc(ID), SubRegIndexNames(subregindexnames),
RegClassBegin(RCB), RegClassEnd(RCE) {
RegClassBegin(RCB), RegClassEnd(RCE) {
- assert(isPhysicalRegister(NumRegs) &&
- "Target has too many physical registers!");
-
- CallFrameSetupOpcode = CFSO;
- CallFrameDestroyOpcode = CFDO;
}
TargetRegisterInfo::~TargetRegisterInfo() {}
}
TargetRegisterInfo::~TargetRegisterInfo() {}
@@
-86,7
+80,7
@@
static void getAllocatableSetForRC(const MachineFunction &MF,
BitVector TargetRegisterInfo::getAllocatableSet(const MachineFunction &MF,
const TargetRegisterClass *RC) const {
BitVector TargetRegisterInfo::getAllocatableSet(const MachineFunction &MF,
const TargetRegisterClass *RC) const {
- BitVector Allocatable(
NumRegs
);
+ BitVector Allocatable(
getNumRegs()
);
if (RC) {
getAllocatableSetForRC(MF, RC, Allocatable);
} else {
if (RC) {
getAllocatableSetForRC(MF, RC, Allocatable);
} else {