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[C++] Use 'nullptr'.
[oota-llvm.git]
/
lib
/
Target
/
R600
/
R600InstrInfo.h
diff --git
a/lib/Target/R600/R600InstrInfo.h
b/lib/Target/R600/R600InstrInfo.h
index e2996c7a78f22dbf76940a7be4c0785f747e277c..baee6e002bb95fba30cc4b544686828e06d455c3 100644
(file)
--- a/
lib/Target/R600/R600InstrInfo.h
+++ b/
lib/Target/R600/R600InstrInfo.h
@@
-55,6
+55,8
@@
namespace llvm {
MachineBasicBlock::iterator MI, DebugLoc DL,
unsigned DestReg, unsigned SrcReg,
bool KillSrc) const;
MachineBasicBlock::iterator MI, DebugLoc DL,
unsigned DestReg, unsigned SrcReg,
bool KillSrc) const;
+ bool isLegalToSplitMBBAt(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI) const;
bool isTrig(const MachineInstr &MI) const;
bool isPlaceHolderOpcode(unsigned opcode) const;
bool isTrig(const MachineInstr &MI) const;
bool isPlaceHolderOpcode(unsigned opcode) const;
@@
-65,6
+67,8
@@
namespace llvm {
bool isALUInstr(unsigned Opcode) const;
bool hasInstrModifiers(unsigned Opcode) const;
bool isLDSInstr(unsigned Opcode) const;
bool isALUInstr(unsigned Opcode) const;
bool hasInstrModifiers(unsigned Opcode) const;
bool isLDSInstr(unsigned Opcode) const;
+ bool isLDSNoRetInstr(unsigned Opcode) const;
+ bool isLDSRetInstr(unsigned Opcode) const;
/// \returns true if this \p Opcode represents an ALU instruction or an
/// instruction that will be lowered in ExpandSpecialInstrs Pass.
/// \returns true if this \p Opcode represents an ALU instruction or an
/// instruction that will be lowered in ExpandSpecialInstrs Pass.
@@
-134,7
+138,7
@@
namespace llvm {
/// Same but using const index set instead of MI set.
bool fitsConstReadLimitations(const std::vector<unsigned>&) const;
/// Same but using const index set instead of MI set.
bool fitsConstReadLimitations(const std::vector<unsigned>&) const;
- /// \br
ei
f Vector instructions are instructions that must fill all
+ /// \br
ie
f Vector instructions are instructions that must fill all
/// instruction slots within an instruction group.
bool isVector(const MachineInstr &MI) const;
/// instruction slots within an instruction group.
bool isVector(const MachineInstr &MI) const;
@@
-188,7
+192,7
@@
namespace llvm {
unsigned int getInstrLatency(const InstrItineraryData *ItinData,
const MachineInstr *MI,
unsigned int getInstrLatency(const InstrItineraryData *ItinData,
const MachineInstr *MI,
- unsigned *PredCost =
0
) const;
+ unsigned *PredCost =
nullptr
) const;
virtual int getInstrLatency(const InstrItineraryData *ItinData,
SDNode *Node) const { return 1;}
virtual int getInstrLatency(const InstrItineraryData *ItinData,
SDNode *Node) const { return 1;}