- assert(0 && "TODO");
-// unsigned i = 0;
-// MachineInstr &MI = *II;
-// MachineBasicBlock &MBB = *MI.getParent();
-// MachineFunction &MF = *MBB.getParent();
-
-// while (!MI.getOperand(i).isFrameIndex()) {
-// ++i;
-// assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
-// }
-
-// int FrameIndex = MI.getOperand(i).getFrameIndex();
-
-// // Replace the FrameIndex with base register with GPR1 (SP) or GPR31 (FP).
-// MI.SetMachineOperandReg(i, hasFP(MF) ? PPC::R31 : PPC::R1);
-
-// // Take into account whether it's an add or mem instruction
-// unsigned OffIdx = (i == 2) ? 1 : 2;
-
-// // Now add the frame object offset to the offset from r1.
-// int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) +
-// MI.getOperand(OffIdx).getImmedValue();
-
-// // If we're not using a Frame Pointer that has been set to the value of the
-// // SP before having the stack size subtracted from it, then add the stack size
-// // to Offset to get the correct offset.
-// Offset += MF.getFrameInfo()->getStackSize();
-
-// if (Offset > 32767 || Offset < -32768) {
-// // Insert a set of r0 with the full offset value before the ld, st, or add
-// MachineBasicBlock *MBB = MI.getParent();
-// MBB->insert(II, BuildMI(PPC::LIS, 1, PPC::R0).addSImm(Offset >> 16));
-// MBB->insert(II, BuildMI(PPC::ORI, 2, PPC::R0).addReg(PPC::R0)
-// .addImm(Offset));
-// // convert into indexed form of the instruction
-// // sth 0:rA, 1:imm 2:(rB) ==> sthx 0:rA, 2:rB, 1:r0
-// // addi 0:rA 1:rB, 2, imm ==> add 0:rA, 1:rB, 2:r0
-// unsigned NewOpcode =
-// const_cast<std::map<unsigned, unsigned>& >(ImmToIdxMap)[MI.getOpcode()];
-// assert(NewOpcode && "No indexed form of load or store available!");
-// MI.setOpcode(NewOpcode);
-// MI.SetMachineOperandReg(1, MI.getOperand(i).getReg());
-// MI.SetMachineOperandReg(2, PPC::R0);
-// } else {
-// MI.SetMachineOperandConst(OffIdx, MachineOperand::MO_SignExtendedImmed,
-// Offset);
-// }
+ unsigned i = 0;
+ MachineInstr &MI = *II;
+ MachineBasicBlock &MBB = *MI.getParent();
+ MachineFunction &MF = *MBB.getParent();
+ bool FP = hasFP(MF);
+
+ while (!MI.getOperand(i).isFrameIndex()) {
+ ++i;
+ assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
+ }
+
+ int FrameIndex = MI.getOperand(i).getFrameIndex();
+
+ // Add the base register of R30 (SP) or R15 (FP).
+ MI.SetMachineOperandReg(i + 1, FP ? Alpha::R15 : Alpha::R30);
+
+ // Now add the frame object offset to the offset from the virtual frame index.
+ int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
+
+ DEBUG(std::cerr << "FI: " << FrameIndex << " Offset: " << Offset << "\n");
+
+ Offset += MF.getFrameInfo()->getStackSize();
+
+ DEBUG(std::cerr << "Corrected Offset " << Offset <<
+ " for stack size: " << MF.getFrameInfo()->getStackSize() << "\n");
+
+ if (Offset > IMM_HIGH || Offset < IMM_LOW) {
+ DEBUG(std::cerr << "Unconditionally using R28 for evil purposes Offset: " << Offset << "\n");
+ //so in this case, we need to use a temporary register, and move the original
+ //inst off the SP/FP
+ //fix up the old:
+ MI.SetMachineOperandReg(i + 1, Alpha::R28);
+ MI.SetMachineOperandConst(i, MachineOperand::MO_SignExtendedImmed,
+ getLower16(Offset));
+ //insert the new
+ MachineInstr* nMI=BuildMI(Alpha::LDAH, 2, Alpha::R28)
+ .addImm(getUpper16(Offset)).addReg(FP ? Alpha::R15 : Alpha::R30);
+ MBB.insert(II, nMI);
+ } else {
+ MI.SetMachineOperandConst(i, MachineOperand::MO_SignExtendedImmed, Offset);
+ }