-class AI<dag ops, string opc, string asm, list<dag> pattern>
- : I<ops, AddrModeNone, Size4Bytes, IndexModeNone, opc, asm, "", pattern>;
-class AI1<dag ops, string opc, string asm, list<dag> pattern>
- : I<ops, AddrMode1, Size4Bytes, IndexModeNone, opc, asm, "", pattern>;
-class AI2<dag ops, string opc, string asm, list<dag> pattern>
- : I<ops, AddrMode2, Size4Bytes, IndexModeNone, opc, asm, "", pattern>;
-class AI3<dag ops, string opc, string asm, list<dag> pattern>
- : I<ops, AddrMode3, Size4Bytes, IndexModeNone, opc, asm, "", pattern>;
-class AI4<dag ops, string opc, string asm, list<dag> pattern>
- : I<ops, AddrMode4, Size4Bytes, IndexModeNone, opc, asm, "", pattern>;
-class AI1x2<dag ops, string opc, string asm, list<dag> pattern>
- : I<ops, AddrMode1, Size8Bytes, IndexModeNone, opc, asm, "", pattern>;
+// Same as I except it can optionally modify CPSR. Note it's modeled as
+// an input operand since by default it's a zero register. It will
+// become an implicit def once it's "flipped".
+class sI<bits<4> opcod, dag oops, dag iops, AddrMode am, SizeFlagVal sz,
+ IndexMode im, Format f, string opc, string asm, string cstr,
+ list<dag> pattern>
+ : InstARM<opcod, am, sz, im, f, cstr> {
+ let OutOperandList = oops;
+ let InOperandList = !con(iops, (ops pred:$p, cc_out:$s));
+ let AsmString = !strconcat(opc, !strconcat("${p}${s}", asm));
+ let Pattern = pattern;
+ list<Predicate> Predicates = [IsARM];
+}
+
+class AI<bits<4> opcod, dag oops, dag iops, Format f, string opc,
+ string asm, list<dag> pattern>
+ : I<opcod, oops, iops, AddrModeNone, Size4Bytes, IndexModeNone, f, opc,
+ asm,"",pattern>;
+class AsI<bits<4> opcod, dag oops, dag iops, Format f, string opc,
+ string asm, list<dag> pattern>
+ : sI<opcod, oops, iops, AddrModeNone, Size4Bytes, IndexModeNone, f, opc,
+ asm,"",pattern>;
+class AI1<bits<4> opcod, dag oops, dag iops, Format f, string opc,
+ string asm, list<dag> pattern>
+ : I<opcod, oops, iops, AddrMode1, Size4Bytes, IndexModeNone, f, opc,
+ asm, "", pattern>;
+class AsI1<bits<4> opcod, dag oops, dag iops, Format f, string opc,
+ string asm, list<dag> pattern>
+ : sI<opcod, oops, iops, AddrMode1, Size4Bytes, IndexModeNone, f, opc,
+ asm, "", pattern>;
+class AI2<bits<4> opcod, dag oops, dag iops, Format f, string opc,
+ string asm, list<dag> pattern>
+ : I<opcod, oops, iops, AddrMode2, Size4Bytes, IndexModeNone, f, opc,
+ asm, "", pattern>;
+class AI3<bits<4> opcod, dag oops, dag iops, Format f, string opc,
+ string asm, list<dag> pattern>
+ : I<opcod, oops, iops, AddrMode3, Size4Bytes, IndexModeNone, f, opc,
+ asm, "", pattern>;
+class AI4<bits<4> opcod, dag oops, dag iops, Format f, string opc,
+ string asm, list<dag> pattern>
+ : I<opcod, oops, iops, AddrMode4, Size4Bytes, IndexModeNone, f, opc,
+ asm, "", pattern>;
+class AI1x2<bits<4> opcod, dag oops, dag iops, Format f, string opc,
+ string asm, list<dag> pattern>
+ : I<opcod, oops, iops, AddrMode1, Size8Bytes, IndexModeNone, f, opc,
+ asm, "", pattern>;