+void ScalarEnumerationTraits<ELFYAML::ELF_ELFOSABI>::enumeration(
+ IO &IO, ELFYAML::ELF_ELFOSABI &Value) {
+#define ECase(X) IO.enumCase(Value, #X, ELF::X);
+ ECase(ELFOSABI_NONE)
+ ECase(ELFOSABI_HPUX)
+ ECase(ELFOSABI_NETBSD)
+ ECase(ELFOSABI_GNU)
+ ECase(ELFOSABI_GNU)
+ ECase(ELFOSABI_HURD)
+ ECase(ELFOSABI_SOLARIS)
+ ECase(ELFOSABI_AIX)
+ ECase(ELFOSABI_IRIX)
+ ECase(ELFOSABI_FREEBSD)
+ ECase(ELFOSABI_TRU64)
+ ECase(ELFOSABI_MODESTO)
+ ECase(ELFOSABI_OPENBSD)
+ ECase(ELFOSABI_OPENVMS)
+ ECase(ELFOSABI_NSK)
+ ECase(ELFOSABI_AROS)
+ ECase(ELFOSABI_FENIXOS)
+ ECase(ELFOSABI_CLOUDABI)
+ ECase(ELFOSABI_C6000_ELFABI)
+ ECase(ELFOSABI_C6000_LINUX)
+ ECase(ELFOSABI_ARM)
+ ECase(ELFOSABI_STANDALONE)
+#undef ECase
+}
+
+void ScalarBitSetTraits<ELFYAML::ELF_EF>::bitset(IO &IO,
+ ELFYAML::ELF_EF &Value) {
+ const auto *Object = static_cast<ELFYAML::Object *>(IO.getContext());
+ assert(Object && "The IO context is not initialized");
+#define BCase(X) IO.bitSetCase(Value, #X, ELF::X);
+#define BCaseMask(X, M) IO.maskedBitSetCase(Value, #X, ELF::X, ELF::M);
+ switch (Object->Header.Machine) {
+ case ELF::EM_ARM:
+ BCase(EF_ARM_SOFT_FLOAT)
+ BCase(EF_ARM_VFP_FLOAT)
+ BCaseMask(EF_ARM_EABI_UNKNOWN, EF_ARM_EABIMASK)
+ BCaseMask(EF_ARM_EABI_VER1, EF_ARM_EABIMASK)
+ BCaseMask(EF_ARM_EABI_VER2, EF_ARM_EABIMASK)
+ BCaseMask(EF_ARM_EABI_VER3, EF_ARM_EABIMASK)
+ BCaseMask(EF_ARM_EABI_VER4, EF_ARM_EABIMASK)
+ BCaseMask(EF_ARM_EABI_VER5, EF_ARM_EABIMASK)
+ break;
+ case ELF::EM_MIPS:
+ BCase(EF_MIPS_NOREORDER)
+ BCase(EF_MIPS_PIC)
+ BCase(EF_MIPS_CPIC)
+ BCase(EF_MIPS_ABI2)
+ BCase(EF_MIPS_32BITMODE)
+ BCase(EF_MIPS_FP64)
+ BCase(EF_MIPS_NAN2008)
+ BCase(EF_MIPS_MICROMIPS)
+ BCase(EF_MIPS_ARCH_ASE_M16)
+ BCase(EF_MIPS_ARCH_ASE_MDMX)
+ BCaseMask(EF_MIPS_ABI_O32, EF_MIPS_ABI)
+ BCaseMask(EF_MIPS_ABI_O64, EF_MIPS_ABI)
+ BCaseMask(EF_MIPS_ABI_EABI32, EF_MIPS_ABI)
+ BCaseMask(EF_MIPS_ABI_EABI64, EF_MIPS_ABI)
+ BCaseMask(EF_MIPS_MACH_3900, EF_MIPS_MACH)
+ BCaseMask(EF_MIPS_MACH_4010, EF_MIPS_MACH)
+ BCaseMask(EF_MIPS_MACH_4100, EF_MIPS_MACH)
+ BCaseMask(EF_MIPS_MACH_4650, EF_MIPS_MACH)
+ BCaseMask(EF_MIPS_MACH_4120, EF_MIPS_MACH)
+ BCaseMask(EF_MIPS_MACH_4111, EF_MIPS_MACH)
+ BCaseMask(EF_MIPS_MACH_SB1, EF_MIPS_MACH)
+ BCaseMask(EF_MIPS_MACH_OCTEON, EF_MIPS_MACH)
+ BCaseMask(EF_MIPS_MACH_XLR, EF_MIPS_MACH)
+ BCaseMask(EF_MIPS_MACH_OCTEON2, EF_MIPS_MACH)
+ BCaseMask(EF_MIPS_MACH_OCTEON3, EF_MIPS_MACH)
+ BCaseMask(EF_MIPS_MACH_5400, EF_MIPS_MACH)
+ BCaseMask(EF_MIPS_MACH_5900, EF_MIPS_MACH)
+ BCaseMask(EF_MIPS_MACH_5500, EF_MIPS_MACH)
+ BCaseMask(EF_MIPS_MACH_9000, EF_MIPS_MACH)
+ BCaseMask(EF_MIPS_MACH_LS2E, EF_MIPS_MACH)
+ BCaseMask(EF_MIPS_MACH_LS2F, EF_MIPS_MACH)
+ BCaseMask(EF_MIPS_MACH_LS3A, EF_MIPS_MACH)
+ BCaseMask(EF_MIPS_ARCH_1, EF_MIPS_ARCH)
+ BCaseMask(EF_MIPS_ARCH_2, EF_MIPS_ARCH)
+ BCaseMask(EF_MIPS_ARCH_3, EF_MIPS_ARCH)
+ BCaseMask(EF_MIPS_ARCH_4, EF_MIPS_ARCH)
+ BCaseMask(EF_MIPS_ARCH_5, EF_MIPS_ARCH)
+ BCaseMask(EF_MIPS_ARCH_32, EF_MIPS_ARCH)
+ BCaseMask(EF_MIPS_ARCH_64, EF_MIPS_ARCH)
+ BCaseMask(EF_MIPS_ARCH_32R2, EF_MIPS_ARCH)
+ BCaseMask(EF_MIPS_ARCH_64R2, EF_MIPS_ARCH)
+ BCaseMask(EF_MIPS_ARCH_32R6, EF_MIPS_ARCH)
+ BCaseMask(EF_MIPS_ARCH_64R6, EF_MIPS_ARCH)
+ break;
+ case ELF::EM_HEXAGON:
+ BCase(EF_HEXAGON_MACH_V2)
+ BCase(EF_HEXAGON_MACH_V3)
+ BCase(EF_HEXAGON_MACH_V4)
+ BCase(EF_HEXAGON_MACH_V5)
+ BCase(EF_HEXAGON_ISA_V2)
+ BCase(EF_HEXAGON_ISA_V3)
+ BCase(EF_HEXAGON_ISA_V4)
+ BCase(EF_HEXAGON_ISA_V5)
+ break;
+ case ELF::EM_AVR:
+ BCase(EF_AVR_ARCH_AVR1)
+ BCase(EF_AVR_ARCH_AVR2)
+ BCase(EF_AVR_ARCH_AVR25)
+ BCase(EF_AVR_ARCH_AVR3)
+ BCase(EF_AVR_ARCH_AVR31)
+ BCase(EF_AVR_ARCH_AVR35)
+ BCase(EF_AVR_ARCH_AVR4)
+ BCase(EF_AVR_ARCH_AVR51)
+ BCase(EF_AVR_ARCH_AVR6)
+ BCase(EF_AVR_ARCH_AVRTINY)
+ BCase(EF_AVR_ARCH_XMEGA1)
+ BCase(EF_AVR_ARCH_XMEGA2)
+ BCase(EF_AVR_ARCH_XMEGA3)
+ BCase(EF_AVR_ARCH_XMEGA4)
+ BCase(EF_AVR_ARCH_XMEGA5)
+ BCase(EF_AVR_ARCH_XMEGA6)
+ BCase(EF_AVR_ARCH_XMEGA7)
+ break;
+ default:
+ llvm_unreachable("Unsupported architecture");
+ }
+#undef BCase
+#undef BCaseMask
+}
+
+void ScalarEnumerationTraits<ELFYAML::ELF_SHT>::enumeration(
+ IO &IO, ELFYAML::ELF_SHT &Value) {
+ const auto *Object = static_cast<ELFYAML::Object *>(IO.getContext());
+ assert(Object && "The IO context is not initialized");
+#define ECase(X) IO.enumCase(Value, #X, ELF::X);
+ ECase(SHT_NULL)
+ ECase(SHT_PROGBITS)
+ // No SHT_SYMTAB. Use the top-level `Symbols` key instead.
+ // FIXME: Issue a diagnostic with this information.
+ ECase(SHT_STRTAB)
+ ECase(SHT_RELA)
+ ECase(SHT_HASH)
+ ECase(SHT_DYNAMIC)
+ ECase(SHT_NOTE)
+ ECase(SHT_NOBITS)
+ ECase(SHT_REL)
+ ECase(SHT_SHLIB)
+ ECase(SHT_DYNSYM)
+ ECase(SHT_INIT_ARRAY)
+ ECase(SHT_FINI_ARRAY)
+ ECase(SHT_PREINIT_ARRAY)
+ ECase(SHT_GROUP)
+ ECase(SHT_SYMTAB_SHNDX)
+ ECase(SHT_LOOS)
+ ECase(SHT_GNU_ATTRIBUTES)
+ ECase(SHT_GNU_HASH)
+ ECase(SHT_GNU_verdef)
+ ECase(SHT_GNU_verneed)
+ ECase(SHT_GNU_versym)
+ ECase(SHT_HIOS)
+ ECase(SHT_LOPROC)
+ switch (Object->Header.Machine) {
+ case ELF::EM_ARM:
+ ECase(SHT_ARM_EXIDX)
+ ECase(SHT_ARM_PREEMPTMAP)
+ ECase(SHT_ARM_ATTRIBUTES)
+ ECase(SHT_ARM_DEBUGOVERLAY)
+ ECase(SHT_ARM_OVERLAYSECTION)
+ break;
+ case ELF::EM_HEXAGON:
+ ECase(SHT_HEX_ORDERED)
+ break;
+ case ELF::EM_X86_64:
+ ECase(SHT_X86_64_UNWIND)
+ break;
+ case ELF::EM_MIPS:
+ ECase(SHT_MIPS_REGINFO)
+ ECase(SHT_MIPS_OPTIONS)
+ ECase(SHT_MIPS_ABIFLAGS)
+ break;
+ default:
+ // Nothing to do.
+ break;
+ }
+#undef ECase
+}
+
+void ScalarBitSetTraits<ELFYAML::ELF_SHF>::bitset(IO &IO,
+ ELFYAML::ELF_SHF &Value) {
+ const auto *Object = static_cast<ELFYAML::Object *>(IO.getContext());
+#define BCase(X) IO.bitSetCase(Value, #X, ELF::X);
+ BCase(SHF_WRITE)
+ BCase(SHF_ALLOC)
+ BCase(SHF_EXCLUDE)
+ BCase(SHF_EXECINSTR)
+ BCase(SHF_MERGE)
+ BCase(SHF_STRINGS)
+ BCase(SHF_INFO_LINK)
+ BCase(SHF_LINK_ORDER)
+ BCase(SHF_OS_NONCONFORMING)
+ BCase(SHF_GROUP)
+ BCase(SHF_TLS)
+ switch(Object->Header.Machine) {
+ case ELF::EM_AMDGPU:
+ BCase(SHF_AMDGPU_HSA_GLOBAL)
+ BCase(SHF_AMDGPU_HSA_READONLY)
+ BCase(SHF_AMDGPU_HSA_CODE)
+ BCase(SHF_AMDGPU_HSA_AGENT)
+ break;
+ default:
+ // Nothing to do.
+ break;
+ }
+#undef BCase
+}
+
+void ScalarEnumerationTraits<ELFYAML::ELF_STT>::enumeration(
+ IO &IO, ELFYAML::ELF_STT &Value) {
+#define ECase(X) IO.enumCase(Value, #X, ELF::X);
+ ECase(STT_NOTYPE)
+ ECase(STT_OBJECT)
+ ECase(STT_FUNC)
+ ECase(STT_SECTION)
+ ECase(STT_FILE)
+ ECase(STT_COMMON)
+ ECase(STT_TLS)
+ ECase(STT_GNU_IFUNC)
+#undef ECase
+}
+
+void ScalarEnumerationTraits<ELFYAML::ELF_STV>::enumeration(
+ IO &IO, ELFYAML::ELF_STV &Value) {
+#define ECase(X) IO.enumCase(Value, #X, ELF::X);
+ ECase(STV_DEFAULT)
+ ECase(STV_INTERNAL)
+ ECase(STV_HIDDEN)
+ ECase(STV_PROTECTED)
+#undef ECase
+}
+
+void ScalarBitSetTraits<ELFYAML::ELF_STO>::bitset(IO &IO,
+ ELFYAML::ELF_STO &Value) {
+ const auto *Object = static_cast<ELFYAML::Object *>(IO.getContext());
+ assert(Object && "The IO context is not initialized");
+#define BCase(X) IO.bitSetCase(Value, #X, ELF::X);
+ switch (Object->Header.Machine) {
+ case ELF::EM_MIPS:
+ BCase(STO_MIPS_OPTIONAL)
+ BCase(STO_MIPS_PLT)
+ BCase(STO_MIPS_PIC)
+ BCase(STO_MIPS_MICROMIPS)
+ break;
+ default:
+ break; // Nothing to do
+ }
+#undef BCase
+#undef BCaseMask
+}
+
+void ScalarEnumerationTraits<ELFYAML::ELF_RSS>::enumeration(
+ IO &IO, ELFYAML::ELF_RSS &Value) {
+#define ECase(X) IO.enumCase(Value, #X, ELF::X);
+ ECase(RSS_UNDEF)
+ ECase(RSS_GP)
+ ECase(RSS_GP0)
+ ECase(RSS_LOC)
+#undef ECase
+}
+
+void ScalarEnumerationTraits<ELFYAML::ELF_REL>::enumeration(
+ IO &IO, ELFYAML::ELF_REL &Value) {
+ const auto *Object = static_cast<ELFYAML::Object *>(IO.getContext());
+ assert(Object && "The IO context is not initialized");
+#define ELF_RELOC(X, Y) IO.enumCase(Value, #X, ELF::X);
+ switch (Object->Header.Machine) {
+ case ELF::EM_X86_64:
+#include "llvm/Support/ELFRelocs/x86_64.def"
+ break;
+ case ELF::EM_MIPS:
+#include "llvm/Support/ELFRelocs/Mips.def"
+ break;
+ case ELF::EM_HEXAGON:
+#include "llvm/Support/ELFRelocs/Hexagon.def"
+ break;
+ case ELF::EM_386:
+ case ELF::EM_IAMCU:
+#include "llvm/Support/ELFRelocs/i386.def"
+ break;
+ case ELF::EM_AARCH64:
+#include "llvm/Support/ELFRelocs/AArch64.def"
+ break;
+ case ELF::EM_ARM:
+#include "llvm/Support/ELFRelocs/ARM.def"
+ break;
+ default:
+ llvm_unreachable("Unsupported architecture");
+ }
+#undef ELF_RELOC
+}
+
+void ScalarEnumerationTraits<ELFYAML::MIPS_AFL_REG>::enumeration(
+ IO &IO, ELFYAML::MIPS_AFL_REG &Value) {
+#define ECase(X) IO.enumCase(Value, #X, Mips::AFL_##X);
+ ECase(REG_NONE)
+ ECase(REG_32)
+ ECase(REG_64)
+ ECase(REG_128)
+#undef ECase
+}
+
+void ScalarEnumerationTraits<ELFYAML::MIPS_ABI_FP>::enumeration(
+ IO &IO, ELFYAML::MIPS_ABI_FP &Value) {
+#define ECase(X) IO.enumCase(Value, #X, Mips::Val_GNU_MIPS_ABI_##X);
+ ECase(FP_ANY)
+ ECase(FP_DOUBLE)
+ ECase(FP_SINGLE)
+ ECase(FP_SOFT)
+ ECase(FP_OLD_64)
+ ECase(FP_XX)
+ ECase(FP_64)
+ ECase(FP_64A)
+#undef ECase
+}
+
+void ScalarEnumerationTraits<ELFYAML::MIPS_AFL_EXT>::enumeration(
+ IO &IO, ELFYAML::MIPS_AFL_EXT &Value) {
+#define ECase(X) IO.enumCase(Value, #X, Mips::AFL_##X);
+ ECase(EXT_NONE)
+ ECase(EXT_XLR)
+ ECase(EXT_OCTEON2)
+ ECase(EXT_OCTEONP)
+ ECase(EXT_LOONGSON_3A)
+ ECase(EXT_OCTEON)
+ ECase(EXT_5900)
+ ECase(EXT_4650)
+ ECase(EXT_4010)
+ ECase(EXT_4100)
+ ECase(EXT_3900)
+ ECase(EXT_10000)
+ ECase(EXT_SB1)
+ ECase(EXT_4111)
+ ECase(EXT_4120)
+ ECase(EXT_5400)
+ ECase(EXT_5500)
+ ECase(EXT_LOONGSON_2E)
+ ECase(EXT_LOONGSON_2F)
+ ECase(EXT_OCTEON3)
+#undef ECase
+}
+
+void ScalarEnumerationTraits<ELFYAML::MIPS_ISA>::enumeration(
+ IO &IO, ELFYAML::MIPS_ISA &Value) {
+ IO.enumCase(Value, "MIPS1", 1);
+ IO.enumCase(Value, "MIPS2", 2);
+ IO.enumCase(Value, "MIPS3", 3);
+ IO.enumCase(Value, "MIPS4", 4);
+ IO.enumCase(Value, "MIPS5", 5);
+ IO.enumCase(Value, "MIPS32", 32);
+ IO.enumCase(Value, "MIPS64", 64);
+}
+
+void ScalarBitSetTraits<ELFYAML::MIPS_AFL_ASE>::bitset(
+ IO &IO, ELFYAML::MIPS_AFL_ASE &Value) {
+#define BCase(X) IO.bitSetCase(Value, #X, Mips::AFL_ASE_##X);
+ BCase(DSP)
+ BCase(DSPR2)
+ BCase(EVA)
+ BCase(MCU)
+ BCase(MDMX)
+ BCase(MIPS3D)
+ BCase(MT)
+ BCase(SMARTMIPS)
+ BCase(VIRT)
+ BCase(MSA)
+ BCase(MIPS16)
+ BCase(MICROMIPS)
+ BCase(XPA)
+#undef BCase
+}
+
+void ScalarBitSetTraits<ELFYAML::MIPS_AFL_FLAGS1>::bitset(
+ IO &IO, ELFYAML::MIPS_AFL_FLAGS1 &Value) {
+#define BCase(X) IO.bitSetCase(Value, #X, Mips::AFL_FLAGS1_##X);
+ BCase(ODDSPREG)
+#undef BCase
+}
+
+void MappingTraits<ELFYAML::FileHeader>::mapping(IO &IO,
+ ELFYAML::FileHeader &FileHdr) {