- for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
- MBB != MBBe; ++MBB)
- {
- CurrMBB = &(*MBB);
-
- //loop over each basic block
- for (MachineBasicBlock::iterator I = MBB->begin(); I != MBB->end(); ++I)
- {
- MachineInstr *MI = *I;
-
- DEBUG(std::cerr << "instr: ";
- MI->print(std::cerr, TM));
-
- // FIXME: add a preliminary pass that will invalidate any registers that
- // are used by the instruction (including implicit uses)
-
-
- // Loop over each instruction:
- // uses, move from memory into registers
- for (int i = MI->getNumOperands() - 1; i >= 0; --i) {
- MachineOperand &op = MI->getOperand(i);
-
- if (op.getType() == MachineOperand::MO_SignExtendedImmed ||
- op.getType() == MachineOperand::MO_UnextendedImmed)
- {
- DEBUG(std::cerr << "const\n");
- } else if (op.isVirtualRegister()) {
- virtualReg = (unsigned) op.getAllocatedRegNum();
- DEBUG(std::cerr << "op: " << op << "\n");
- DEBUG(std::cerr << "\t inst[" << i << "]: ";
- MI->print(std::cerr, TM));
-
- // make sure the same virtual register maps to the same physical
- // register in any given instruction
- if (VirtReg2PhysRegMap.find(virtualReg) != VirtReg2PhysRegMap.end()) {
- physReg = VirtReg2PhysRegMap[virtualReg];
- } else {
- if (op.opIsDef()) {
- if (TM.getInstrInfo().isTwoAddrInstr(MI->getOpcode()) && i == 0) {
- // must be same register number as the first operand
- // This maps a = b + c into b += c, and saves b into a's spot
- physReg = (unsigned) MI->getOperand(1).getAllocatedRegNum();
- } else {
- physReg = getFreeReg(virtualReg);
- }
- MachineBasicBlock::iterator J = I;
- J = saveVirtRegToStack(++J, virtualReg, physReg);
- I = --J;
+ // Loop over uses, move from memory into registers.
+ for (int i = MI->getNumOperands() - 1; i >= 0; --i) {
+ MachineOperand &MO = MI->getOperand(i);
+
+ if (MO.isReg() && MO.getReg() &&
+ TargetRegisterInfo::isVirtualRegister(MO.getReg())) {
+ unsigned virtualReg = (unsigned) MO.getReg();
+ DOUT << "op: " << MO << "\n";
+ DOUT << "\t inst[" << i << "]: ";
+ DEBUG(MI->print(*cerr.stream(), TM));
+
+ // make sure the same virtual register maps to the same physical
+ // register in any given instruction
+ unsigned physReg = Virt2PhysRegMap[virtualReg];
+ if (physReg == 0) {
+ if (MO.isDef()) {
+ unsigned TiedOp;
+ if (!MI->isRegTiedToUseOperand(i, &TiedOp)) {
+ physReg = getFreeReg(virtualReg);