+ case MachineOperand::MO_RegisterLiveOut: {
+ const uint32_t *RegMask = Op.getRegLiveOut();
+ OS << "liveout(";
+ bool IsCommaNeeded = false;
+ for (unsigned Reg = 0, E = TRI->getNumRegs(); Reg < E; ++Reg) {
+ if (RegMask[Reg / 32] & (1U << (Reg % 32))) {
+ if (IsCommaNeeded)
+ OS << ", ";
+ printReg(Reg, OS, TRI);
+ IsCommaNeeded = true;
+ }
+ }
+ OS << ")";
+ break;
+ }
+ case MachineOperand::MO_Metadata:
+ Op.getMetadata()->printAsOperand(OS, MST);
+ break;
+ case MachineOperand::MO_MCSymbol:
+ OS << "<mcsymbol " << *Op.getMCSymbol() << ">";
+ break;
+ case MachineOperand::MO_CFIIndex: {
+ const auto &MMI = Op.getParent()->getParent()->getParent()->getMMI();
+ print(MMI.getFrameInstructions()[Op.getCFIIndex()], TRI);
+ break;
+ }
+ }
+}
+
+void MIPrinter::print(const MachineMemOperand &Op) {
+ OS << '(';
+ // TODO: Print operand's target specific flags.
+ if (Op.isVolatile())
+ OS << "volatile ";
+ if (Op.isNonTemporal())
+ OS << "non-temporal ";
+ if (Op.isInvariant())
+ OS << "invariant ";
+ if (Op.isLoad())
+ OS << "load ";
+ else {
+ assert(Op.isStore() && "Non load machine operand must be a store");
+ OS << "store ";
+ }
+ OS << Op.getSize() << (Op.isLoad() ? " from " : " into ");
+ if (const Value *Val = Op.getValue()) {
+ printIRValueReference(*Val);
+ } else {
+ const PseudoSourceValue *PVal = Op.getPseudoValue();
+ assert(PVal && "Expected a pseudo source value");
+ switch (PVal->kind()) {
+ case PseudoSourceValue::Stack:
+ OS << "stack";
+ break;
+ case PseudoSourceValue::GOT:
+ OS << "got";
+ break;
+ case PseudoSourceValue::JumpTable:
+ OS << "jump-table";
+ break;
+ case PseudoSourceValue::ConstantPool:
+ OS << "constant-pool";
+ break;
+ case PseudoSourceValue::FixedStack:
+ printStackObjectReference(
+ cast<FixedStackPseudoSourceValue>(PVal)->getFrameIndex());
+ break;
+ case PseudoSourceValue::GlobalValueCallEntry:
+ OS << "call-entry ";
+ cast<GlobalValuePseudoSourceValue>(PVal)->getValue()->printAsOperand(
+ OS, /*PrintType=*/false, MST);
+ break;
+ case PseudoSourceValue::ExternalSymbolCallEntry:
+ OS << "call-entry $";
+ printLLVMNameWithoutPrefix(
+ OS, cast<ExternalSymbolPseudoSourceValue>(PVal)->getSymbol());
+ break;
+ }
+ }
+ printOffset(Op.getOffset());
+ if (Op.getBaseAlignment() != Op.getSize())
+ OS << ", align " << Op.getBaseAlignment();
+ auto AAInfo = Op.getAAInfo();
+ if (AAInfo.TBAA) {
+ OS << ", !tbaa ";
+ AAInfo.TBAA->printAsOperand(OS, MST);
+ }
+ if (AAInfo.Scope) {
+ OS << ", !alias.scope ";
+ AAInfo.Scope->printAsOperand(OS, MST);
+ }
+ if (AAInfo.NoAlias) {
+ OS << ", !noalias ";
+ AAInfo.NoAlias->printAsOperand(OS, MST);
+ }
+ if (Op.getRanges()) {
+ OS << ", !range ";
+ Op.getRanges()->printAsOperand(OS, MST);
+ }
+ OS << ')';
+}
+
+static void printCFIRegister(unsigned DwarfReg, raw_ostream &OS,
+ const TargetRegisterInfo *TRI) {
+ int Reg = TRI->getLLVMRegNum(DwarfReg, true);
+ if (Reg == -1) {
+ OS << "<badreg>";
+ return;
+ }
+ printReg(Reg, OS, TRI);
+}
+
+void MIPrinter::print(const MCCFIInstruction &CFI,
+ const TargetRegisterInfo *TRI) {
+ switch (CFI.getOperation()) {
+ case MCCFIInstruction::OpSameValue:
+ OS << ".cfi_same_value ";
+ if (CFI.getLabel())
+ OS << "<mcsymbol> ";
+ printCFIRegister(CFI.getRegister(), OS, TRI);
+ break;
+ case MCCFIInstruction::OpOffset:
+ OS << ".cfi_offset ";
+ if (CFI.getLabel())
+ OS << "<mcsymbol> ";
+ printCFIRegister(CFI.getRegister(), OS, TRI);
+ OS << ", " << CFI.getOffset();
+ break;
+ case MCCFIInstruction::OpDefCfaRegister:
+ OS << ".cfi_def_cfa_register ";
+ if (CFI.getLabel())
+ OS << "<mcsymbol> ";
+ printCFIRegister(CFI.getRegister(), OS, TRI);
+ break;
+ case MCCFIInstruction::OpDefCfaOffset:
+ OS << ".cfi_def_cfa_offset ";
+ if (CFI.getLabel())
+ OS << "<mcsymbol> ";
+ OS << CFI.getOffset();
+ break;
+ case MCCFIInstruction::OpDefCfa:
+ OS << ".cfi_def_cfa ";
+ if (CFI.getLabel())
+ OS << "<mcsymbol> ";
+ printCFIRegister(CFI.getRegister(), OS, TRI);
+ OS << ", " << CFI.getOffset();
+ break;