- // Loop over all of the instructions, processing them.
- for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
- I != E; ++I) {
- MachineInstr *MI = I;
-
- // Process all of the operands of the instruction...
- unsigned NumOperandsToProcess = MI->getNumOperands();
-
- // Unless it is a PHI node. In this case, ONLY process the DEF, not any
- // of the uses. They will be handled in other basic blocks.
- if (MI->getOpcode() == TargetInstrInfo::PHI)
- NumOperandsToProcess = 1;
-
- // Process all uses...
- for (unsigned i = 0; i != NumOperandsToProcess; ++i) {
- const MachineOperand &MO = MI->getOperand(i);
- if (MO.isRegister() && MO.isUse() && MO.getReg()) {
- unsigned MOReg = MO.getReg();
- if (TargetRegisterInfo::isVirtualRegister(MOReg))
- HandleVirtRegUse(MOReg, MBB, MI);
- else if (TargetRegisterInfo::isPhysicalRegister(MOReg) &&
- !ReservedRegisters[MOReg])
- HandlePhysRegUse(MOReg, MI);
- }
- }
-
- // Process all defs...
- for (unsigned i = 0; i != NumOperandsToProcess; ++i) {
- const MachineOperand &MO = MI->getOperand(i);
- if (MO.isRegister() && MO.isDef() && MO.getReg()) {
- unsigned MOReg = MO.getReg();
- if (TargetRegisterInfo::isVirtualRegister(MOReg)) {
- VarInfo &VRInfo = getVarInfo(MOReg);
-
- if (VRInfo.AliveBlocks.none())
- // If vr is not alive in any block, then defaults to dead.
- VRInfo.Kills.push_back(MI);
- } else if (TargetRegisterInfo::isPhysicalRegister(MOReg) &&
- !ReservedRegisters[MOReg]) {
- HandlePhysRegDef(MOReg, MI);
- }
- }
- }
- }
-
- // Handle any virtual assignments from PHI nodes which might be at the
- // bottom of this basic block. We check all of our successor blocks to see
- // if they have PHI nodes, and if so, we simulate an assignment at the end
- // of the current block.
- if (!PHIVarInfo[MBB->getNumber()].empty()) {
- SmallVector<unsigned, 4>& VarInfoVec = PHIVarInfo[MBB->getNumber()];
-
- for (SmallVector<unsigned, 4>::iterator I = VarInfoVec.begin(),
- E = VarInfoVec.end(); I != E; ++I) {
- // Only mark it alive only in the block we are representing.
- MarkVirtRegAliveInBlock(getVarInfo(*I), MRI.getVRegDef(*I)->getParent(),
- MBB);
- }
- }
-
- // Finally, if the last instruction in the block is a return, make sure to mark
- // it as using all of the live-out values in the function.
- if (!MBB->empty() && MBB->back().getDesc().isReturn()) {
- MachineInstr *Ret = &MBB->back();
- for (MachineRegisterInfo::liveout_iterator
- I = MF->getRegInfo().liveout_begin(),
- E = MF->getRegInfo().liveout_end(); I != E; ++I) {
- assert(TargetRegisterInfo::isPhysicalRegister(*I) &&
- "Cannot have a live-in virtual register!");
- HandlePhysRegUse(*I, Ret);
- // Add live-out registers as implicit uses.
- if (Ret->findRegisterUseOperandIdx(*I) == -1)
- Ret->addOperand(MachineOperand::CreateReg(*I, false, true));
- }
- }