-
-void LLVMTargetMachine::printNoVerify(PassManagerBase &PM,
- const char *Banner) const {
- if (Options.PrintMachineCode)
- PM.add(createMachineFunctionPrinterPass(dbgs(), Banner));
-}
-
-void LLVMTargetMachine::printAndVerify(PassManagerBase &PM,
- const char *Banner) const {
- if (Options.PrintMachineCode)
- PM.add(createMachineFunctionPrinterPass(dbgs(), Banner));
-
- if (VerifyMachineCode)
- PM.add(createMachineVerifierPass(Banner));
-}
-
-/// addCommonCodeGenPasses - Add standard LLVM codegen passes used for both
-/// emitting to assembly files or machine code output.
-///
-bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM,
- bool DisableVerify,
- MCContext *&OutContext) {
- // Standard LLVM-Level Passes.
-
- // Basic AliasAnalysis support.
- // Add TypeBasedAliasAnalysis before BasicAliasAnalysis so that
- // BasicAliasAnalysis wins if they disagree. This is intended to help
- // support "obvious" type-punning idioms.
- PM.add(createTypeBasedAliasAnalysisPass());
- PM.add(createBasicAliasAnalysisPass());
-
- // Before running any passes, run the verifier to determine if the input
- // coming from the front-end and/or optimizer is valid.
- if (!DisableVerify)
- PM.add(createVerifierPass());
-
- // Run loop strength reduction before anything else.
- if (getOptLevel() != CodeGenOpt::None && !DisableLSR) {
- PM.add(createLoopStrengthReducePass(getTargetLowering()));
- if (PrintLSR)
- PM.add(createPrintFunctionPass("\n\n*** Code after LSR ***\n", &dbgs()));
- }
-
- PM.add(createGCLoweringPass());
-
- // Make sure that no unreachable blocks are instruction selected.
- PM.add(createUnreachableBlockEliminationPass());
-
- // Turn exception handling constructs into something the code generators can
- // handle.
- switch (getMCAsmInfo()->getExceptionHandlingType()) {
- case ExceptionHandling::SjLj:
- // SjLj piggy-backs on dwarf for this bit. The cleanups done apply to both
- // Dwarf EH prepare needs to be run after SjLj prepare. Otherwise,
- // catch info can get misplaced when a selector ends up more than one block
- // removed from the parent invoke(s). This could happen when a landing
- // pad is shared by multiple invokes and is also a target of a normal
- // edge from elsewhere.
- PM.add(createSjLjEHPass(getTargetLowering()));
- // FALLTHROUGH
- case ExceptionHandling::DwarfCFI:
- case ExceptionHandling::ARM:
- case ExceptionHandling::Win64:
- PM.add(createDwarfEHPass(this));
- break;
- case ExceptionHandling::None:
- PM.add(createLowerInvokePass(getTargetLowering()));
-
- // The lower invoke pass may create unreachable code. Remove it.
- PM.add(createUnreachableBlockEliminationPass());
- break;
- }
-
- if (getOptLevel() != CodeGenOpt::None && !DisableCGP)
- PM.add(createCodeGenPreparePass(getTargetLowering()));
-
- PM.add(createStackProtectorPass(getTargetLowering()));
-
- addPreISel(PM);
-
- if (PrintISelInput)
- PM.add(createPrintFunctionPass("\n\n"
- "*** Final LLVM Code input to ISel ***\n",
- &dbgs()));
-
- // All passes which modify the LLVM IR are now complete; run the verifier
- // to ensure that the IR is valid.
- if (!DisableVerify)
- PM.add(createVerifierPass());
-
- // Standard Lower-Level Passes.
-
- // Install a MachineModuleInfo class, which is an immutable pass that holds
- // all the per-module stuff we're generating, including MCContext.
- MachineModuleInfo *MMI = new MachineModuleInfo(*getMCAsmInfo(),
- *getRegisterInfo(),
- &getTargetLowering()->getObjFileLowering());
- PM.add(MMI);
- OutContext = &MMI->getContext(); // Return the MCContext specifically by-ref.
-
- // Set up a MachineFunction for the rest of CodeGen to work on.
- PM.add(new MachineFunctionAnalysis(*this));
-
- // Enable FastISel with -fast, but allow that to be overridden.
- if (EnableFastISelOption == cl::BOU_TRUE ||
- (getOptLevel() == CodeGenOpt::None &&
- EnableFastISelOption != cl::BOU_FALSE))
- Options.EnableFastISel = true;
-
- // Ask the target for an isel.
- if (addInstSelector(PM))
- return true;
-
- // Print the instruction selected machine code...
- printAndVerify(PM, "After Instruction Selection");
-
- // Expand pseudo-instructions emitted by ISel.
- PM.add(createExpandISelPseudosPass());
-
- // Pre-ra tail duplication.
- if (getOptLevel() != CodeGenOpt::None && !DisableEarlyTailDup) {
- PM.add(createTailDuplicatePass(true));
- printAndVerify(PM, "After Pre-RegAlloc TailDuplicate");
- }
-
- // Optimize PHIs before DCE: removing dead PHI cycles may make more
- // instructions dead.
- if (getOptLevel() != CodeGenOpt::None)
- PM.add(createOptimizePHIsPass());
-
- // If the target requests it, assign local variables to stack slots relative
- // to one another and simplify frame index references where possible.
- PM.add(createLocalStackSlotAllocationPass());
-
- if (getOptLevel() != CodeGenOpt::None) {
- // With optimization, dead code should already be eliminated. However
- // there is one known exception: lowered code for arguments that are only
- // used by tail calls, where the tail calls reuse the incoming stack
- // arguments directly (see t11 in test/CodeGen/X86/sibcall.ll).
- if (!DisableMachineDCE)
- PM.add(createDeadMachineInstructionElimPass());
- printAndVerify(PM, "After codegen DCE pass");
-
- if (!DisableMachineLICM)
- PM.add(createMachineLICMPass());
- if (!DisableMachineCSE)
- PM.add(createMachineCSEPass());
- if (!DisableMachineSink)
- PM.add(createMachineSinkingPass());
- printAndVerify(PM, "After Machine LICM, CSE and Sinking passes");
-
- PM.add(createPeepholeOptimizerPass());
- printAndVerify(PM, "After codegen peephole optimization pass");
- }
-
- // Run pre-ra passes.
- if (addPreRegAlloc(PM))
- printAndVerify(PM, "After PreRegAlloc passes");
-
- // Perform register allocation.
- PM.add(createRegisterAllocator(getOptLevel()));
- printAndVerify(PM, "After Register Allocation");
-
- // Perform stack slot coloring and post-ra machine LICM.
- if (getOptLevel() != CodeGenOpt::None) {
- // FIXME: Re-enable coloring with register when it's capable of adding
- // kill markers.
- if (!DisableSSC)
- PM.add(createStackSlotColoringPass(false));
-
- // Run post-ra machine LICM to hoist reloads / remats.
- if (!DisablePostRAMachineLICM)
- PM.add(createMachineLICMPass(false));
-
- printAndVerify(PM, "After StackSlotColoring and postra Machine LICM");
- }
-
- // Run post-ra passes.
- if (addPostRegAlloc(PM))
- printAndVerify(PM, "After PostRegAlloc passes");
-
- // Insert prolog/epilog code. Eliminate abstract frame index references...
- PM.add(createPrologEpilogCodeInserter());
- printAndVerify(PM, "After PrologEpilogCodeInserter");
-
- // Branch folding must be run after regalloc and prolog/epilog insertion.
- if (getOptLevel() != CodeGenOpt::None && !DisableBranchFold) {
- PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
- printNoVerify(PM, "After BranchFolding");
- }
-
- // Tail duplication.
- if (getOptLevel() != CodeGenOpt::None && !DisableTailDuplicate) {
- PM.add(createTailDuplicatePass(false));
- printNoVerify(PM, "After TailDuplicate");
- }
-
- // Copy propagation.
- if (getOptLevel() != CodeGenOpt::None) {
- PM.add(createMachineCopyPropagationPass());
- printNoVerify(PM, "After copy propagation pass");
- }
-
- // Expand pseudo instructions before second scheduling pass.
- PM.add(createExpandPostRAPseudosPass());
- printNoVerify(PM, "After ExpandPostRAPseudos");
-
- // Run pre-sched2 passes.
- if (addPreSched2(PM))
- printNoVerify(PM, "After PreSched2 passes");
-
- // Second pass scheduler.
- if (getOptLevel() != CodeGenOpt::None && !DisablePostRA) {
- PM.add(createPostRAScheduler(getOptLevel()));
- printNoVerify(PM, "After PostRAScheduler");
- }
-
- PM.add(createGCMachineCodeAnalysisPass());
-
- if (PrintGCInfo)
- PM.add(createGCInfoPrinter(dbgs()));
-
- if (getOptLevel() != CodeGenOpt::None && !DisableCodePlace) {
- if (EnableBlockPlacement) {
- // MachineBlockPlacement is an experimental pass which is disabled by
- // default currently. Eventually it should subsume CodePlacementOpt, so
- // when enabled, the other is disabled.
- PM.add(createMachineBlockPlacementPass());
- printNoVerify(PM, "After MachineBlockPlacement");
- } else {
- PM.add(createCodePlacementOptPass());
- printNoVerify(PM, "After CodePlacementOpt");
- }
-
- // Run a separate pass to collect block placement statistics.
- if (EnableBlockPlacementStats) {
- PM.add(createMachineBlockPlacementStatsPass());
- printNoVerify(PM, "After MachineBlockPlacementStats");
- }
- }
-
- if (addPreEmitPass(PM))
- printNoVerify(PM, "After PreEmit passes");
-
- return false;
-}