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[MISched] Explanatory error message when machine model is not complete. NFC
[oota-llvm.git]
/
lib
/
CodeGen
/
ExpandPostRAPseudos.cpp
diff --git
a/lib/CodeGen/ExpandPostRAPseudos.cpp
b/lib/CodeGen/ExpandPostRAPseudos.cpp
index 1611db8d91a397648b04b14d3a3f422fb090db6d..e7bf143b82eea681cfba5a0288e795a0494e445b 100644
(file)
--- a/
lib/CodeGen/ExpandPostRAPseudos.cpp
+++ b/
lib/CodeGen/ExpandPostRAPseudos.cpp
@@
-12,7
+12,6
@@
//
//===----------------------------------------------------------------------===//
//
//===----------------------------------------------------------------------===//
-#define DEBUG_TYPE "postrapseudos"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
@@
-21,10
+20,13
@@
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetInstrInfo.h"
-#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetRegisterInfo.h"
+#include "llvm/Target/TargetSubtargetInfo.h"
+
using namespace llvm;
using namespace llvm;
+#define DEBUG_TYPE "postrapseudos"
+
namespace {
struct ExpandPostRA : public MachineFunctionPass {
private:
namespace {
struct ExpandPostRA : public MachineFunctionPass {
private:
@@
-35,7
+37,7
@@
public:
static char ID; // Pass identification, replacement for typeid
ExpandPostRA() : MachineFunctionPass(ID) {}
static char ID; // Pass identification, replacement for typeid
ExpandPostRA() : MachineFunctionPass(ID) {}
- v
irtual void getAnalysisUsage(AnalysisUsage &AU) const
{
+ v
oid getAnalysisUsage(AnalysisUsage &AU) const override
{
AU.setPreservesCFG();
AU.addPreservedID(MachineLoopInfoID);
AU.addPreservedID(MachineDominatorsID);
AU.setPreservesCFG();
AU.addPreservedID(MachineLoopInfoID);
AU.addPreservedID(MachineDominatorsID);
@@
-43,7
+45,7
@@
public:
}
/// runOnMachineFunction - pass entry point
}
/// runOnMachineFunction - pass entry point
- bool runOnMachineFunction(MachineFunction&);
+ bool runOnMachineFunction(MachineFunction&)
override
;
private:
bool LowerSubregToReg(MachineInstr *MI);
private:
bool LowerSubregToReg(MachineInstr *MI);
@@
-104,7
+106,7
@@
bool ExpandPostRA::LowerSubregToReg(MachineInstr *MI) {
}
if (DstSubReg == InsReg) {
}
if (DstSubReg == InsReg) {
- // No need to insert an identi
f
y copy instruction.
+ // No need to insert an identi
t
y copy instruction.
// Watch out for case like this:
// %RAX<def> = SUBREG_TO_REG 0, %EAX<kill>, 3
// We must leave %RAX live.
// Watch out for case like this:
// %RAX<def> = SUBREG_TO_REG 0, %EAX<kill>, 3
// We must leave %RAX live.
@@
-181,8
+183,8
@@
bool ExpandPostRA::runOnMachineFunction(MachineFunction &MF) {
DEBUG(dbgs() << "Machine Function\n"
<< "********** EXPANDING POST-RA PSEUDO INSTRS **********\n"
<< "********** Function: " << MF.getName() << '\n');
DEBUG(dbgs() << "Machine Function\n"
<< "********** EXPANDING POST-RA PSEUDO INSTRS **********\n"
<< "********** Function: " << MF.getName() << '\n');
- TRI = MF.get
T
arget().getRegisterInfo();
- TII = MF.get
T
arget().getInstrInfo();
+ TRI = MF.get
Subt
arget().getRegisterInfo();
+ TII = MF.get
Subt
arget().getInstrInfo();
bool MadeChange = false;
bool MadeChange = false;