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[PM/AA] Remove the last relics of the separate IPA library from LLVM,
[oota-llvm.git]
/
lib
/
CodeGen
/
ExecutionDepsFix.cpp
diff --git
a/lib/CodeGen/ExecutionDepsFix.cpp
b/lib/CodeGen/ExecutionDepsFix.cpp
index 4793fba76069b6a22b64f113ac8e66867ed5f872..cbc3b80a6a5c130fae602ffda97aa0e18f0c1d89 100644
(file)
--- a/
lib/CodeGen/ExecutionDepsFix.cpp
+++ b/
lib/CodeGen/ExecutionDepsFix.cpp
@@
-113,7
+113,7
@@
struct DomainValue {
}
namespace {
}
namespace {
-///
LiveReg -
Information about a live register.
+/// Information about a live register.
struct LiveReg {
/// Value currently in this register, or NULL when no value is being tracked.
/// This counts as a DomainValue reference.
struct LiveReg {
/// Value currently in this register, or NULL when no value is being tracked.
/// This counts as a DomainValue reference.
@@
-125,7
+125,7
@@
struct LiveReg {
/// will be a negative number.
int Def;
};
/// will be a negative number.
int Def;
};
-} // anony
n
ous namespace
+} // anony
m
ous namespace
namespace {
class ExeDepsFix : public MachineFunctionPass {
namespace {
class ExeDepsFix : public MachineFunctionPass {
@@
-225,7
+225,7
@@
DomainValue *ExeDepsFix::alloc(int domain) {
return dv;
}
return dv;
}
-///
release -
Release a reference to DV. When the last reference is released,
+/// Release a reference to DV. When the last reference is released,
/// collapse if needed.
void ExeDepsFix::release(DomainValue *DV) {
while (DV) {
/// collapse if needed.
void ExeDepsFix::release(DomainValue *DV) {
while (DV) {
@@
-245,8
+245,8
@@
void ExeDepsFix::release(DomainValue *DV) {
}
}
}
}
-///
resolve - Follow the chain of dead DomainValues until a live DomainValue is
-///
reached.
Update the referenced pointer when necessary.
+///
Follow the chain of dead DomainValues until a live DomainValue is reached.
+/// Update the referenced pointer when necessary.
DomainValue *ExeDepsFix::resolve(DomainValue *&DVRef) {
DomainValue *DV = DVRef;
if (!DV || !DV->Next)
DomainValue *ExeDepsFix::resolve(DomainValue *&DVRef) {
DomainValue *DV = DVRef;
if (!DV || !DV->Next)
@@
-325,8
+325,7
@@
void ExeDepsFix::collapse(DomainValue *dv, unsigned domain) {
setLiveReg(rx, alloc(domain));
}
setLiveReg(rx, alloc(domain));
}
-/// Merge - All instructions and registers in B are moved to A, and B is
-/// released.
+/// All instructions and registers in B are moved to A, and B is released.
bool ExeDepsFix::merge(DomainValue *A, DomainValue *B) {
assert(!A->isCollapsed() && "Cannot merge into collapsed");
assert(!B->isCollapsed() && "Cannot merge from collapsed");
bool ExeDepsFix::merge(DomainValue *A, DomainValue *B) {
assert(!A->isCollapsed() && "Cannot merge into collapsed");
assert(!B->isCollapsed() && "Cannot merge from collapsed");
@@
-352,7
+351,7
@@
bool ExeDepsFix::merge(DomainValue *A, DomainValue *B) {
return true;
}
return true;
}
-//
enterBasicBlock -
Set up LiveRegs by merging predecessor live-out values.
+//
/
Set up LiveRegs by merging predecessor live-out values.
void ExeDepsFix::enterBasicBlock(MachineBasicBlock *MBB) {
// Detect back-edges from predecessors we haven't processed yet.
SeenUnknownBackEdge = false;
void ExeDepsFix::enterBasicBlock(MachineBasicBlock *MBB) {
// Detect back-edges from predecessors we haven't processed yet.
SeenUnknownBackEdge = false;
@@
-560,12
+559,11
@@
void ExeDepsFix::processUndefReads(MachineBasicBlock *MBB) {
MachineInstr *UndefMI = UndefReads.back().first;
unsigned OpIdx = UndefReads.back().second;
MachineInstr *UndefMI = UndefReads.back().first;
unsigned OpIdx = UndefReads.back().second;
- for (MachineBasicBlock::reverse_iterator I = MBB->rbegin(), E = MBB->rend();
- I != E; ++I) {
+ for (MachineInstr &I : make_range(MBB->rbegin(), MBB->rend())) {
// Update liveness, including the current instruction's defs.
// Update liveness, including the current instruction's defs.
- LiveRegSet.stepBackward(
*
I);
+ LiveRegSet.stepBackward(I);
- if (UndefMI == &
*
I) {
+ if (UndefMI == &I) {
if (!LiveRegSet.contains(UndefMI->getOperand(OpIdx).getReg()))
TII->breakPartialRegDependency(UndefMI, OpIdx, TRI);
if (!LiveRegSet.contains(UndefMI->getOperand(OpIdx).getReg()))
TII->breakPartialRegDependency(UndefMI, OpIdx, TRI);
@@
-734,12
+732,14
@@
bool ExeDepsFix::runOnMachineFunction(MachineFunction &mf) {
// If no relevant registers are used in the function, we can skip it
// completely.
bool anyregs = false;
// If no relevant registers are used in the function, we can skip it
// completely.
bool anyregs = false;
+ const MachineRegisterInfo &MRI = mf.getRegInfo();
for (TargetRegisterClass::const_iterator I = RC->begin(), E = RC->end();
for (TargetRegisterClass::const_iterator I = RC->begin(), E = RC->end();
- I != E; ++I)
- if (MF->getRegInfo().isPhysRegUsed(*I)) {
- anyregs = true;
- break;
- }
+ I != E && !anyregs; ++I)
+ for (MCRegAliasIterator AI(*I, TRI, true); AI.isValid(); ++AI)
+ if (!MRI.reg_nodbg_empty(*AI)) {
+ anyregs = true;
+ break;
+ }
if (!anyregs) return false;
// Initialize the AliasMap on the first use.
if (!anyregs) return false;
// Initialize the AliasMap on the first use.