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Taints the non-acquire RMW's store address with the load part
[oota-llvm.git]
/
include
/
llvm
/
CodeGen
/
SelectionDAGISel.h
diff --git
a/include/llvm/CodeGen/SelectionDAGISel.h
b/include/llvm/CodeGen/SelectionDAGISel.h
index d53e66da5a71c1a68fccab10633fa784fe417a0c..a011e4c338c4a15dcfc8f5b5b2da4042992ed8b8 100644
(file)
--- a/
include/llvm/CodeGen/SelectionDAGISel.h
+++ b/
include/llvm/CodeGen/SelectionDAGISel.h
@@
-58,7
+58,7
@@
public:
explicit SelectionDAGISel(TargetMachine &tm,
CodeGenOpt::Level OL = CodeGenOpt::Default);
explicit SelectionDAGISel(TargetMachine &tm,
CodeGenOpt::Level OL = CodeGenOpt::Default);
-
virtual ~SelectionDAGISel()
;
+
~SelectionDAGISel() override
;
const TargetLowering *getTargetLowering() const { return TLI; }
const TargetLowering *getTargetLowering() const { return TLI; }
@@
-80,12
+80,12
@@
public:
virtual SDNode *Select(SDNode *N) = 0;
/// SelectInlineAsmMemoryOperand - Select the specified address as a target
virtual SDNode *Select(SDNode *N) = 0;
/// SelectInlineAsmMemoryOperand - Select the specified address as a target
- /// addressing mode, according to the specified constraint
code
. If this does
+ /// addressing mode, according to the specified constraint. If this does
/// not match or is not implemented, return true. The resultant operands
/// (which will appear in the machine instruction) should be added to the
/// OutOps vector.
virtual bool SelectInlineAsmMemoryOperand(const SDValue &Op,
/// not match or is not implemented, return true. The resultant operands
/// (which will appear in the machine instruction) should be added to the
/// OutOps vector.
virtual bool SelectInlineAsmMemoryOperand(const SDValue &Op,
-
char ConstraintCode
,
+
unsigned ConstraintID
,
std::vector<SDValue> &OutOps) {
return true;
}
std::vector<SDValue> &OutOps) {
return true;
}
@@
-199,7
+199,7
@@
protected:
/// SelectInlineAsmMemoryOperands - Calls to this are automatically generated
/// by tblgen. Others should not call it.
/// SelectInlineAsmMemoryOperands - Calls to this are automatically generated
/// by tblgen. Others should not call it.
- void SelectInlineAsmMemoryOperands(std::vector<SDValue> &Ops);
+ void SelectInlineAsmMemoryOperands(std::vector<SDValue> &Ops
, SDLoc DL
);
public:
public:
@@
-260,7
+260,10
@@
private:
SDNode *MorphNode(SDNode *Node, unsigned TargetOpc, SDVTList VTs,
ArrayRef<SDValue> Ops, unsigned EmitNodeInfo);
SDNode *MorphNode(SDNode *Node, unsigned TargetOpc, SDVTList VTs,
ArrayRef<SDValue> Ops, unsigned EmitNodeInfo);
- void PrepareEHLandingPad();
+ /// Prepares the landing pad to take incoming values or do other EH
+ /// personality specific tasks. Returns true if the block should be
+ /// instruction selected, false if no code should be emitted for it.
+ bool PrepareEHLandingPad();
/// \brief Perform instruction selection on all basic blocks in the function.
void SelectAllBasicBlocks(const Function &Fn);
/// \brief Perform instruction selection on all basic blocks in the function.
void SelectAllBasicBlocks(const Function &Fn);