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clk: rockchip: rk3328: add pclk for acodec
[firefly-linux-kernel-4.4.55.git]
/
drivers
/
irqchip
/
irq-gic-common.c
diff --git
a/drivers/irqchip/irq-gic-common.c
b/drivers/irqchip/irq-gic-common.c
index 44a077f3a4a2627c03953d9650a66e7607dd91e2..f174ce0ca36115dc36feec5f047af7bf402e180a 100644
(file)
--- a/
drivers/irqchip/irq-gic-common.c
+++ b/
drivers/irqchip/irq-gic-common.c
@@
-84,12
+84,15
@@
void __init gic_dist_config(void __iomem *base, int gic_irqs,
writel_relaxed(GICD_INT_DEF_PRI_X4, base + GIC_DIST_PRI + i);
/*
writel_relaxed(GICD_INT_DEF_PRI_X4, base + GIC_DIST_PRI + i);
/*
- * D
isable all interrupts. Leave the PPI and SGIs alone
- * a
s they are enabled by redistributor registers
.
+ * D
eactivate and disable all SPIs. Leave the PPI and SGIs
+ * a
lone as they are in the redistributor registers on GICv3
.
*/
*/
- for (i = 32; i < gic_irqs; i += 32)
+ for (i = 32; i < gic_irqs; i += 32)
{
writel_relaxed(GICD_INT_EN_CLR_X32,
writel_relaxed(GICD_INT_EN_CLR_X32,
- base + GIC_DIST_ENABLE_CLEAR + i / 8);
+ base + GIC_DIST_ACTIVE_CLEAR + i / 8);
+ writel_relaxed(GICD_INT_EN_CLR_X32,
+ base + GIC_DIST_ENABLE_CLEAR + i / 8);
+ }
if (sync_access)
sync_access();
if (sync_access)
sync_access();
@@
-102,7
+105,9
@@
void gic_cpu_config(void __iomem *base, void (*sync_access)(void))
/*
* Deal with the banked PPI and SGI interrupts - disable all
* PPI interrupts, ensure all SGI interrupts are enabled.
/*
* Deal with the banked PPI and SGI interrupts - disable all
* PPI interrupts, ensure all SGI interrupts are enabled.
+ * Make sure everything is deactivated.
*/
*/
+ writel_relaxed(GICD_INT_EN_CLR_X32, base + GIC_DIST_ACTIVE_CLEAR);
writel_relaxed(GICD_INT_EN_CLR_PPI, base + GIC_DIST_ENABLE_CLEAR);
writel_relaxed(GICD_INT_EN_SET_SGI, base + GIC_DIST_ENABLE_SET);
writel_relaxed(GICD_INT_EN_CLR_PPI, base + GIC_DIST_ENABLE_CLEAR);
writel_relaxed(GICD_INT_EN_SET_SGI, base + GIC_DIST_ENABLE_SET);