allows it to describe a wide range of information conveniently and compactly.
The TableGen types are:</p>
allows it to describe a wide range of information conveniently and compactly.
The TableGen types are:</p>
<dd>A 'bits' type is an arbitrary, but fixed, size integer that is broken up
into individual bits. This type is useful because it can handle some bits
being defined while others are undefined.</dd>
<dd>A 'bits' type is an arbitrary, but fixed, size integer that is broken up
into individual bits. This type is useful because it can handle some bits
being defined while others are undefined.</dd>
<dd>This type represents a list whose elements are some other type. The
contained type is arbitrary: it can even be another list type.</dd>
<dd>This type represents a list whose elements are some other type. The
contained type is arbitrary: it can even be another list type.</dd>
<dd>Specifying a class name in a type context means that the defined value
must be a subclass of the specified class. This is useful in conjunction with
the <b><tt>list</tt></b> type, for example, to constrain the elements of the
list to a common base class (e.g., a <tt><b>list</b><Register></tt> can
only contain definitions derived from the "<tt>Register</tt>" class).</dd>
<dd>Specifying a class name in a type context means that the defined value
must be a subclass of the specified class. This is useful in conjunction with
the <b><tt>list</tt></b> type, for example, to constrain the elements of the
list to a common base class (e.g., a <tt><b>list</b><Register></tt> can
only contain definitions derived from the "<tt>Register</tt>" class).</dd>
<dd>This represents a big hunk of text. NOTE: I don't remember why this is
distinct from string!</dd>
</dl>
<dd>This represents a big hunk of text. NOTE: I don't remember why this is
distinct from string!</dd>
</dl>
<p>To date, these types have been sufficient for describing things that
TableGen has been used for, but it is straight-forward to extend this list if
<p>To date, these types have been sufficient for describing things that
TableGen has been used for, but it is straight-forward to extend this list if
<dd>A slice of the 'list' list, including elements 4,5,6,7,17,2, and 3 from
it. Elements may be included multiple times.</dd>
<dd>A slice of the 'list' list, including elements 4,5,6,7,17,2, and 3 from
it. Elements may be included multiple times.</dd>
<dd>a dag value. The first element is required to be a record definition, the
remaining elements in the list may be arbitrary other values, including nested
`<tt>dag</tt>' values.</dd>
<dd>a dag value. The first element is required to be a record definition, the
remaining elements in the list may be arbitrary other values, including nested
`<tt>dag</tt>' values.</dd>
<p>Note that all of the values have rules specifying how they convert to values
for different types. These rules allow you to assign a value like "<tt>7</tt>"
<p>Note that all of the values have rules specifying how they convert to values
for different types. These rules allow you to assign a value like "<tt>7</tt>"
end-user to factor out commonality from the records.</p>
<p>File-scope "let" expressions take a comma-separated list of bindings to
end-user to factor out commonality from the records.</p>
<p>File-scope "let" expressions take a comma-separated list of bindings to
<b>let</b> Defs = [EAX, ECX, EDX, FP0, FP1, FP2, FP3, FP4, FP5, FP6, ST0,
MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, EFLAGS] <b>in</b> {
<b>let</b> Defs = [EAX, ECX, EDX, FP0, FP1, FP2, FP3, FP4, FP5, FP6, ST0,
MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, EFLAGS] <b>in</b> {
- <b>def</b> CALLpcrel32 : Ii32<0xE8, RawFrm, (outs), (ins i32imm:$dst,variable_ops),
- "call\t${dst:call}", []>;
- <b>def</b> CALL32r : I<0xFF, MRM2r, (outs), (ins GR32:$dst, variable_ops),
- "call\t{*}$dst", [(X86call GR32:$dst)]>;
- <b>def</b> CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst, variable_ops),
- "call\t{*}$dst", []>;
+ <b>def</b> CALLpcrel32 : Ii32<0xE8, RawFrm, (outs), (ins i32imm:$dst,variable_ops),
+ "call\t${dst:call}", []>;
+ <b>def</b> CALL32r : I<0xFF, MRM2r, (outs), (ins GR32:$dst, variable_ops),
+ "call\t{*}$dst", [(X86call GR32:$dst)]>;
+ <b>def</b> CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst, variable_ops),
+ "call\t{*}$dst", []>;
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<a href="mailto:sabre@nondot.org">Chris Lattner</a><br>
<a href="http://llvm.org">LLVM Compiler Infrastructure</a><br>
<a href="mailto:sabre@nondot.org">Chris Lattner</a><br>
<a href="http://llvm.org">LLVM Compiler Infrastructure</a><br>