projects
/
oota-llvm.git
/ blobdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
raw
|
inline
| side by side
MIRParser/LLVMBuild.txt: Add MC for MCRegisterInfo::getDwarfRegNum().
[oota-llvm.git]
/
CREDITS.TXT
diff --git
a/CREDITS.TXT
b/CREDITS.TXT
index bf32a4c565bb560a634aacafc7cdadc04d912a6a..da1fb010e35b8892a88249f8e2de6760b83ed68b 100644
(file)
--- a/
CREDITS.TXT
+++ b/
CREDITS.TXT
@@
-5,8
+5,8
@@
done!
The list is sorted by surname and formatted to allow easy grepping and
beautification by scripts. The fields are: name (N), email (E), web-address
The list is sorted by surname and formatted to allow easy grepping and
beautification by scripts. The fields are: name (N), email (E), web-address
-(W), PGP key ID and fingerprint (P), description (D),
and
snail-mail address
-(S).
+(W), PGP key ID and fingerprint (P), description (D), snail-mail address
+(S)
, and (I) IRC handle
.
N: Vikram Adve
N: Vikram Adve
@@
-17,11
+17,15
@@
D: The Sparc64 backend, provider of much wisdom, and motivator for LLVM
N: Owen Anderson
E: resistor@mac.com
D: LCSSA pass and related LoopUnswitch work
N: Owen Anderson
E: resistor@mac.com
D: LCSSA pass and related LoopUnswitch work
-D: GVNPRE pass,
TargetData
refactoring, random improvements
+D: GVNPRE pass,
DataLayout
refactoring, random improvements
N: Henrik Bach
D: MingW Win32 API portability layer
N: Henrik Bach
D: MingW Win32 API portability layer
+N: Aaron Ballman
+E: aaron@aaronballman.com
+D: __declspec attributes, Windows support, general bug fixing
+
N: Nate Begeman
E: natebegeman@mac.com
D: PowerPC backend developer
N: Nate Begeman
E: natebegeman@mac.com
D: PowerPC backend developer
@@
-56,9
+60,11
@@
D: Loop unrolling with run-time trip counts.
N: Chandler Carruth
E: chandlerc@gmail.com
N: Chandler Carruth
E: chandlerc@gmail.com
+E: chandlerc@google.com
D: Hashing algorithms and interfaces
D: Inline cost analysis
D: Machine block placement pass
D: Hashing algorithms and interfaces
D: Inline cost analysis
D: Machine block placement pass
+D: SROA
N: Casey Carter
E: ccarter@uiuc.edu
N: Casey Carter
E: ccarter@uiuc.edu
@@
-94,13
+100,17
@@
E: adasgupt@codeaurora.org
D: Deterministic finite automaton based infrastructure for VLIW packetization
N: Stefanus Du Toit
D: Deterministic finite automaton based infrastructure for VLIW packetization
N: Stefanus Du Toit
-E: stefanus.du
toit@rapidmind
.com
+E: stefanus.du
.toit@intel
.com
D: Bug fixes and minor improvements
N: Rafael Avila de Espindola
E: rafael.espindola@gmail.com
D: The ARM backend
D: Bug fixes and minor improvements
N: Rafael Avila de Espindola
E: rafael.espindola@gmail.com
D: The ARM backend
+N: Dave Estes
+E: cestes@codeaurora.org
+D: AArch64 machine description for Cortex-A53
+
N: Alkis Evlogimenos
E: alkis@evlogimenos.com
D: Linear scan register allocator, many codegen improvements, Java frontend
N: Alkis Evlogimenos
E: alkis@evlogimenos.com
D: Linear scan register allocator, many codegen improvements, Java frontend
@@
-109,6
+119,10
@@
N: Hal Finkel
E: hfinkel@anl.gov
D: Basic-block autovectorization, PowerPC backend improvements
E: hfinkel@anl.gov
D: Basic-block autovectorization, PowerPC backend improvements
+N: Eric Fiselier
+E: eric@efcs.ca
+D: LIT patches and documentation.
+
N: Ryan Flynn
E: pizza@parseerror.com
D: Miscellaneous bug fixes
N: Ryan Flynn
E: pizza@parseerror.com
D: Miscellaneous bug fixes
@@
-126,6
+140,7
@@
W: http://www-src.lip6.fr/homepages/Nicolas.Geoffray/
D: PPC backend fixes for Linux
N: Louis Gerbarg
D: PPC backend fixes for Linux
N: Louis Gerbarg
+E: lgg@apple.com
D: Portions of the PowerPC backend
N: Saem Ghani
D: Portions of the PowerPC backend
N: Saem Ghani
@@
-137,8
+152,9
@@
E: foldr@codedgers.com
D: Author of llvmc2
N: Dan Gohman
D: Author of llvmc2
N: Dan Gohman
-E:
gohman@apple
.com
+E:
sunfish@mozilla
.com
D: Miscellaneous bug fixes
D: Miscellaneous bug fixes
+D: WebAssembly Backend
N: David Goodwin
E: david@goodwinz.net
N: David Goodwin
E: david@goodwinz.net
@@
-155,10
+171,12
@@
D: Improvements for space efficiency
N: James Grosbach
E: grosbach@apple.com
N: James Grosbach
E: grosbach@apple.com
+I: grosbach
D: SjLj exception handling support
D: General fixes and improvements for the ARM back-end
D: MCJIT
D: ARM integrated assembler and assembly parser
D: SjLj exception handling support
D: General fixes and improvements for the ARM back-end
D: MCJIT
D: ARM integrated assembler and assembly parser
+D: Led effort for the backend formerly known as ARM64
N: Lang Hames
E: lhames@gmail.com
N: Lang Hames
E: lhames@gmail.com
@@
-245,6
+263,13
@@
D: The initial llvm-ar tool, converted regression testsuite to dejagnu
D: Modulo scheduling in the SparcV9 backend
D: Release manager (1.7+)
D: Modulo scheduling in the SparcV9 backend
D: Release manager (1.7+)
+N: Sylvestre Ledru
+E: sylvestre@debian.org
+W: http://sylvestre.ledru.info/
+W: http://llvm.org/apt/
+D: Debian and Ubuntu packaging
+D: Continuous integration with jenkins
+
N: Andrew Lenharth
E: alenhar2@cs.uiuc.edu
W: http://www.lenharth.org/~andrewl/
N: Andrew Lenharth
E: alenhar2@cs.uiuc.edu
W: http://www.lenharth.org/~andrewl/
@@
-261,8
+286,11
@@
D: Backend for Qualcomm's Hexagon VLIW processor.
N: Bruno Cardoso Lopes
E: bruno.cardoso@gmail.com
N: Bruno Cardoso Lopes
E: bruno.cardoso@gmail.com
-W: http://www.brunocardoso.org
-D: The Mips backend
+I: bruno
+W: http://brunocardoso.cc
+D: Mips backend
+D: Random ARM integrated assembler and assembly parser improvements
+D: General X86 AVX1 support
N: Duraid Madina
E: duraid@octopus.com.au
N: Duraid Madina
E: duraid@octopus.com.au
@@
-288,6
+316,7
@@
D: Added STI Cell SPU backend.
N: Kai Nacke
E: kai@redstar.de
D: Support for implicit TLS model used with MS VC runtime
N: Kai Nacke
E: kai@redstar.de
D: Support for implicit TLS model used with MS VC runtime
+D: Dumping of Win64 EH structures
N: Takumi Nakamura
E: geek4civic@gmail.com
N: Takumi Nakamura
E: geek4civic@gmail.com
@@
-324,9
+353,9
@@
D: LTO tool, PassManager rewrite, Loop Pass Manager, Loop Rotate
D: GCC PCH Integration (llvm-gcc), llvm-gcc improvements
D: Optimizer improvements, Loop Index Split
D: GCC PCH Integration (llvm-gcc), llvm-gcc improvements
D: Optimizer improvements, Loop Index Split
-N:
Sandeep Patel
-E:
deeppatel1987@gmail.com
-D:
ARM calling conventions rewrite, hard float support
+N:
Ana Pazos
+E:
apazos@codeaurora.org
+D:
Fixes and improvements to the AArch64 backend
N: Wesley Peck
E: peckw@wesleypeck.com
N: Wesley Peck
E: peckw@wesleypeck.com
@@
-342,18
+371,29
@@
W: http://vladimir_prus.blogspot.com
E: ghost@cs.msu.su
D: Made inst_iterator behave like a proper iterator, LowerConstantExprs pass
E: ghost@cs.msu.su
D: Made inst_iterator behave like a proper iterator, LowerConstantExprs pass
+N: Kalle Raiskila
+E: kalle.rasikila@nokia.com
+D: Some bugfixes to CellSPU
+
N: Xerxes Ranby
E: xerxes@zafena.se
D: Cmake dependency chain and various bug fixes
N: Xerxes Ranby
E: xerxes@zafena.se
D: Cmake dependency chain and various bug fixes
+N: Alex Rosenberg
+E: alexr@leftfield.org
+I: arosenberg
+D: ARM calling conventions rewrite, hard float support
+
N: Chad Rosier
N: Chad Rosier
-E: mcrosier@apple.com
-D: ARM fast-isel improvements
-D: Performance monitoring
+E: mcrosier@codeaurora.org
+I: mcrosier
+D: AArch64 fast instruction selection pass
+D: Fixes and improvements to the ARM fast-isel pass
+D: Fixes and improvements to the AArch64 backend
N: Nadav Rotem
N: Nadav Rotem
-E: n
adav.rotem@intel
.com
-D:
Vector code generation improvements
.
+E: n
rotem@apple
.com
+D:
X86 code generation improvements, Loop Vectorizer
.
N: Roman Samoilov
E: roman@codedgers.com
N: Roman Samoilov
E: roman@codedgers.com
@@
-361,6
+401,7
@@
D: MSIL backend
N: Duncan Sands
E: baldrick@free.fr
N: Duncan Sands
E: baldrick@free.fr
+I: baldrick
D: Ada support in llvm-gcc
D: Dragonegg plugin
D: Exception handling improvements
D: Ada support in llvm-gcc
D: Dragonegg plugin
D: Exception handling improvements
@@
-392,6
+433,15
@@
E: rspencer@reidspencer.com
W: http://reidspencer.com/
D: Lots of stuff, see: http://wiki.llvm.org/index.php/User:Reid
W: http://reidspencer.com/
D: Lots of stuff, see: http://wiki.llvm.org/index.php/User:Reid
+N: Alp Toker
+E: alp@nuanti.com
+W: http://atoker.com/
+D: C++ frontend next generation standards implementation
+
+N: Craig Topper
+E: craig.topper@gmail.com
+D: X86 codegen and disassembler improvements. AVX2 support.
+
N: Edwin Torok
E: edwintorok@gmail.com
D: Miscellaneous bug fixes
N: Edwin Torok
E: edwintorok@gmail.com
D: Miscellaneous bug fixes
@@
-406,10
+456,12
@@
D: ARM backend improvements
D: Thread Local Storage implementation
N: Bill Wendling
D: Thread Local Storage implementation
N: Bill Wendling
-E: wendling@apple.com
-D: Exception handling
+I: wendling
+E: isanbard@gmail.com
+D: Release manager, IR Linker, LTO
D: Bunches of stuff
N: Bob Wilson
E: bob.wilson@acm.org
D: Bunches of stuff
N: Bob Wilson
E: bob.wilson@acm.org
-D: Advanced SIMD (NEON) support in the ARM backend
+D: Advanced SIMD (NEON) support in the ARM backend.
+