Model CONCAT_VECTORS of two 64-bit values as a REG_SEQUENCE.
[oota-llvm.git] / utils / valgrind / register_pass.supp
1 {
2    False leak under RegisterPass
3    Memcheck:Leak
4    ...
5    fun:_ZN83_GLOBAL_*PassRegistrar12RegisterPassERKN4llvm8PassInfoE
6    fun:_ZN4llvm8PassInfo12registerPassEv
7 }