1 //===- TableGen.cpp - Top-Level TableGen implementation -------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // TableGen is a tool which can be used to build up a description of something,
11 // then invoke one or more "tablegen backends" to emit information about the
12 // description in some predefined format. In practice, this is used by the LLVM
13 // code generators to automate generation of a code generator through a
14 // high-level description of the target.
16 //===----------------------------------------------------------------------===//
20 #include "llvm/Support/CommandLine.h"
21 #include "llvm/Support/Streams.h"
22 #include "llvm/System/Signals.h"
23 #include "llvm/Support/FileUtilities.h"
24 #include "llvm/Support/MemoryBuffer.h"
25 #include "CallingConvEmitter.h"
26 #include "CodeEmitterGen.h"
27 #include "RegisterInfoEmitter.h"
28 #include "InstrInfoEmitter.h"
29 #include "AsmWriterEmitter.h"
30 #include "DAGISelEmitter.h"
31 #include "SubtargetEmitter.h"
32 #include "IntrinsicEmitter.h"
42 GenRegisterEnums, GenRegister, GenRegisterHeader,
43 GenInstrEnums, GenInstrs, GenAsmWriter,
53 Action(cl::desc("Action to perform:"),
54 cl::values(clEnumValN(PrintRecords, "print-records",
55 "Print all records to stdout (default)"),
56 clEnumValN(GenEmitter, "gen-emitter",
57 "Generate machine code emitter"),
58 clEnumValN(GenRegisterEnums, "gen-register-enums",
59 "Generate enum values for registers"),
60 clEnumValN(GenRegister, "gen-register-desc",
61 "Generate a register info description"),
62 clEnumValN(GenRegisterHeader, "gen-register-desc-header",
63 "Generate a register info description header"),
64 clEnumValN(GenInstrEnums, "gen-instr-enums",
65 "Generate enum values for instructions"),
66 clEnumValN(GenInstrs, "gen-instr-desc",
67 "Generate instruction descriptions"),
68 clEnumValN(GenCallingConv, "gen-callingconv",
69 "Generate calling convention descriptions"),
70 clEnumValN(GenAsmWriter, "gen-asm-writer",
71 "Generate assembly writer"),
72 clEnumValN(GenDAGISel, "gen-dag-isel",
73 "Generate a DAG instruction selector"),
74 clEnumValN(GenSubtarget, "gen-subtarget",
75 "Generate subtarget enumerations"),
76 clEnumValN(GenIntrinsic, "gen-intrinsic",
77 "Generate intrinsic information"),
78 clEnumValN(PrintEnums, "print-enums",
79 "Print enum values for a class"),
83 Class("class", cl::desc("Print Enum list for this class"),
84 cl::value_desc("class name"));
87 OutputFilename("o", cl::desc("Output filename"), cl::value_desc("filename"),
91 InputFilename(cl::Positional, cl::desc("<input file>"), cl::init("-"));
94 IncludeDirs("I", cl::desc("Directory of include files"),
95 cl::value_desc("directory"), cl::Prefix);
98 RecordKeeper llvm::Records;
100 /// ParseFile - this function begins the parsing of the specified tablegen
102 static bool ParseFile(const std::string &Filename,
103 const std::vector<std::string> &IncludeDirs) {
104 std::string ErrorStr;
105 MemoryBuffer *F = MemoryBuffer::getFileOrSTDIN(&Filename[0], Filename.size(),
108 cerr << "Could not open input file '" + Filename + "': " << ErrorStr <<"\n";
114 // Record the location of the include directory so that the lexer can find
116 Parser.setIncludeDirs(IncludeDirs);
118 return Parser.ParseFile();
121 int main(int argc, char **argv) {
122 cl::ParseCommandLineOptions(argc, argv);
124 // Parse the input file.
125 if (ParseFile(InputFilename, IncludeDirs))
128 std::ostream *Out = cout.stream();
129 if (OutputFilename != "-") {
130 Out = new std::ofstream(OutputFilename.c_str());
133 cerr << argv[0] << ": error opening " << OutputFilename << "!\n";
137 // Make sure the file gets removed if *gasp* tablegen crashes...
138 sys::RemoveFileOnSignal(sys::Path(OutputFilename));
144 *Out << Records; // No argument, dump all contents
147 CodeEmitterGen(Records).run(*Out);
150 case GenRegisterEnums:
151 RegisterInfoEmitter(Records).runEnums(*Out);
154 RegisterInfoEmitter(Records).run(*Out);
156 case GenRegisterHeader:
157 RegisterInfoEmitter(Records).runHeader(*Out);
161 InstrInfoEmitter(Records).runEnums(*Out);
164 InstrInfoEmitter(Records).run(*Out);
167 CallingConvEmitter(Records).run(*Out);
170 AsmWriterEmitter(Records).run(*Out);
174 DAGISelEmitter(Records).run(*Out);
177 SubtargetEmitter(Records).run(*Out);
180 IntrinsicEmitter(Records).run(*Out);
184 std::vector<Record*> Recs = Records.getAllDerivedDefinitions(Class);
185 for (unsigned i = 0, e = Recs.size(); i != e; ++i)
186 *Out << Recs[i]->getName() << ", ";
191 assert(1 && "Invalid Action");
194 } catch (const std::string &Error) {
195 cerr << argv[0] << ": " << Error << "\n";
196 if (Out != cout.stream()) {
197 delete Out; // Close the file
198 std::remove(OutputFilename.c_str()); // Remove the file, it's broken
202 cerr << argv[0] << ": Unknown unexpected exception occurred.\n";
203 if (Out != cout.stream()) {
204 delete Out; // Close the file
205 std::remove(OutputFilename.c_str()); // Remove the file, it's broken
210 if (Out != cout.stream()) {
211 delete Out; // Close the file