1 //===- RegisterInfoEmitter.cpp - Generate a Register File Desc. -*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This tablegen backend is responsible for emitting a description of a target
11 // register file for a code generator. It uses instances of the Register,
12 // RegisterAliases, and RegisterClass classes to gather this information.
14 //===----------------------------------------------------------------------===//
16 #include "RegisterInfoEmitter.h"
17 #include "CodeGenTarget.h"
18 #include "CodeGenRegisters.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/ADT/STLExtras.h"
25 // runEnums - Print out enum values for all of the registers.
26 void RegisterInfoEmitter::runEnums(std::ostream &OS) {
28 const std::vector<CodeGenRegister> &Registers = Target.getRegisters();
30 std::string Namespace = Registers[0].TheDef->getValueAsString("Namespace");
32 EmitSourceFileHeader("Target Register Enum Values", OS);
33 OS << "namespace llvm {\n\n";
35 if (!Namespace.empty())
36 OS << "namespace " << Namespace << " {\n";
37 OS << " enum {\n NoRegister,\n";
39 for (unsigned i = 0, e = Registers.size(); i != e; ++i)
40 OS << " " << Registers[i].getName() << (i != (e-1) ? ", \t// " : " \t// ") << i+1 << "\n";
43 if (!Namespace.empty())
45 OS << "} // End llvm namespace \n";
48 void RegisterInfoEmitter::runHeader(std::ostream &OS) {
49 EmitSourceFileHeader("Register Information Header Fragment", OS);
51 const std::string &TargetName = Target.getName();
52 std::string ClassName = TargetName + "GenRegisterInfo";
54 OS << "#include \"llvm/Target/MRegisterInfo.h\"\n";
55 OS << "#include <string>\n\n";
57 OS << "namespace llvm {\n\n";
59 OS << "struct " << ClassName << " : public MRegisterInfo {\n"
61 << "(int CallFrameSetupOpcode = -1, int CallFrameDestroyOpcode = -1);\n"
62 << " int getDwarfRegNum(unsigned RegNum) const;\n"
65 const std::vector<CodeGenRegisterClass> &RegisterClasses =
66 Target.getRegisterClasses();
68 if (!RegisterClasses.empty()) {
69 OS << "namespace " << RegisterClasses[0].Namespace
70 << " { // Register classes\n";
73 for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) {
75 OS << " " << RegisterClasses[i].getName() << "RegClassID";
80 for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) {
81 const std::string &Name = RegisterClasses[i].getName();
83 // Output the register class definition.
84 OS << " struct " << Name << "Class : public TargetRegisterClass {\n"
85 << " " << Name << "Class();\n"
86 << RegisterClasses[i].MethodProtos << " };\n";
88 // Output the extern for the instance.
89 OS << " extern " << Name << "Class\t" << Name << "RegClass;\n";
90 // Output the extern for the pointer to the instance (should remove).
91 OS << " static TargetRegisterClass * const "<< Name <<"RegisterClass = &"
92 << Name << "RegClass;\n";
94 OS << "} // end of namespace " << TargetName << "\n\n";
96 OS << "} // End llvm namespace \n";
99 bool isSubRegisterClass(const CodeGenRegisterClass &RC,
100 std::set<Record*> &RegSet) {
101 for (unsigned i = 0, e = RC.Elements.size(); i != e; ++i) {
102 Record *Reg = RC.Elements[i];
103 if (!RegSet.count(Reg))
109 // RegisterInfoEmitter::run - Main register file description emitter.
111 void RegisterInfoEmitter::run(std::ostream &OS) {
112 CodeGenTarget Target;
113 EmitSourceFileHeader("Register Information Source Fragment", OS);
115 OS << "namespace llvm {\n\n";
117 // Start out by emitting each of the register classes... to do this, we build
118 // a set of registers which belong to a register class, this is to ensure that
119 // each register is only in a single register class.
121 const std::vector<CodeGenRegisterClass> &RegisterClasses =
122 Target.getRegisterClasses();
124 // Loop over all of the register classes... emitting each one.
125 OS << "namespace { // Register classes...\n";
127 // RegClassesBelongedTo - Keep track of which register classes each reg
129 std::multimap<Record*, const CodeGenRegisterClass*> RegClassesBelongedTo;
131 // Emit the register enum value arrays for each RegisterClass
132 for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) {
133 const CodeGenRegisterClass &RC = RegisterClasses[rc];
135 // Give the register class a legal C name if it's anonymous.
136 std::string Name = RC.TheDef->getName();
138 // Emit the register list now.
139 OS << " // " << Name << " Register Class...\n"
140 << " static const unsigned " << Name
142 for (unsigned i = 0, e = RC.Elements.size(); i != e; ++i) {
143 Record *Reg = RC.Elements[i];
144 OS << getQualifiedName(Reg) << ", ";
146 // Keep track of which regclasses this register is in.
147 RegClassesBelongedTo.insert(std::make_pair(Reg, &RC));
152 // Emit the ValueType arrays for each RegisterClass
153 for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) {
154 const CodeGenRegisterClass &RC = RegisterClasses[rc];
156 // Give the register class a legal C name if it's anonymous.
157 std::string Name = RC.TheDef->getName() + "VTs";
159 // Emit the register list now.
161 << " Register Class Value Types...\n"
162 << " static const MVT::ValueType " << Name
164 for (unsigned i = 0, e = RC.VTs.size(); i != e; ++i)
165 OS << RC.VTs[i] << ", ";
166 OS << "MVT::Other\n };\n\n";
168 OS << "} // end anonymous namespace\n\n";
170 // Now that all of the structs have been emitted, emit the instances.
171 if (!RegisterClasses.empty()) {
172 OS << "namespace " << RegisterClasses[0].Namespace
173 << " { // Register class instances\n";
174 for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i)
175 OS << " " << RegisterClasses[i].getName() << "Class\t"
176 << RegisterClasses[i].getName() << "RegClass;\n";
178 std::map<unsigned, std::set<unsigned> > SuperClassMap;
180 // Emit the sub-classes array for each RegisterClass
181 for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) {
182 const CodeGenRegisterClass &RC = RegisterClasses[rc];
184 // Give the register class a legal C name if it's anonymous.
185 std::string Name = RC.TheDef->getName();
187 std::set<Record*> RegSet;
188 for (unsigned i = 0, e = RC.Elements.size(); i != e; ++i) {
189 Record *Reg = RC.Elements[i];
194 << " Register Class sub-classes...\n"
195 << " static const TargetRegisterClass* const "
196 << Name << "Subclasses [] = {\n ";
199 for (unsigned rc2 = 0, e2 = RegisterClasses.size(); rc2 != e2; ++rc2) {
200 const CodeGenRegisterClass &RC2 = RegisterClasses[rc2];
201 if (rc == rc2 || RC2.Elements.size() > RC.Elements.size() ||
202 RC.SpillSize != RC2.SpillSize || !isSubRegisterClass(RC2, RegSet))
205 if (!Empty) OS << ", ";
206 OS << "&" << getQualifiedName(RC2.TheDef) << "RegClass";
209 std::map<unsigned, std::set<unsigned> >::iterator SCMI =
210 SuperClassMap.find(rc2);
211 if (SCMI == SuperClassMap.end()) {
212 SuperClassMap.insert(std::make_pair(rc2, std::set<unsigned>()));
213 SCMI = SuperClassMap.find(rc2);
215 SCMI->second.insert(rc);
218 OS << (!Empty ? ", " : "") << "NULL";
222 for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) {
223 const CodeGenRegisterClass &RC = RegisterClasses[rc];
225 // Give the register class a legal C name if it's anonymous.
226 std::string Name = RC.TheDef->getName();
229 << " Register Class super-classes...\n"
230 << " static const TargetRegisterClass* const "
231 << Name << "Superclasses [] = {\n ";
234 std::map<unsigned, std::set<unsigned> >::iterator I =
235 SuperClassMap.find(rc);
236 if (I != SuperClassMap.end()) {
237 for (std::set<unsigned>::iterator II = I->second.begin(),
238 EE = I->second.end(); II != EE; ++II) {
239 const CodeGenRegisterClass &RC2 = RegisterClasses[*II];
240 if (!Empty) OS << ", ";
241 OS << "&" << getQualifiedName(RC2.TheDef) << "RegClass";
246 OS << (!Empty ? ", " : "") << "NULL";
251 for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) {
252 const CodeGenRegisterClass &RC = RegisterClasses[i];
253 OS << RC.MethodBodies << "\n";
254 OS << RC.getName() << "Class::" << RC.getName()
255 << "Class() : TargetRegisterClass("
256 << RC.getName() + "RegClassID" << ", "
257 << RC.getName() + "VTs" << ", "
258 << RC.getName() + "Subclasses" << ", "
259 << RC.getName() + "Superclasses" << ", "
260 << RC.SpillSize/8 << ", "
261 << RC.SpillAlignment/8 << ", " << RC.getName() << ", "
262 << RC.getName() << " + " << RC.Elements.size() << ") {}\n";
268 OS << "\nnamespace {\n";
269 OS << " const TargetRegisterClass* const RegisterClasses[] = {\n";
270 for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i)
271 OS << " &" << getQualifiedName(RegisterClasses[i].TheDef)
275 // Emit register class aliases...
276 std::map<Record*, std::set<Record*> > RegisterAliases;
277 const std::vector<CodeGenRegister> &Regs = Target.getRegisters();
279 for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
280 Record *R = Regs[i].TheDef;
281 std::vector<Record*> LI = Regs[i].TheDef->getValueAsListOfDefs("Aliases");
282 // Add information that R aliases all of the elements in the list... and
283 // that everything in the list aliases R.
284 for (unsigned j = 0, e = LI.size(); j != e; ++j) {
286 if (RegisterAliases[R].count(Reg))
287 std::cerr << "Warning: register alias between " << getQualifiedName(R)
288 << " and " << getQualifiedName(Reg)
289 << " specified multiple times!\n";
290 RegisterAliases[R].insert(Reg);
292 if (RegisterAliases[Reg].count(R))
293 std::cerr << "Warning: register alias between " << getQualifiedName(R)
294 << " and " << getQualifiedName(Reg)
295 << " specified multiple times!\n";
296 RegisterAliases[Reg].insert(R);
300 if (!RegisterAliases.empty())
301 OS << "\n\n // Register Alias Sets...\n";
303 // Emit the empty alias list
304 OS << " const unsigned Empty_AliasSet[] = { 0 };\n";
305 // Loop over all of the registers which have aliases, emitting the alias list
307 for (std::map<Record*, std::set<Record*> >::iterator
308 I = RegisterAliases.begin(), E = RegisterAliases.end(); I != E; ++I) {
309 OS << " const unsigned " << I->first->getName() << "_AliasSet[] = { ";
310 for (std::set<Record*>::iterator ASI = I->second.begin(),
311 E = I->second.end(); ASI != E; ++ASI)
312 OS << getQualifiedName(*ASI) << ", ";
316 OS<<"\n const TargetRegisterDesc RegisterDescriptors[] = { // Descriptors\n";
317 OS << " { \"NOREG\",\t0 },\n";
320 // Now that register alias sets have been emitted, emit the register
322 const std::vector<CodeGenRegister> &Registers = Target.getRegisters();
323 for (unsigned i = 0, e = Registers.size(); i != e; ++i) {
324 const CodeGenRegister &Reg = Registers[i];
326 if (!Reg.TheDef->getValueAsString("Name").empty())
327 OS << Reg.TheDef->getValueAsString("Name");
331 if (RegisterAliases.count(Reg.TheDef))
332 OS << Reg.getName() << "_AliasSet },\n";
334 OS << "Empty_AliasSet },\n";
336 OS << " };\n"; // End of register descriptors...
337 OS << "}\n\n"; // End of anonymous namespace...
339 std::string ClassName = Target.getName() + "GenRegisterInfo";
341 // Emit the constructor of the class...
342 OS << ClassName << "::" << ClassName
343 << "(int CallFrameSetupOpcode, int CallFrameDestroyOpcode)\n"
344 << " : MRegisterInfo(RegisterDescriptors, " << Registers.size()+1
345 << ", RegisterClasses, RegisterClasses+" << RegisterClasses.size() <<",\n "
346 << " CallFrameSetupOpcode, CallFrameDestroyOpcode) {}\n\n";
348 // Emit information about the dwarf register numbers.
349 OS << "int " << ClassName << "::getDwarfRegNum(unsigned RegNum) const {\n";
350 OS << " static const int DwarfRegNums[] = { -1, // NoRegister";
351 for (unsigned i = 0, e = Registers.size(); i != e; ++i) {
352 if (!(i % 16)) OS << "\n ";
353 const CodeGenRegister &Reg = Registers[i];
354 int DwarfRegNum = Reg.TheDef->getValueAsInt("DwarfNumber");
356 if ((i + 1) != e) OS << ", ";
359 OS << " assert(RegNum < (sizeof(DwarfRegNums)/sizeof(int)) &&\n";
360 OS << " \"RegNum exceeds number of registers\");\n";
361 OS << " return DwarfRegNums[RegNum];\n";
364 OS << "} // End llvm namespace \n";