1 //===- CodeGenTarget.h - Target Class Wrapper -------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines wrappers for the Target class and related global
11 // functionality. This makes it easier to access the data and provides a single
12 // place that needs to check it for validity. All of these classes throw
13 // exceptions on error conditions.
15 //===----------------------------------------------------------------------===//
17 #ifndef CODEGEN_TARGET_H
18 #define CODEGEN_TARGET_H
20 #include "CodeGenRegisters.h"
21 #include "CodeGenInstruction.h"
29 struct CodeGenRegister;
32 // SelectionDAG node properties.
33 enum SDNP { SDNPCommutative, SDNPAssociative, SDNPHasChain,
34 SDNPOutFlag, SDNPInFlag, SDNPOptInFlag };
36 /// getValueType - Return the MVT::ValueType that the specified TableGen record
38 MVT::ValueType getValueType(Record *Rec);
40 std::string getName(MVT::ValueType T);
41 std::string getEnumName(MVT::ValueType T);
43 /// getQualifiedName - Return the name of the specified record, with a
44 /// namespace qualifier if the record contains one.
45 std::string getQualifiedName(const Record *R);
47 /// CodeGenTarget - This class corresponds to the Target class in the .td files.
52 mutable std::map<std::string, CodeGenInstruction> Instructions;
53 mutable std::vector<CodeGenRegister> Registers;
54 mutable std::vector<CodeGenRegisterClass> RegisterClasses;
55 mutable std::vector<MVT::ValueType> LegalValueTypes;
56 void ReadRegisters() const;
57 void ReadRegisterClasses() const;
58 void ReadInstructions() const;
59 void ReadLegalValueTypes() const;
63 Record *getTargetRecord() const { return TargetRec; }
64 const std::string &getName() const;
66 /// getInstructionSet - Return the InstructionSet object.
68 Record *getInstructionSet() const;
70 /// getAsmWriter - Return the AssemblyWriter definition for this target.
72 Record *getAsmWriter() const;
74 const std::vector<CodeGenRegister> &getRegisters() const {
75 if (Registers.empty()) ReadRegisters();
79 const std::vector<CodeGenRegisterClass> &getRegisterClasses() const {
80 if (RegisterClasses.empty()) ReadRegisterClasses();
81 return RegisterClasses;
84 const CodeGenRegisterClass &getRegisterClass(Record *R) const {
85 const std::vector<CodeGenRegisterClass> &RC = getRegisterClasses();
86 for (unsigned i = 0, e = RC.size(); i != e; ++i)
87 if (RC[i].TheDef == R)
89 assert(0 && "Didn't find the register class");
93 /// getRegisterClassForRegister - Find the register class that contains the
94 /// specified physical register. If there register exists in multiple
95 /// register classes or is not in a register class, return null.
96 const CodeGenRegisterClass *getRegisterClassForRegister(Record *R) const {
97 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
98 const CodeGenRegisterClass *FoundRC = 0;
99 for (unsigned i = 0, e = RCs.size(); i != e; ++i) {
100 const CodeGenRegisterClass &RC = RegisterClasses[i];
101 for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) {
102 if (R == RC.Elements[ei]) {
103 if (FoundRC) return 0; // In multiple RC's
112 /// getRegisterVTs - Find the union of all possible ValueTypes for the
113 /// specified physical register.
114 std::vector<unsigned char> getRegisterVTs(Record *R) const;
116 const std::vector<MVT::ValueType> &getLegalValueTypes() const {
117 if (LegalValueTypes.empty()) ReadLegalValueTypes();
118 return LegalValueTypes;
121 /// isLegalValueType - Return true if the specified value type is natively
122 /// supported by the target (i.e. there are registers that directly hold it).
123 bool isLegalValueType(MVT::ValueType VT) const {
124 const std::vector<MVT::ValueType> &LegalVTs = getLegalValueTypes();
125 for (unsigned i = 0, e = LegalVTs.size(); i != e; ++i)
126 if (LegalVTs[i] == VT) return true;
130 /// getInstructions - Return all of the instructions defined for this target.
132 const std::map<std::string, CodeGenInstruction> &getInstructions() const {
133 if (Instructions.empty()) ReadInstructions();
137 CodeGenInstruction &getInstruction(const std::string &Name) const {
138 const std::map<std::string, CodeGenInstruction> &Insts = getInstructions();
139 assert(Insts.count(Name) && "Not an instruction!");
140 return const_cast<CodeGenInstruction&>(Insts.find(Name)->second);
143 typedef std::map<std::string,
144 CodeGenInstruction>::const_iterator inst_iterator;
145 inst_iterator inst_begin() const { return getInstructions().begin(); }
146 inst_iterator inst_end() const { return Instructions.end(); }
148 /// getInstructionsByEnumValue - Return all of the instructions defined by the
149 /// target, ordered by their enum value.
150 void getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
151 &NumberedInstructions);
154 /// isLittleEndianEncoding - are instruction bit patterns defined as [0..n]?
156 bool isLittleEndianEncoding() const;
159 /// ComplexPattern - ComplexPattern info, corresponding to the ComplexPattern
160 /// tablegen class in TargetSelectionDAG.td
161 class ComplexPattern {
163 unsigned NumOperands;
164 std::string SelectFunc;
165 std::vector<Record*> RootNodes;
168 ComplexPattern() : NumOperands(0) {};
169 ComplexPattern(Record *R);
171 MVT::ValueType getValueType() const { return Ty; }
172 unsigned getNumOperands() const { return NumOperands; }
173 const std::string &getSelectFunc() const { return SelectFunc; }
174 const std::vector<Record*> &getRootNodes() const {
177 bool hasProperty(enum SDNP Prop) const { return Properties & (1 << Prop); }
181 } // End llvm namespace