1 //===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This class wraps target description classes used by the various code
11 // generation TableGen backends. This makes it easier to access the data and
12 // provides a single place that needs to check it for validity. All of these
13 // classes throw exceptions on error conditions.
15 //===----------------------------------------------------------------------===//
17 #include "CodeGenTarget.h"
18 #include "CodeGenIntrinsics.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/Support/CommandLine.h"
25 static cl::opt<unsigned>
26 AsmWriterNum("asmwriternum", cl::init(0),
27 cl::desc("Make -gen-asm-writer emit assembly writer #N"));
29 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
30 /// record corresponds to.
31 MVT::SimpleValueType llvm::getValueType(Record *Rec) {
32 return (MVT::SimpleValueType)Rec->getValueAsInt("Value");
35 std::string llvm::getName(MVT::SimpleValueType T) {
37 case MVT::Other: return "UNKNOWN";
38 case MVT::iPTR: return "TLI.getPointerTy()";
39 case MVT::iPTRAny: return "TLI.getPointerTy()";
40 default: return getEnumName(T);
44 std::string llvm::getEnumName(MVT::SimpleValueType T) {
46 case MVT::Other: return "MVT::Other";
47 case MVT::i1: return "MVT::i1";
48 case MVT::i8: return "MVT::i8";
49 case MVT::i16: return "MVT::i16";
50 case MVT::i32: return "MVT::i32";
51 case MVT::i64: return "MVT::i64";
52 case MVT::i128: return "MVT::i128";
53 case MVT::iAny: return "MVT::iAny";
54 case MVT::fAny: return "MVT::fAny";
55 case MVT::f32: return "MVT::f32";
56 case MVT::f64: return "MVT::f64";
57 case MVT::f80: return "MVT::f80";
58 case MVT::f128: return "MVT::f128";
59 case MVT::ppcf128: return "MVT::ppcf128";
60 case MVT::Flag: return "MVT::Flag";
61 case MVT::isVoid:return "MVT::isVoid";
62 case MVT::v2i8: return "MVT::v2i8";
63 case MVT::v4i8: return "MVT::v4i8";
64 case MVT::v8i8: return "MVT::v8i8";
65 case MVT::v16i8: return "MVT::v16i8";
66 case MVT::v32i8: return "MVT::v32i8";
67 case MVT::v2i16: return "MVT::v2i16";
68 case MVT::v4i16: return "MVT::v4i16";
69 case MVT::v8i16: return "MVT::v8i16";
70 case MVT::v16i16: return "MVT::v16i16";
71 case MVT::v2i32: return "MVT::v2i32";
72 case MVT::v4i32: return "MVT::v4i32";
73 case MVT::v8i32: return "MVT::v8i32";
74 case MVT::v1i64: return "MVT::v1i64";
75 case MVT::v2i64: return "MVT::v2i64";
76 case MVT::v4i64: return "MVT::v4i64";
77 case MVT::v2f32: return "MVT::v2f32";
78 case MVT::v4f32: return "MVT::v4f32";
79 case MVT::v8f32: return "MVT::v8f32";
80 case MVT::v2f64: return "MVT::v2f64";
81 case MVT::v4f64: return "MVT::v4f64";
82 case MVT::Metadata: return "MVT::Metadata";
83 case MVT::iPTR: return "MVT::iPTR";
84 case MVT::iPTRAny: return "MVT::iPTRAny";
85 default: assert(0 && "ILLEGAL VALUE TYPE!"); return "";
89 /// getQualifiedName - Return the name of the specified record, with a
90 /// namespace qualifier if the record contains one.
92 std::string llvm::getQualifiedName(const Record *R) {
93 std::string Namespace = R->getValueAsString("Namespace");
94 if (Namespace.empty()) return R->getName();
95 return Namespace + "::" + R->getName();
101 /// getTarget - Return the current instance of the Target class.
103 CodeGenTarget::CodeGenTarget() {
104 std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target");
105 if (Targets.size() == 0)
106 throw std::string("ERROR: No 'Target' subclasses defined!");
107 if (Targets.size() != 1)
108 throw std::string("ERROR: Multiple subclasses of Target defined!");
109 TargetRec = Targets[0];
113 const std::string &CodeGenTarget::getName() const {
114 return TargetRec->getName();
117 std::string CodeGenTarget::getInstNamespace() const {
120 for (inst_iterator i = inst_begin(), e = inst_end(); i != e; ++i) {
121 InstNS = i->second.Namespace;
123 // Make sure not to pick up "TargetInstrInfo" by accidentally getting
124 // the namespace off the PHI instruction or something.
125 if (InstNS != "TargetInstrInfo")
132 Record *CodeGenTarget::getInstructionSet() const {
133 return TargetRec->getValueAsDef("InstructionSet");
136 /// getAsmWriter - Return the AssemblyWriter definition for this target.
138 Record *CodeGenTarget::getAsmWriter() const {
139 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters");
140 if (AsmWriterNum >= LI.size())
141 throw "Target does not have an AsmWriter #" + utostr(AsmWriterNum) + "!";
142 return LI[AsmWriterNum];
145 void CodeGenTarget::ReadRegisters() const {
146 std::vector<Record*> Regs = Records.getAllDerivedDefinitions("Register");
148 throw std::string("No 'Register' subclasses defined!");
150 Registers.reserve(Regs.size());
151 Registers.assign(Regs.begin(), Regs.end());
154 CodeGenRegister::CodeGenRegister(Record *R) : TheDef(R) {
155 DeclaredSpillSize = R->getValueAsInt("SpillSize");
156 DeclaredSpillAlignment = R->getValueAsInt("SpillAlignment");
159 const std::string &CodeGenRegister::getName() const {
160 return TheDef->getName();
163 void CodeGenTarget::ReadRegisterClasses() const {
164 std::vector<Record*> RegClasses =
165 Records.getAllDerivedDefinitions("RegisterClass");
166 if (RegClasses.empty())
167 throw std::string("No 'RegisterClass' subclasses defined!");
169 RegisterClasses.reserve(RegClasses.size());
170 RegisterClasses.assign(RegClasses.begin(), RegClasses.end());
173 std::vector<unsigned char> CodeGenTarget::getRegisterVTs(Record *R) const {
174 std::vector<unsigned char> Result;
175 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
176 for (unsigned i = 0, e = RCs.size(); i != e; ++i) {
177 const CodeGenRegisterClass &RC = RegisterClasses[i];
178 for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) {
179 if (R == RC.Elements[ei]) {
180 const std::vector<MVT::SimpleValueType> &InVTs = RC.getValueTypes();
181 for (unsigned i = 0, e = InVTs.size(); i != e; ++i)
182 Result.push_back(InVTs[i]);
190 CodeGenRegisterClass::CodeGenRegisterClass(Record *R) : TheDef(R) {
191 // Rename anonymous register classes.
192 if (R->getName().size() > 9 && R->getName()[9] == '.') {
193 static unsigned AnonCounter = 0;
194 R->setName("AnonRegClass_"+utostr(AnonCounter++));
197 std::vector<Record*> TypeList = R->getValueAsListOfDefs("RegTypes");
198 for (unsigned i = 0, e = TypeList.size(); i != e; ++i) {
199 Record *Type = TypeList[i];
200 if (!Type->isSubClassOf("ValueType"))
201 throw "RegTypes list member '" + Type->getName() +
202 "' does not derive from the ValueType class!";
203 VTs.push_back(getValueType(Type));
205 assert(!VTs.empty() && "RegisterClass must contain at least one ValueType!");
207 std::vector<Record*> RegList = R->getValueAsListOfDefs("MemberList");
208 for (unsigned i = 0, e = RegList.size(); i != e; ++i) {
209 Record *Reg = RegList[i];
210 if (!Reg->isSubClassOf("Register"))
211 throw "Register Class member '" + Reg->getName() +
212 "' does not derive from the Register class!";
213 Elements.push_back(Reg);
216 std::vector<Record*> SubRegClassList =
217 R->getValueAsListOfDefs("SubRegClassList");
218 for (unsigned i = 0, e = SubRegClassList.size(); i != e; ++i) {
219 Record *SubRegClass = SubRegClassList[i];
220 if (!SubRegClass->isSubClassOf("RegisterClass"))
221 throw "Register Class member '" + SubRegClass->getName() +
222 "' does not derive from the RegisterClass class!";
223 SubRegClasses.push_back(SubRegClass);
226 // Allow targets to override the size in bits of the RegisterClass.
227 unsigned Size = R->getValueAsInt("Size");
229 Namespace = R->getValueAsString("Namespace");
230 SpillSize = Size ? Size : MVT(VTs[0]).getSizeInBits();
231 SpillAlignment = R->getValueAsInt("Alignment");
232 CopyCost = R->getValueAsInt("CopyCost");
233 MethodBodies = R->getValueAsCode("MethodBodies");
234 MethodProtos = R->getValueAsCode("MethodProtos");
237 const std::string &CodeGenRegisterClass::getName() const {
238 return TheDef->getName();
241 void CodeGenTarget::ReadLegalValueTypes() const {
242 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
243 for (unsigned i = 0, e = RCs.size(); i != e; ++i)
244 for (unsigned ri = 0, re = RCs[i].VTs.size(); ri != re; ++ri)
245 LegalValueTypes.push_back(RCs[i].VTs[ri]);
247 // Remove duplicates.
248 std::sort(LegalValueTypes.begin(), LegalValueTypes.end());
249 LegalValueTypes.erase(std::unique(LegalValueTypes.begin(),
250 LegalValueTypes.end()),
251 LegalValueTypes.end());
255 void CodeGenTarget::ReadInstructions() const {
256 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
257 if (Insts.size() <= 2)
258 throw std::string("No 'Instruction' subclasses defined!");
260 // Parse the instructions defined in the .td file.
261 std::string InstFormatName =
262 getAsmWriter()->getValueAsString("InstFormatName");
264 for (unsigned i = 0, e = Insts.size(); i != e; ++i) {
265 std::string AsmStr = Insts[i]->getValueAsString(InstFormatName);
266 Instructions.insert(std::make_pair(Insts[i]->getName(),
267 CodeGenInstruction(Insts[i], AsmStr)));
271 /// getInstructionsByEnumValue - Return all of the instructions defined by the
272 /// target, ordered by their enum value.
274 getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
275 &NumberedInstructions) {
276 std::map<std::string, CodeGenInstruction>::const_iterator I;
277 I = getInstructions().find("PHI");
278 if (I == Instructions.end()) throw "Could not find 'PHI' instruction!";
279 const CodeGenInstruction *PHI = &I->second;
281 I = getInstructions().find("INLINEASM");
282 if (I == Instructions.end()) throw "Could not find 'INLINEASM' instruction!";
283 const CodeGenInstruction *INLINEASM = &I->second;
285 I = getInstructions().find("DBG_LABEL");
286 if (I == Instructions.end()) throw "Could not find 'DBG_LABEL' instruction!";
287 const CodeGenInstruction *DBG_LABEL = &I->second;
289 I = getInstructions().find("EH_LABEL");
290 if (I == Instructions.end()) throw "Could not find 'EH_LABEL' instruction!";
291 const CodeGenInstruction *EH_LABEL = &I->second;
293 I = getInstructions().find("GC_LABEL");
294 if (I == Instructions.end()) throw "Could not find 'GC_LABEL' instruction!";
295 const CodeGenInstruction *GC_LABEL = &I->second;
297 I = getInstructions().find("DECLARE");
298 if (I == Instructions.end()) throw "Could not find 'DECLARE' instruction!";
299 const CodeGenInstruction *DECLARE = &I->second;
301 I = getInstructions().find("EXTRACT_SUBREG");
302 if (I == Instructions.end())
303 throw "Could not find 'EXTRACT_SUBREG' instruction!";
304 const CodeGenInstruction *EXTRACT_SUBREG = &I->second;
306 I = getInstructions().find("INSERT_SUBREG");
307 if (I == Instructions.end())
308 throw "Could not find 'INSERT_SUBREG' instruction!";
309 const CodeGenInstruction *INSERT_SUBREG = &I->second;
311 I = getInstructions().find("IMPLICIT_DEF");
312 if (I == Instructions.end())
313 throw "Could not find 'IMPLICIT_DEF' instruction!";
314 const CodeGenInstruction *IMPLICIT_DEF = &I->second;
316 I = getInstructions().find("SUBREG_TO_REG");
317 if (I == Instructions.end())
318 throw "Could not find 'SUBREG_TO_REG' instruction!";
319 const CodeGenInstruction *SUBREG_TO_REG = &I->second;
321 I = getInstructions().find("COPY_TO_REGCLASS");
322 if (I == Instructions.end())
323 throw "Could not find 'COPY_TO_REGCLASS' instruction!";
324 const CodeGenInstruction *COPY_TO_REGCLASS = &I->second;
326 // Print out the rest of the instructions now.
327 NumberedInstructions.push_back(PHI);
328 NumberedInstructions.push_back(INLINEASM);
329 NumberedInstructions.push_back(DBG_LABEL);
330 NumberedInstructions.push_back(EH_LABEL);
331 NumberedInstructions.push_back(GC_LABEL);
332 NumberedInstructions.push_back(DECLARE);
333 NumberedInstructions.push_back(EXTRACT_SUBREG);
334 NumberedInstructions.push_back(INSERT_SUBREG);
335 NumberedInstructions.push_back(IMPLICIT_DEF);
336 NumberedInstructions.push_back(SUBREG_TO_REG);
337 NumberedInstructions.push_back(COPY_TO_REGCLASS);
338 for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II)
339 if (&II->second != PHI &&
340 &II->second != INLINEASM &&
341 &II->second != DBG_LABEL &&
342 &II->second != EH_LABEL &&
343 &II->second != GC_LABEL &&
344 &II->second != DECLARE &&
345 &II->second != EXTRACT_SUBREG &&
346 &II->second != INSERT_SUBREG &&
347 &II->second != IMPLICIT_DEF &&
348 &II->second != SUBREG_TO_REG &&
349 &II->second != COPY_TO_REGCLASS)
350 NumberedInstructions.push_back(&II->second);
354 /// isLittleEndianEncoding - Return whether this target encodes its instruction
355 /// in little-endian format, i.e. bits laid out in the order [0..n]
357 bool CodeGenTarget::isLittleEndianEncoding() const {
358 return getInstructionSet()->getValueAsBit("isLittleEndianEncoding");
361 //===----------------------------------------------------------------------===//
362 // ComplexPattern implementation
364 ComplexPattern::ComplexPattern(Record *R) {
365 Ty = ::getValueType(R->getValueAsDef("Ty"));
366 NumOperands = R->getValueAsInt("NumOperands");
367 SelectFunc = R->getValueAsString("SelectFunc");
368 RootNodes = R->getValueAsListOfDefs("RootNodes");
370 // Parse the properties.
372 std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties");
373 for (unsigned i = 0, e = PropList.size(); i != e; ++i)
374 if (PropList[i]->getName() == "SDNPHasChain") {
375 Properties |= 1 << SDNPHasChain;
376 } else if (PropList[i]->getName() == "SDNPOptInFlag") {
377 Properties |= 1 << SDNPOptInFlag;
378 } else if (PropList[i]->getName() == "SDNPMayStore") {
379 Properties |= 1 << SDNPMayStore;
380 } else if (PropList[i]->getName() == "SDNPMayLoad") {
381 Properties |= 1 << SDNPMayLoad;
382 } else if (PropList[i]->getName() == "SDNPSideEffect") {
383 Properties |= 1 << SDNPSideEffect;
384 } else if (PropList[i]->getName() == "SDNPMemOperand") {
385 Properties |= 1 << SDNPMemOperand;
387 errs() << "Unsupported SD Node property '" << PropList[i]->getName()
388 << "' on ComplexPattern '" << R->getName() << "'!\n";
392 // Parse the attributes.
394 PropList = R->getValueAsListOfDefs("Attributes");
395 for (unsigned i = 0, e = PropList.size(); i != e; ++i)
396 if (PropList[i]->getName() == "CPAttrParentAsRoot") {
397 Attributes |= 1 << CPAttrParentAsRoot;
399 errs() << "Unsupported pattern attribute '" << PropList[i]->getName()
400 << "' on ComplexPattern '" << R->getName() << "'!\n";
405 //===----------------------------------------------------------------------===//
406 // CodeGenIntrinsic Implementation
407 //===----------------------------------------------------------------------===//
409 std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC,
411 std::vector<Record*> I = RC.getAllDerivedDefinitions("Intrinsic");
413 std::vector<CodeGenIntrinsic> Result;
415 for (unsigned i = 0, e = I.size(); i != e; ++i) {
416 bool isTarget = I[i]->getValueAsBit("isTarget");
417 if (isTarget == TargetOnly)
418 Result.push_back(CodeGenIntrinsic(I[i]));
423 CodeGenIntrinsic::CodeGenIntrinsic(Record *R) {
425 std::string DefName = R->getName();
427 isOverloaded = false;
428 isCommutative = false;
430 if (DefName.size() <= 4 ||
431 std::string(DefName.begin(), DefName.begin() + 4) != "int_")
432 throw "Intrinsic '" + DefName + "' does not start with 'int_'!";
434 EnumName = std::string(DefName.begin()+4, DefName.end());
436 if (R->getValue("GCCBuiltinName")) // Ignore a missing GCCBuiltinName field.
437 GCCBuiltinName = R->getValueAsString("GCCBuiltinName");
439 TargetPrefix = R->getValueAsString("TargetPrefix");
440 Name = R->getValueAsString("LLVMName");
443 // If an explicit name isn't specified, derive one from the DefName.
446 for (unsigned i = 0, e = EnumName.size(); i != e; ++i)
447 Name += (EnumName[i] == '_') ? '.' : EnumName[i];
449 // Verify it starts with "llvm.".
450 if (Name.size() <= 5 ||
451 std::string(Name.begin(), Name.begin() + 5) != "llvm.")
452 throw "Intrinsic '" + DefName + "'s name does not start with 'llvm.'!";
455 // If TargetPrefix is specified, make sure that Name starts with
456 // "llvm.<targetprefix>.".
457 if (!TargetPrefix.empty()) {
458 if (Name.size() < 6+TargetPrefix.size() ||
459 std::string(Name.begin() + 5, Name.begin() + 6 + TargetPrefix.size())
460 != (TargetPrefix + "."))
461 throw "Intrinsic '" + DefName + "' does not start with 'llvm." +
462 TargetPrefix + ".'!";
465 // Parse the list of return types.
466 std::vector<MVT::SimpleValueType> OverloadedVTs;
467 ListInit *TypeList = R->getValueAsListInit("RetTypes");
468 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
469 Record *TyEl = TypeList->getElementAsRecord(i);
470 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
471 MVT::SimpleValueType VT;
472 if (TyEl->isSubClassOf("LLVMMatchType")) {
473 unsigned MatchTy = TyEl->getValueAsInt("Number");
474 assert(MatchTy < OverloadedVTs.size() &&
475 "Invalid matching number!");
476 VT = OverloadedVTs[MatchTy];
477 // It only makes sense to use the extended and truncated vector element
478 // variants with iAny types; otherwise, if the intrinsic is not
479 // overloaded, all the types can be specified directly.
480 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") &&
481 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) ||
482 VT == MVT::iAny) && "Expected iAny type");
484 VT = getValueType(TyEl->getValueAsDef("VT"));
486 if (VT == MVT::iAny || VT == MVT::fAny || VT == MVT::iPTRAny) {
487 OverloadedVTs.push_back(VT);
488 isOverloaded |= true;
490 IS.RetVTs.push_back(VT);
491 IS.RetTypeDefs.push_back(TyEl);
494 if (IS.RetVTs.size() == 0)
495 throw "Intrinsic '"+DefName+"' needs at least a type for the ret value!";
497 // Parse the list of parameter types.
498 TypeList = R->getValueAsListInit("ParamTypes");
499 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
500 Record *TyEl = TypeList->getElementAsRecord(i);
501 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
502 MVT::SimpleValueType VT;
503 if (TyEl->isSubClassOf("LLVMMatchType")) {
504 unsigned MatchTy = TyEl->getValueAsInt("Number");
505 assert(MatchTy < OverloadedVTs.size() &&
506 "Invalid matching number!");
507 VT = OverloadedVTs[MatchTy];
508 // It only makes sense to use the extended and truncated vector element
509 // variants with iAny types; otherwise, if the intrinsic is not
510 // overloaded, all the types can be specified directly.
511 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") &&
512 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) ||
513 VT == MVT::iAny) && "Expected iAny type");
515 VT = getValueType(TyEl->getValueAsDef("VT"));
516 if (VT == MVT::iAny || VT == MVT::fAny || VT == MVT::iPTRAny) {
517 OverloadedVTs.push_back(VT);
518 isOverloaded |= true;
520 IS.ParamVTs.push_back(VT);
521 IS.ParamTypeDefs.push_back(TyEl);
524 // Parse the intrinsic properties.
525 ListInit *PropList = R->getValueAsListInit("Properties");
526 for (unsigned i = 0, e = PropList->getSize(); i != e; ++i) {
527 Record *Property = PropList->getElementAsRecord(i);
528 assert(Property->isSubClassOf("IntrinsicProperty") &&
529 "Expected a property!");
531 if (Property->getName() == "IntrNoMem")
533 else if (Property->getName() == "IntrReadArgMem")
535 else if (Property->getName() == "IntrReadMem")
537 else if (Property->getName() == "IntrWriteArgMem")
538 ModRef = WriteArgMem;
539 else if (Property->getName() == "IntrWriteMem")
541 else if (Property->getName() == "Commutative")
542 isCommutative = true;
543 else if (Property->isSubClassOf("NoCapture")) {
544 unsigned ArgNo = Property->getValueAsInt("ArgNo");
545 ArgumentAttributes.push_back(std::make_pair(ArgNo, NoCapture));
547 assert(0 && "Unknown property!");