1 //===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This class wraps target description classes used by the various code
11 // generation TableGen backends. This makes it easier to access the data and
12 // provides a single place that needs to check it for validity. All of these
13 // classes abort on error conditions.
15 //===----------------------------------------------------------------------===//
17 #include "CodeGenTarget.h"
18 #include "CodeGenIntrinsics.h"
19 #include "CodeGenSchedule.h"
20 #include "llvm/ADT/STLExtras.h"
21 #include "llvm/ADT/StringExtras.h"
22 #include "llvm/Support/CommandLine.h"
23 #include "llvm/TableGen/Error.h"
24 #include "llvm/TableGen/Record.h"
28 static cl::opt<unsigned>
29 AsmParserNum("asmparsernum", cl::init(0),
30 cl::desc("Make -gen-asm-parser emit assembly parser #N"));
32 static cl::opt<unsigned>
33 AsmWriterNum("asmwriternum", cl::init(0),
34 cl::desc("Make -gen-asm-writer emit assembly writer #N"));
36 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
37 /// record corresponds to.
38 MVT::SimpleValueType llvm::getValueType(Record *Rec) {
39 return (MVT::SimpleValueType)Rec->getValueAsInt("Value");
42 std::string llvm::getName(MVT::SimpleValueType T) {
44 case MVT::Other: return "UNKNOWN";
45 case MVT::iPTR: return "TLI.getPointerTy()";
46 case MVT::iPTRAny: return "TLI.getPointerTy()";
47 default: return getEnumName(T);
51 std::string llvm::getEnumName(MVT::SimpleValueType T) {
53 case MVT::Other: return "MVT::Other";
54 case MVT::i1: return "MVT::i1";
55 case MVT::i8: return "MVT::i8";
56 case MVT::i16: return "MVT::i16";
57 case MVT::i32: return "MVT::i32";
58 case MVT::i64: return "MVT::i64";
59 case MVT::i128: return "MVT::i128";
60 case MVT::Any: return "MVT::Any";
61 case MVT::iAny: return "MVT::iAny";
62 case MVT::fAny: return "MVT::fAny";
63 case MVT::vAny: return "MVT::vAny";
64 case MVT::f16: return "MVT::f16";
65 case MVT::f32: return "MVT::f32";
66 case MVT::f64: return "MVT::f64";
67 case MVT::f80: return "MVT::f80";
68 case MVT::f128: return "MVT::f128";
69 case MVT::ppcf128: return "MVT::ppcf128";
70 case MVT::x86mmx: return "MVT::x86mmx";
71 case MVT::Glue: return "MVT::Glue";
72 case MVT::isVoid: return "MVT::isVoid";
73 case MVT::v2i1: return "MVT::v2i1";
74 case MVT::v4i1: return "MVT::v4i1";
75 case MVT::v8i1: return "MVT::v8i1";
76 case MVT::v16i1: return "MVT::v16i1";
77 case MVT::v32i1: return "MVT::v32i1";
78 case MVT::v64i1: return "MVT::v64i1";
79 case MVT::v1i8: return "MVT::v1i8";
80 case MVT::v2i8: return "MVT::v2i8";
81 case MVT::v4i8: return "MVT::v4i8";
82 case MVT::v8i8: return "MVT::v8i8";
83 case MVT::v16i8: return "MVT::v16i8";
84 case MVT::v32i8: return "MVT::v32i8";
85 case MVT::v64i8: return "MVT::v64i8";
86 case MVT::v1i16: return "MVT::v1i16";
87 case MVT::v2i16: return "MVT::v2i16";
88 case MVT::v4i16: return "MVT::v4i16";
89 case MVT::v8i16: return "MVT::v8i16";
90 case MVT::v16i16: return "MVT::v16i16";
91 case MVT::v32i16: return "MVT::v32i16";
92 case MVT::v1i32: return "MVT::v1i32";
93 case MVT::v2i32: return "MVT::v2i32";
94 case MVT::v4i32: return "MVT::v4i32";
95 case MVT::v8i32: return "MVT::v8i32";
96 case MVT::v16i32: return "MVT::v16i32";
97 case MVT::v1i64: return "MVT::v1i64";
98 case MVT::v2i64: return "MVT::v2i64";
99 case MVT::v4i64: return "MVT::v4i64";
100 case MVT::v8i64: return "MVT::v8i64";
101 case MVT::v16i64: return "MVT::v16i64";
102 case MVT::v1i128: return "MVT::v1i128";
103 case MVT::v2f16: return "MVT::v2f16";
104 case MVT::v4f16: return "MVT::v4f16";
105 case MVT::v8f16: return "MVT::v8f16";
106 case MVT::v1f32: return "MVT::v1f32";
107 case MVT::v2f32: return "MVT::v2f32";
108 case MVT::v4f32: return "MVT::v4f32";
109 case MVT::v8f32: return "MVT::v8f32";
110 case MVT::v16f32: return "MVT::v16f32";
111 case MVT::v1f64: return "MVT::v1f64";
112 case MVT::v2f64: return "MVT::v2f64";
113 case MVT::v4f64: return "MVT::v4f64";
114 case MVT::v8f64: return "MVT::v8f64";
115 case MVT::Metadata: return "MVT::Metadata";
116 case MVT::iPTR: return "MVT::iPTR";
117 case MVT::iPTRAny: return "MVT::iPTRAny";
118 case MVT::Untyped: return "MVT::Untyped";
119 default: llvm_unreachable("ILLEGAL VALUE TYPE!");
123 /// getQualifiedName - Return the name of the specified record, with a
124 /// namespace qualifier if the record contains one.
126 std::string llvm::getQualifiedName(const Record *R) {
127 std::string Namespace;
128 if (R->getValue("Namespace"))
129 Namespace = R->getValueAsString("Namespace");
130 if (Namespace.empty()) return R->getName();
131 return Namespace + "::" + R->getName();
135 /// getTarget - Return the current instance of the Target class.
137 CodeGenTarget::CodeGenTarget(RecordKeeper &records)
139 std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target");
140 if (Targets.size() == 0)
141 PrintFatalError("ERROR: No 'Target' subclasses defined!");
142 if (Targets.size() != 1)
143 PrintFatalError("ERROR: Multiple subclasses of Target defined!");
144 TargetRec = Targets[0];
147 CodeGenTarget::~CodeGenTarget() {
150 const std::string &CodeGenTarget::getName() const {
151 return TargetRec->getName();
154 std::string CodeGenTarget::getInstNamespace() const {
155 for (const CodeGenInstruction *Inst : instructions()) {
156 // Make sure not to pick up "TargetOpcode" by accidentally getting
157 // the namespace off the PHI instruction or something.
158 if (Inst->Namespace != "TargetOpcode")
159 return Inst->Namespace;
165 Record *CodeGenTarget::getInstructionSet() const {
166 return TargetRec->getValueAsDef("InstructionSet");
170 /// getAsmParser - Return the AssemblyParser definition for this target.
172 Record *CodeGenTarget::getAsmParser() const {
173 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyParsers");
174 if (AsmParserNum >= LI.size())
175 PrintFatalError("Target does not have an AsmParser #" +
176 Twine(AsmParserNum) + "!");
177 return LI[AsmParserNum];
180 /// getAsmParserVariant - Return the AssmblyParserVariant definition for
183 Record *CodeGenTarget::getAsmParserVariant(unsigned i) const {
184 std::vector<Record*> LI =
185 TargetRec->getValueAsListOfDefs("AssemblyParserVariants");
187 PrintFatalError("Target does not have an AsmParserVariant #" + Twine(i) +
192 /// getAsmParserVariantCount - Return the AssmblyParserVariant definition
193 /// available for this target.
195 unsigned CodeGenTarget::getAsmParserVariantCount() const {
196 std::vector<Record*> LI =
197 TargetRec->getValueAsListOfDefs("AssemblyParserVariants");
201 /// getAsmWriter - Return the AssemblyWriter definition for this target.
203 Record *CodeGenTarget::getAsmWriter() const {
204 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters");
205 if (AsmWriterNum >= LI.size())
206 PrintFatalError("Target does not have an AsmWriter #" +
207 Twine(AsmWriterNum) + "!");
208 return LI[AsmWriterNum];
211 CodeGenRegBank &CodeGenTarget::getRegBank() const {
213 RegBank = llvm::make_unique<CodeGenRegBank>(Records);
217 void CodeGenTarget::ReadRegAltNameIndices() const {
218 RegAltNameIndices = Records.getAllDerivedDefinitions("RegAltNameIndex");
219 std::sort(RegAltNameIndices.begin(), RegAltNameIndices.end(), LessRecord());
222 /// getRegisterByName - If there is a register with the specific AsmName,
224 const CodeGenRegister *CodeGenTarget::getRegisterByName(StringRef Name) const {
225 const StringMap<CodeGenRegister*> &Regs = getRegBank().getRegistersByName();
226 StringMap<CodeGenRegister*>::const_iterator I = Regs.find(Name);
232 std::vector<MVT::SimpleValueType> CodeGenTarget::
233 getRegisterVTs(Record *R) const {
234 const CodeGenRegister *Reg = getRegBank().getReg(R);
235 std::vector<MVT::SimpleValueType> Result;
236 for (const auto &RC : getRegBank().getRegClasses()) {
237 if (RC.contains(Reg)) {
238 ArrayRef<MVT::SimpleValueType> InVTs = RC.getValueTypes();
239 Result.insert(Result.end(), InVTs.begin(), InVTs.end());
243 // Remove duplicates.
244 array_pod_sort(Result.begin(), Result.end());
245 Result.erase(std::unique(Result.begin(), Result.end()), Result.end());
250 void CodeGenTarget::ReadLegalValueTypes() const {
251 for (const auto &RC : getRegBank().getRegClasses())
252 LegalValueTypes.insert(LegalValueTypes.end(), RC.VTs.begin(), RC.VTs.end());
254 // Remove duplicates.
255 std::sort(LegalValueTypes.begin(), LegalValueTypes.end());
256 LegalValueTypes.erase(std::unique(LegalValueTypes.begin(),
257 LegalValueTypes.end()),
258 LegalValueTypes.end());
261 CodeGenSchedModels &CodeGenTarget::getSchedModels() const {
263 SchedModels = llvm::make_unique<CodeGenSchedModels>(Records, *this);
267 void CodeGenTarget::ReadInstructions() const {
268 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
269 if (Insts.size() <= 2)
270 PrintFatalError("No 'Instruction' subclasses defined!");
272 // Parse the instructions defined in the .td file.
273 for (unsigned i = 0, e = Insts.size(); i != e; ++i)
274 Instructions[Insts[i]] = llvm::make_unique<CodeGenInstruction>(Insts[i]);
277 static const CodeGenInstruction *
278 GetInstByName(const char *Name,
279 const DenseMap<const Record*,
280 std::unique_ptr<CodeGenInstruction>> &Insts,
281 RecordKeeper &Records) {
282 const Record *Rec = Records.getDef(Name);
284 const auto I = Insts.find(Rec);
285 if (!Rec || I == Insts.end())
286 PrintFatalError(Twine("Could not find '") + Name + "' instruction!");
287 return I->second.get();
290 /// \brief Return all of the instructions defined by the target, ordered by
291 /// their enum value.
292 void CodeGenTarget::ComputeInstrsByEnum() const {
293 // The ordering here must match the ordering in TargetOpcodes.h.
294 static const char *const FixedInstrs[] = {
295 "PHI", "INLINEASM", "CFI_INSTRUCTION", "EH_LABEL",
296 "GC_LABEL", "KILL", "EXTRACT_SUBREG", "INSERT_SUBREG",
297 "IMPLICIT_DEF", "SUBREG_TO_REG", "COPY_TO_REGCLASS", "DBG_VALUE",
298 "REG_SEQUENCE", "COPY", "BUNDLE", "LIFETIME_START",
299 "LIFETIME_END", "STACKMAP", "PATCHPOINT", "LOAD_STACK_GUARD",
300 "STATEPOINT", "FRAME_ALLOC",
302 const auto &Insts = getInstructions();
303 for (const char *const *p = FixedInstrs; *p; ++p) {
304 const CodeGenInstruction *Instr = GetInstByName(*p, Insts, Records);
305 assert(Instr && "Missing target independent instruction");
306 assert(Instr->Namespace == "TargetOpcode" && "Bad namespace");
307 InstrsByEnum.push_back(Instr);
309 unsigned EndOfPredefines = InstrsByEnum.size();
311 for (const auto &I : Insts) {
312 const CodeGenInstruction *CGI = I.second.get();
313 if (CGI->Namespace != "TargetOpcode")
314 InstrsByEnum.push_back(CGI);
317 assert(InstrsByEnum.size() == Insts.size() && "Missing predefined instr");
319 // All of the instructions are now in random order based on the map iteration.
320 // Sort them by name.
321 std::sort(InstrsByEnum.begin() + EndOfPredefines, InstrsByEnum.end(),
322 [](const CodeGenInstruction *Rec1, const CodeGenInstruction *Rec2) {
323 return Rec1->TheDef->getName() < Rec2->TheDef->getName();
328 /// isLittleEndianEncoding - Return whether this target encodes its instruction
329 /// in little-endian format, i.e. bits laid out in the order [0..n]
331 bool CodeGenTarget::isLittleEndianEncoding() const {
332 return getInstructionSet()->getValueAsBit("isLittleEndianEncoding");
335 /// reverseBitsForLittleEndianEncoding - For little-endian instruction bit
336 /// encodings, reverse the bit order of all instructions.
337 void CodeGenTarget::reverseBitsForLittleEndianEncoding() {
338 if (!isLittleEndianEncoding())
341 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
342 for (Record *R : Insts) {
343 if (R->getValueAsString("Namespace") == "TargetOpcode" ||
344 R->getValueAsBit("isPseudo"))
347 BitsInit *BI = R->getValueAsBitsInit("Inst");
349 unsigned numBits = BI->getNumBits();
351 SmallVector<Init *, 16> NewBits(numBits);
353 for (unsigned bit = 0, end = numBits / 2; bit != end; ++bit) {
354 unsigned bitSwapIdx = numBits - bit - 1;
355 Init *OrigBit = BI->getBit(bit);
356 Init *BitSwap = BI->getBit(bitSwapIdx);
357 NewBits[bit] = BitSwap;
358 NewBits[bitSwapIdx] = OrigBit;
361 unsigned middle = (numBits + 1) / 2;
362 NewBits[middle] = BI->getBit(middle);
365 BitsInit *NewBI = BitsInit::get(NewBits);
367 // Update the bits in reversed order so that emitInstrOpBits will get the
368 // correct endianness.
369 R->getValue("Inst")->setValue(NewBI);
373 /// guessInstructionProperties - Return true if it's OK to guess instruction
374 /// properties instead of raising an error.
376 /// This is configurable as a temporary migration aid. It will eventually be
377 /// permanently false.
378 bool CodeGenTarget::guessInstructionProperties() const {
379 return getInstructionSet()->getValueAsBit("guessInstructionProperties");
382 //===----------------------------------------------------------------------===//
383 // ComplexPattern implementation
385 ComplexPattern::ComplexPattern(Record *R) {
386 Ty = ::getValueType(R->getValueAsDef("Ty"));
387 NumOperands = R->getValueAsInt("NumOperands");
388 SelectFunc = R->getValueAsString("SelectFunc");
389 RootNodes = R->getValueAsListOfDefs("RootNodes");
391 // Parse the properties.
393 std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties");
394 for (unsigned i = 0, e = PropList.size(); i != e; ++i)
395 if (PropList[i]->getName() == "SDNPHasChain") {
396 Properties |= 1 << SDNPHasChain;
397 } else if (PropList[i]->getName() == "SDNPOptInGlue") {
398 Properties |= 1 << SDNPOptInGlue;
399 } else if (PropList[i]->getName() == "SDNPMayStore") {
400 Properties |= 1 << SDNPMayStore;
401 } else if (PropList[i]->getName() == "SDNPMayLoad") {
402 Properties |= 1 << SDNPMayLoad;
403 } else if (PropList[i]->getName() == "SDNPSideEffect") {
404 Properties |= 1 << SDNPSideEffect;
405 } else if (PropList[i]->getName() == "SDNPMemOperand") {
406 Properties |= 1 << SDNPMemOperand;
407 } else if (PropList[i]->getName() == "SDNPVariadic") {
408 Properties |= 1 << SDNPVariadic;
409 } else if (PropList[i]->getName() == "SDNPWantRoot") {
410 Properties |= 1 << SDNPWantRoot;
411 } else if (PropList[i]->getName() == "SDNPWantParent") {
412 Properties |= 1 << SDNPWantParent;
414 PrintFatalError("Unsupported SD Node property '" +
415 PropList[i]->getName() + "' on ComplexPattern '" +
416 R->getName() + "'!");
420 //===----------------------------------------------------------------------===//
421 // CodeGenIntrinsic Implementation
422 //===----------------------------------------------------------------------===//
424 std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC,
426 std::vector<Record*> I = RC.getAllDerivedDefinitions("Intrinsic");
428 std::vector<CodeGenIntrinsic> Result;
430 for (unsigned i = 0, e = I.size(); i != e; ++i) {
431 bool isTarget = I[i]->getValueAsBit("isTarget");
432 if (isTarget == TargetOnly)
433 Result.push_back(CodeGenIntrinsic(I[i]));
438 CodeGenIntrinsic::CodeGenIntrinsic(Record *R) {
440 std::string DefName = R->getName();
441 ModRef = ReadWriteMem;
442 isOverloaded = false;
443 isCommutative = false;
446 isNoDuplicate = false;
448 if (DefName.size() <= 4 ||
449 std::string(DefName.begin(), DefName.begin() + 4) != "int_")
450 PrintFatalError("Intrinsic '" + DefName + "' does not start with 'int_'!");
452 EnumName = std::string(DefName.begin()+4, DefName.end());
454 if (R->getValue("GCCBuiltinName")) // Ignore a missing GCCBuiltinName field.
455 GCCBuiltinName = R->getValueAsString("GCCBuiltinName");
456 if (R->getValue("MSBuiltinName")) // Ignore a missing MSBuiltinName field.
457 MSBuiltinName = R->getValueAsString("MSBuiltinName");
459 TargetPrefix = R->getValueAsString("TargetPrefix");
460 Name = R->getValueAsString("LLVMName");
463 // If an explicit name isn't specified, derive one from the DefName.
466 for (unsigned i = 0, e = EnumName.size(); i != e; ++i)
467 Name += (EnumName[i] == '_') ? '.' : EnumName[i];
469 // Verify it starts with "llvm.".
470 if (Name.size() <= 5 ||
471 std::string(Name.begin(), Name.begin() + 5) != "llvm.")
472 PrintFatalError("Intrinsic '" + DefName + "'s name does not start with 'llvm.'!");
475 // If TargetPrefix is specified, make sure that Name starts with
476 // "llvm.<targetprefix>.".
477 if (!TargetPrefix.empty()) {
478 if (Name.size() < 6+TargetPrefix.size() ||
479 std::string(Name.begin() + 5, Name.begin() + 6 + TargetPrefix.size())
480 != (TargetPrefix + "."))
481 PrintFatalError("Intrinsic '" + DefName + "' does not start with 'llvm." +
482 TargetPrefix + ".'!");
485 // Parse the list of return types.
486 std::vector<MVT::SimpleValueType> OverloadedVTs;
487 ListInit *TypeList = R->getValueAsListInit("RetTypes");
488 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
489 Record *TyEl = TypeList->getElementAsRecord(i);
490 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
491 MVT::SimpleValueType VT;
492 if (TyEl->isSubClassOf("LLVMMatchType")) {
493 unsigned MatchTy = TyEl->getValueAsInt("Number");
494 assert(MatchTy < OverloadedVTs.size() &&
495 "Invalid matching number!");
496 VT = OverloadedVTs[MatchTy];
497 // It only makes sense to use the extended and truncated vector element
498 // variants with iAny types; otherwise, if the intrinsic is not
499 // overloaded, all the types can be specified directly.
500 assert(((!TyEl->isSubClassOf("LLVMExtendedType") &&
501 !TyEl->isSubClassOf("LLVMTruncatedType")) ||
502 VT == MVT::iAny || VT == MVT::vAny) &&
503 "Expected iAny or vAny type");
505 VT = getValueType(TyEl->getValueAsDef("VT"));
507 if (MVT(VT).isOverloaded()) {
508 OverloadedVTs.push_back(VT);
512 // Reject invalid types.
513 if (VT == MVT::isVoid)
514 PrintFatalError("Intrinsic '" + DefName + " has void in result type list!");
516 IS.RetVTs.push_back(VT);
517 IS.RetTypeDefs.push_back(TyEl);
520 // Parse the list of parameter types.
521 TypeList = R->getValueAsListInit("ParamTypes");
522 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
523 Record *TyEl = TypeList->getElementAsRecord(i);
524 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
525 MVT::SimpleValueType VT;
526 if (TyEl->isSubClassOf("LLVMMatchType")) {
527 unsigned MatchTy = TyEl->getValueAsInt("Number");
528 assert(MatchTy < OverloadedVTs.size() &&
529 "Invalid matching number!");
530 VT = OverloadedVTs[MatchTy];
531 // It only makes sense to use the extended and truncated vector element
532 // variants with iAny types; otherwise, if the intrinsic is not
533 // overloaded, all the types can be specified directly.
534 assert(((!TyEl->isSubClassOf("LLVMExtendedType") &&
535 !TyEl->isSubClassOf("LLVMTruncatedType") &&
536 !TyEl->isSubClassOf("LLVMVectorSameWidth") &&
537 !TyEl->isSubClassOf("LLVMPointerToElt")) ||
538 VT == MVT::iAny || VT == MVT::vAny) &&
539 "Expected iAny or vAny type");
541 VT = getValueType(TyEl->getValueAsDef("VT"));
543 if (MVT(VT).isOverloaded()) {
544 OverloadedVTs.push_back(VT);
548 // Reject invalid types.
549 if (VT == MVT::isVoid && i != e-1 /*void at end means varargs*/)
550 PrintFatalError("Intrinsic '" + DefName + " has void in result type list!");
552 IS.ParamVTs.push_back(VT);
553 IS.ParamTypeDefs.push_back(TyEl);
556 // Parse the intrinsic properties.
557 ListInit *PropList = R->getValueAsListInit("Properties");
558 for (unsigned i = 0, e = PropList->getSize(); i != e; ++i) {
559 Record *Property = PropList->getElementAsRecord(i);
560 assert(Property->isSubClassOf("IntrinsicProperty") &&
561 "Expected a property!");
563 if (Property->getName() == "IntrNoMem")
565 else if (Property->getName() == "IntrReadArgMem")
567 else if (Property->getName() == "IntrReadMem")
569 else if (Property->getName() == "IntrReadWriteArgMem")
570 ModRef = ReadWriteArgMem;
571 else if (Property->getName() == "Commutative")
572 isCommutative = true;
573 else if (Property->getName() == "Throws")
575 else if (Property->getName() == "IntrNoDuplicate")
576 isNoDuplicate = true;
577 else if (Property->getName() == "IntrNoReturn")
579 else if (Property->isSubClassOf("NoCapture")) {
580 unsigned ArgNo = Property->getValueAsInt("ArgNo");
581 ArgumentAttributes.push_back(std::make_pair(ArgNo, NoCapture));
582 } else if (Property->isSubClassOf("ReadOnly")) {
583 unsigned ArgNo = Property->getValueAsInt("ArgNo");
584 ArgumentAttributes.push_back(std::make_pair(ArgNo, ReadOnly));
585 } else if (Property->isSubClassOf("ReadNone")) {
586 unsigned ArgNo = Property->getValueAsInt("ArgNo");
587 ArgumentAttributes.push_back(std::make_pair(ArgNo, ReadNone));
589 llvm_unreachable("Unknown property!");
592 // Sort the argument attributes for later benefit.
593 std::sort(ArgumentAttributes.begin(), ArgumentAttributes.end());