1 //===- AsmMatcherEmitter.cpp - Generate an assembly matcher ---------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This tablegen backend emits a target specifier matcher for converting parsed
11 // assembly operands in the MCInst structures. It also emits a matcher for
12 // custom operand parsing.
14 // Converting assembly operands into MCInst structures
15 // ---------------------------------------------------
17 // The input to the target specific matcher is a list of literal tokens and
18 // operands. The target specific parser should generally eliminate any syntax
19 // which is not relevant for matching; for example, comma tokens should have
20 // already been consumed and eliminated by the parser. Most instructions will
21 // end up with a single literal token (the instruction name) and some number of
24 // Some example inputs, for X86:
25 // 'addl' (immediate ...) (register ...)
26 // 'add' (immediate ...) (memory ...)
29 // The assembly matcher is responsible for converting this input into a precise
30 // machine instruction (i.e., an instruction with a well defined encoding). This
31 // mapping has several properties which complicate matching:
33 // - It may be ambiguous; many architectures can legally encode particular
34 // variants of an instruction in different ways (for example, using a smaller
35 // encoding for small immediates). Such ambiguities should never be
36 // arbitrarily resolved by the assembler, the assembler is always responsible
37 // for choosing the "best" available instruction.
39 // - It may depend on the subtarget or the assembler context. Instructions
40 // which are invalid for the current mode, but otherwise unambiguous (e.g.,
41 // an SSE instruction in a file being assembled for i486) should be accepted
42 // and rejected by the assembler front end. However, if the proper encoding
43 // for an instruction is dependent on the assembler context then the matcher
44 // is responsible for selecting the correct machine instruction for the
47 // The core matching algorithm attempts to exploit the regularity in most
48 // instruction sets to quickly determine the set of possibly matching
49 // instructions, and the simplify the generated code. Additionally, this helps
50 // to ensure that the ambiguities are intentionally resolved by the user.
52 // The matching is divided into two distinct phases:
54 // 1. Classification: Each operand is mapped to the unique set which (a)
55 // contains it, and (b) is the largest such subset for which a single
56 // instruction could match all members.
58 // For register classes, we can generate these subgroups automatically. For
59 // arbitrary operands, we expect the user to define the classes and their
60 // relations to one another (for example, 8-bit signed immediates as a
61 // subset of 32-bit immediates).
63 // By partitioning the operands in this way, we guarantee that for any
64 // tuple of classes, any single instruction must match either all or none
65 // of the sets of operands which could classify to that tuple.
67 // In addition, the subset relation amongst classes induces a partial order
68 // on such tuples, which we use to resolve ambiguities.
70 // 2. The input can now be treated as a tuple of classes (static tokens are
71 // simple singleton sets). Each such tuple should generally map to a single
72 // instruction (we currently ignore cases where this isn't true, whee!!!),
73 // which we can emit a simple matcher for.
75 // Custom Operand Parsing
76 // ----------------------
78 // Some targets need a custom way to parse operands, some specific instructions
79 // can contain arguments that can represent processor flags and other kinds of
80 // identifiers that need to be mapped to specific values in the final encoded
81 // instructions. The target specific custom operand parsing works in the
84 // 1. A operand match table is built, each entry contains a mnemonic, an
85 // operand class, a mask for all operand positions for that same
86 // class/mnemonic and target features to be checked while trying to match.
88 // 2. The operand matcher will try every possible entry with the same
89 // mnemonic and will check if the target feature for this mnemonic also
90 // matches. After that, if the operand to be matched has its index
91 // present in the mask, a successful match occurs. Otherwise, fallback
92 // to the regular operand parsing.
94 // 3. For a match success, each operand class that has a 'ParserMethod'
95 // becomes part of a switch from where the custom method is called.
97 //===----------------------------------------------------------------------===//
99 #include "CodeGenTarget.h"
100 #include "llvm/ADT/PointerUnion.h"
101 #include "llvm/ADT/STLExtras.h"
102 #include "llvm/ADT/SmallPtrSet.h"
103 #include "llvm/ADT/SmallVector.h"
104 #include "llvm/ADT/StringExtras.h"
105 #include "llvm/Support/CommandLine.h"
106 #include "llvm/Support/Debug.h"
107 #include "llvm/Support/ErrorHandling.h"
108 #include "llvm/TableGen/Error.h"
109 #include "llvm/TableGen/Record.h"
110 #include "llvm/TableGen/StringMatcher.h"
111 #include "llvm/TableGen/StringToOffsetTable.h"
112 #include "llvm/TableGen/TableGenBackend.h"
118 #include <forward_list>
119 using namespace llvm;
121 #define DEBUG_TYPE "asm-matcher-emitter"
123 static cl::opt<std::string>
124 MatchPrefix("match-prefix", cl::init(""),
125 cl::desc("Only match instructions with the given prefix"));
128 class AsmMatcherInfo;
129 struct SubtargetFeatureInfo;
131 // Register sets are used as keys in some second-order sets TableGen creates
132 // when generating its data structures. This means that the order of two
133 // RegisterSets can be seen in the outputted AsmMatcher tables occasionally, and
134 // can even affect compiler output (at least seen in diagnostics produced when
135 // all matches fail). So we use a type that sorts them consistently.
136 typedef std::set<Record*, LessRecordByID> RegisterSet;
138 class AsmMatcherEmitter {
139 RecordKeeper &Records;
141 AsmMatcherEmitter(RecordKeeper &R) : Records(R) {}
143 void run(raw_ostream &o);
146 /// ClassInfo - Helper class for storing the information about a particular
147 /// class of operands which can be matched.
150 /// Invalid kind, for use as a sentinel value.
153 /// The class for a particular token.
156 /// The (first) register class, subsequent register classes are
157 /// RegisterClass0+1, and so on.
160 /// The (first) user defined class, subsequent user defined classes are
161 /// UserClass0+1, and so on.
165 /// Kind - The class kind, which is either a predefined kind, or (UserClass0 +
166 /// N) for the Nth user defined class.
169 /// SuperClasses - The super classes of this class. Note that for simplicities
170 /// sake user operands only record their immediate super class, while register
171 /// operands include all superclasses.
172 std::vector<ClassInfo*> SuperClasses;
174 /// Name - The full class name, suitable for use in an enum.
177 /// ClassName - The unadorned generic name for this class (e.g., Token).
178 std::string ClassName;
180 /// ValueName - The name of the value this class represents; for a token this
181 /// is the literal token string, for an operand it is the TableGen class (or
182 /// empty if this is a derived class).
183 std::string ValueName;
185 /// PredicateMethod - The name of the operand method to test whether the
186 /// operand matches this class; this is not valid for Token or register kinds.
187 std::string PredicateMethod;
189 /// RenderMethod - The name of the operand method to add this operand to an
190 /// MCInst; this is not valid for Token or register kinds.
191 std::string RenderMethod;
193 /// ParserMethod - The name of the operand method to do a target specific
194 /// parsing on the operand.
195 std::string ParserMethod;
197 /// For register classes: the records for all the registers in this class.
198 RegisterSet Registers;
200 /// For custom match classes: the diagnostic kind for when the predicate fails.
201 std::string DiagnosticType;
203 /// isRegisterClass() - Check if this is a register class.
204 bool isRegisterClass() const {
205 return Kind >= RegisterClass0 && Kind < UserClass0;
208 /// isUserClass() - Check if this is a user defined class.
209 bool isUserClass() const {
210 return Kind >= UserClass0;
213 /// isRelatedTo - Check whether this class is "related" to \p RHS. Classes
214 /// are related if they are in the same class hierarchy.
215 bool isRelatedTo(const ClassInfo &RHS) const {
216 // Tokens are only related to tokens.
217 if (Kind == Token || RHS.Kind == Token)
218 return Kind == Token && RHS.Kind == Token;
220 // Registers classes are only related to registers classes, and only if
221 // their intersection is non-empty.
222 if (isRegisterClass() || RHS.isRegisterClass()) {
223 if (!isRegisterClass() || !RHS.isRegisterClass())
227 std::insert_iterator<RegisterSet> II(Tmp, Tmp.begin());
228 std::set_intersection(Registers.begin(), Registers.end(),
229 RHS.Registers.begin(), RHS.Registers.end(),
230 II, LessRecordByID());
235 // Otherwise we have two users operands; they are related if they are in the
236 // same class hierarchy.
238 // FIXME: This is an oversimplification, they should only be related if they
239 // intersect, however we don't have that information.
240 assert(isUserClass() && RHS.isUserClass() && "Unexpected class!");
241 const ClassInfo *Root = this;
242 while (!Root->SuperClasses.empty())
243 Root = Root->SuperClasses.front();
245 const ClassInfo *RHSRoot = &RHS;
246 while (!RHSRoot->SuperClasses.empty())
247 RHSRoot = RHSRoot->SuperClasses.front();
249 return Root == RHSRoot;
252 /// isSubsetOf - Test whether this class is a subset of \p RHS.
253 bool isSubsetOf(const ClassInfo &RHS) const {
254 // This is a subset of RHS if it is the same class...
258 // ... or if any of its super classes are a subset of RHS.
259 for (const ClassInfo *CI : SuperClasses)
260 if (CI->isSubsetOf(RHS))
266 /// operator< - Compare two classes.
267 // FIXME: This ordering seems to be broken. For example:
268 // u64 < i64, i64 < s8, s8 < u64, forming a cycle
269 // u64 is a subset of i64
270 // i64 and s8 are not subsets of each other, so are ordered by name
271 // s8 and u64 are not subsets of each other, so are ordered by name
272 bool operator<(const ClassInfo &RHS) const {
276 // Unrelated classes can be ordered by kind.
277 if (!isRelatedTo(RHS))
278 return Kind < RHS.Kind;
282 llvm_unreachable("Invalid kind!");
285 // This class precedes the RHS if it is a proper subset of the RHS.
288 if (RHS.isSubsetOf(*this))
291 // Otherwise, order by name to ensure we have a total ordering.
292 return ValueName < RHS.ValueName;
297 class AsmVariantInfo {
299 std::string RegisterPrefix;
300 std::string TokenizingCharacters;
301 std::string SeparatorCharacters;
302 std::string BreakCharacters;
306 /// MatchableInfo - Helper class for storing the necessary information for an
307 /// instruction or alias which is capable of being matched.
308 struct MatchableInfo {
310 /// Token - This is the token that the operand came from.
313 /// The unique class instance this operand should match.
316 /// The operand name this is, if anything.
319 /// The suboperand index within SrcOpName, or -1 for the entire operand.
322 /// Whether the token is "isolated", i.e., it is preceded and followed
324 bool IsIsolatedToken;
326 /// Register record if this token is singleton register.
327 Record *SingletonReg;
329 explicit AsmOperand(bool IsIsolatedToken, StringRef T)
330 : Token(T), Class(nullptr), SubOpIdx(-1),
331 IsIsolatedToken(IsIsolatedToken), SingletonReg(nullptr) {}
334 /// ResOperand - This represents a single operand in the result instruction
335 /// generated by the match. In cases (like addressing modes) where a single
336 /// assembler operand expands to multiple MCOperands, this represents the
337 /// single assembler operand, not the MCOperand.
340 /// RenderAsmOperand - This represents an operand result that is
341 /// generated by calling the render method on the assembly operand. The
342 /// corresponding AsmOperand is specified by AsmOperandNum.
345 /// TiedOperand - This represents a result operand that is a duplicate of
346 /// a previous result operand.
349 /// ImmOperand - This represents an immediate value that is dumped into
353 /// RegOperand - This represents a fixed register that is dumped in.
358 /// This is the operand # in the AsmOperands list that this should be
360 unsigned AsmOperandNum;
362 /// TiedOperandNum - This is the (earlier) result operand that should be
364 unsigned TiedOperandNum;
366 /// ImmVal - This is the immediate value added to the instruction.
369 /// Register - This is the register record.
373 /// MINumOperands - The number of MCInst operands populated by this
375 unsigned MINumOperands;
377 static ResOperand getRenderedOp(unsigned AsmOpNum, unsigned NumOperands) {
379 X.Kind = RenderAsmOperand;
380 X.AsmOperandNum = AsmOpNum;
381 X.MINumOperands = NumOperands;
385 static ResOperand getTiedOp(unsigned TiedOperandNum) {
387 X.Kind = TiedOperand;
388 X.TiedOperandNum = TiedOperandNum;
393 static ResOperand getImmOp(int64_t Val) {
401 static ResOperand getRegOp(Record *Reg) {
410 /// AsmVariantID - Target's assembly syntax variant no.
413 /// AsmString - The assembly string for this instruction (with variants
414 /// removed), e.g. "movsx $src, $dst".
415 std::string AsmString;
417 /// TheDef - This is the definition of the instruction or InstAlias that this
418 /// matchable came from.
419 Record *const TheDef;
421 /// DefRec - This is the definition that it came from.
422 PointerUnion<const CodeGenInstruction*, const CodeGenInstAlias*> DefRec;
424 const CodeGenInstruction *getResultInst() const {
425 if (DefRec.is<const CodeGenInstruction*>())
426 return DefRec.get<const CodeGenInstruction*>();
427 return DefRec.get<const CodeGenInstAlias*>()->ResultInst;
430 /// ResOperands - This is the operand list that should be built for the result
432 SmallVector<ResOperand, 8> ResOperands;
434 /// Mnemonic - This is the first token of the matched instruction, its
438 /// AsmOperands - The textual operands that this instruction matches,
439 /// annotated with a class and where in the OperandList they were defined.
440 /// This directly corresponds to the tokenized AsmString after the mnemonic is
442 SmallVector<AsmOperand, 8> AsmOperands;
444 /// Predicates - The required subtarget features to match this instruction.
445 SmallVector<const SubtargetFeatureInfo *, 4> RequiredFeatures;
447 /// ConversionFnKind - The enum value which is passed to the generated
448 /// convertToMCInst to convert parsed operands into an MCInst for this
450 std::string ConversionFnKind;
452 /// If this instruction is deprecated in some form.
455 /// If this is an alias, this is use to determine whether or not to using
456 /// the conversion function defined by the instruction's AsmMatchConverter
457 /// or to use the function generated by the alias.
458 bool UseInstAsmMatchConverter;
460 MatchableInfo(const CodeGenInstruction &CGI)
461 : AsmVariantID(0), AsmString(CGI.AsmString), TheDef(CGI.TheDef), DefRec(&CGI),
462 UseInstAsmMatchConverter(true) {
465 MatchableInfo(std::unique_ptr<const CodeGenInstAlias> Alias)
466 : AsmVariantID(0), AsmString(Alias->AsmString), TheDef(Alias->TheDef),
467 DefRec(Alias.release()),
468 UseInstAsmMatchConverter(
469 TheDef->getValueAsBit("UseInstAsmMatchConverter")) {
472 // Could remove this and the dtor if PointerUnion supported unique_ptr
473 // elements with a dynamic failure/assertion (like the one below) in the case
474 // where it was copied while being in an owning state.
475 MatchableInfo(const MatchableInfo &RHS)
476 : AsmVariantID(RHS.AsmVariantID), AsmString(RHS.AsmString),
477 TheDef(RHS.TheDef), DefRec(RHS.DefRec), ResOperands(RHS.ResOperands),
478 Mnemonic(RHS.Mnemonic), AsmOperands(RHS.AsmOperands),
479 RequiredFeatures(RHS.RequiredFeatures),
480 ConversionFnKind(RHS.ConversionFnKind),
481 HasDeprecation(RHS.HasDeprecation),
482 UseInstAsmMatchConverter(RHS.UseInstAsmMatchConverter) {
483 assert(!DefRec.is<const CodeGenInstAlias *>());
487 delete DefRec.dyn_cast<const CodeGenInstAlias*>();
490 // Two-operand aliases clone from the main matchable, but mark the second
491 // operand as a tied operand of the first for purposes of the assembler.
492 void formTwoOperandAlias(StringRef Constraint);
494 void initialize(const AsmMatcherInfo &Info,
495 SmallPtrSetImpl<Record*> &SingletonRegisters,
496 AsmVariantInfo const &Variant);
498 /// validate - Return true if this matchable is a valid thing to match against
499 /// and perform a bunch of validity checking.
500 bool validate(StringRef CommentDelimiter, bool Hack) const;
502 /// findAsmOperand - Find the AsmOperand with the specified name and
503 /// suboperand index.
504 int findAsmOperand(StringRef N, int SubOpIdx) const {
505 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i)
506 if (N == AsmOperands[i].SrcOpName &&
507 SubOpIdx == AsmOperands[i].SubOpIdx)
512 /// findAsmOperandNamed - Find the first AsmOperand with the specified name.
513 /// This does not check the suboperand index.
514 int findAsmOperandNamed(StringRef N) const {
515 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i)
516 if (N == AsmOperands[i].SrcOpName)
521 void buildInstructionResultOperands();
522 void buildAliasResultOperands();
524 /// operator< - Compare two matchables.
525 bool operator<(const MatchableInfo &RHS) const {
526 // The primary comparator is the instruction mnemonic.
527 if (Mnemonic != RHS.Mnemonic)
528 return Mnemonic < RHS.Mnemonic;
530 if (AsmOperands.size() != RHS.AsmOperands.size())
531 return AsmOperands.size() < RHS.AsmOperands.size();
533 // Compare lexicographically by operand. The matcher validates that other
534 // orderings wouldn't be ambiguous using \see couldMatchAmbiguouslyWith().
535 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
536 if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class)
538 if (*RHS.AsmOperands[i].Class < *AsmOperands[i].Class)
542 // Give matches that require more features higher precedence. This is useful
543 // because we cannot define AssemblerPredicates with the negation of
544 // processor features. For example, ARM v6 "nop" may be either a HINT or
545 // MOV. With v6, we want to match HINT. The assembler has no way to
546 // predicate MOV under "NoV6", but HINT will always match first because it
547 // requires V6 while MOV does not.
548 if (RequiredFeatures.size() != RHS.RequiredFeatures.size())
549 return RequiredFeatures.size() > RHS.RequiredFeatures.size();
554 /// couldMatchAmbiguouslyWith - Check whether this matchable could
555 /// ambiguously match the same set of operands as \p RHS (without being a
556 /// strictly superior match).
557 bool couldMatchAmbiguouslyWith(const MatchableInfo &RHS) const {
558 // The primary comparator is the instruction mnemonic.
559 if (Mnemonic != RHS.Mnemonic)
562 // The number of operands is unambiguous.
563 if (AsmOperands.size() != RHS.AsmOperands.size())
566 // Otherwise, make sure the ordering of the two instructions is unambiguous
567 // by checking that either (a) a token or operand kind discriminates them,
568 // or (b) the ordering among equivalent kinds is consistent.
570 // Tokens and operand kinds are unambiguous (assuming a correct target
572 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i)
573 if (AsmOperands[i].Class->Kind != RHS.AsmOperands[i].Class->Kind ||
574 AsmOperands[i].Class->Kind == ClassInfo::Token)
575 if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class ||
576 *RHS.AsmOperands[i].Class < *AsmOperands[i].Class)
579 // Otherwise, this operand could commute if all operands are equivalent, or
580 // there is a pair of operands that compare less than and a pair that
581 // compare greater than.
582 bool HasLT = false, HasGT = false;
583 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
584 if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class)
586 if (*RHS.AsmOperands[i].Class < *AsmOperands[i].Class)
590 return !(HasLT ^ HasGT);
596 void tokenizeAsmString(AsmMatcherInfo const &Info,
597 AsmVariantInfo const &Variant);
598 void addAsmOperand(size_t Start, size_t End,
599 std::string const &SeparatorCharacters);
602 /// SubtargetFeatureInfo - Helper class for storing information on a subtarget
603 /// feature which participates in instruction matching.
604 struct SubtargetFeatureInfo {
605 /// \brief The predicate record for this feature.
608 /// \brief An unique index assigned to represent this feature.
611 SubtargetFeatureInfo(Record *D, uint64_t Idx) : TheDef(D), Index(Idx) {}
613 /// \brief The name of the enumerated constant identifying this feature.
614 std::string getEnumName() const {
615 return "Feature_" + TheDef->getName();
619 errs() << getEnumName() << " " << Index << "\n";
624 struct OperandMatchEntry {
625 unsigned OperandMask;
626 const MatchableInfo* MI;
629 static OperandMatchEntry create(const MatchableInfo *mi, ClassInfo *ci,
632 X.OperandMask = opMask;
640 class AsmMatcherInfo {
643 RecordKeeper &Records;
645 /// The tablegen AsmParser record.
648 /// Target - The target information.
649 CodeGenTarget &Target;
651 /// The classes which are needed for matching.
652 std::forward_list<ClassInfo> Classes;
654 /// The information on the matchables to match.
655 std::vector<std::unique_ptr<MatchableInfo>> Matchables;
657 /// Info for custom matching operands by user defined methods.
658 std::vector<OperandMatchEntry> OperandMatchInfo;
660 /// Map of Register records to their class information.
661 typedef std::map<Record*, ClassInfo*, LessRecordByID> RegisterClassesTy;
662 RegisterClassesTy RegisterClasses;
664 /// Map of Predicate records to their subtarget information.
665 std::map<Record *, SubtargetFeatureInfo, LessRecordByID> SubtargetFeatures;
667 /// Map of AsmOperandClass records to their class information.
668 std::map<Record*, ClassInfo*> AsmOperandClasses;
671 /// Map of token to class information which has already been constructed.
672 std::map<std::string, ClassInfo*> TokenClasses;
674 /// Map of RegisterClass records to their class information.
675 std::map<Record*, ClassInfo*> RegisterClassClasses;
678 /// getTokenClass - Lookup or create the class for the given token.
679 ClassInfo *getTokenClass(StringRef Token);
681 /// getOperandClass - Lookup or create the class for the given operand.
682 ClassInfo *getOperandClass(const CGIOperandList::OperandInfo &OI,
684 ClassInfo *getOperandClass(Record *Rec, int SubOpIdx);
686 /// buildRegisterClasses - Build the ClassInfo* instances for register
688 void buildRegisterClasses(SmallPtrSetImpl<Record*> &SingletonRegisters);
690 /// buildOperandClasses - Build the ClassInfo* instances for user defined
692 void buildOperandClasses();
694 void buildInstructionOperandReference(MatchableInfo *II, StringRef OpName,
696 void buildAliasOperandReference(MatchableInfo *II, StringRef OpName,
697 MatchableInfo::AsmOperand &Op);
700 AsmMatcherInfo(Record *AsmParser,
701 CodeGenTarget &Target,
702 RecordKeeper &Records);
704 /// buildInfo - Construct the various tables used during matching.
707 /// buildOperandMatchInfo - Build the necessary information to handle user
708 /// defined operand parsing methods.
709 void buildOperandMatchInfo();
711 /// getSubtargetFeature - Lookup or create the subtarget feature info for the
713 const SubtargetFeatureInfo *getSubtargetFeature(Record *Def) const {
714 assert(Def->isSubClassOf("Predicate") && "Invalid predicate type!");
715 const auto &I = SubtargetFeatures.find(Def);
716 return I == SubtargetFeatures.end() ? nullptr : &I->second;
719 RecordKeeper &getRecords() const {
724 } // End anonymous namespace
726 void MatchableInfo::dump() const {
727 errs() << TheDef->getName() << " -- " << "flattened:\"" << AsmString <<"\"\n";
729 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
730 const AsmOperand &Op = AsmOperands[i];
731 errs() << " op[" << i << "] = " << Op.Class->ClassName << " - ";
732 errs() << '\"' << Op.Token << "\"\n";
736 static std::pair<StringRef, StringRef>
737 parseTwoOperandConstraint(StringRef S, ArrayRef<SMLoc> Loc) {
738 // Split via the '='.
739 std::pair<StringRef, StringRef> Ops = S.split('=');
740 if (Ops.second == "")
741 PrintFatalError(Loc, "missing '=' in two-operand alias constraint");
742 // Trim whitespace and the leading '$' on the operand names.
743 size_t start = Ops.first.find_first_of('$');
744 if (start == std::string::npos)
745 PrintFatalError(Loc, "expected '$' prefix on asm operand name");
746 Ops.first = Ops.first.slice(start + 1, std::string::npos);
747 size_t end = Ops.first.find_last_of(" \t");
748 Ops.first = Ops.first.slice(0, end);
749 // Now the second operand.
750 start = Ops.second.find_first_of('$');
751 if (start == std::string::npos)
752 PrintFatalError(Loc, "expected '$' prefix on asm operand name");
753 Ops.second = Ops.second.slice(start + 1, std::string::npos);
754 end = Ops.second.find_last_of(" \t");
755 Ops.first = Ops.first.slice(0, end);
759 void MatchableInfo::formTwoOperandAlias(StringRef Constraint) {
760 // Figure out which operands are aliased and mark them as tied.
761 std::pair<StringRef, StringRef> Ops =
762 parseTwoOperandConstraint(Constraint, TheDef->getLoc());
764 // Find the AsmOperands that refer to the operands we're aliasing.
765 int SrcAsmOperand = findAsmOperandNamed(Ops.first);
766 int DstAsmOperand = findAsmOperandNamed(Ops.second);
767 if (SrcAsmOperand == -1)
768 PrintFatalError(TheDef->getLoc(),
769 "unknown source two-operand alias operand '" + Ops.first +
771 if (DstAsmOperand == -1)
772 PrintFatalError(TheDef->getLoc(),
773 "unknown destination two-operand alias operand '" +
776 // Find the ResOperand that refers to the operand we're aliasing away
777 // and update it to refer to the combined operand instead.
778 for (ResOperand &Op : ResOperands) {
779 if (Op.Kind == ResOperand::RenderAsmOperand &&
780 Op.AsmOperandNum == (unsigned)SrcAsmOperand) {
781 Op.AsmOperandNum = DstAsmOperand;
785 // Remove the AsmOperand for the alias operand.
786 AsmOperands.erase(AsmOperands.begin() + SrcAsmOperand);
787 // Adjust the ResOperand references to any AsmOperands that followed
788 // the one we just deleted.
789 for (ResOperand &Op : ResOperands) {
792 // Nothing to do for operands that don't reference AsmOperands.
794 case ResOperand::RenderAsmOperand:
795 if (Op.AsmOperandNum > (unsigned)SrcAsmOperand)
798 case ResOperand::TiedOperand:
799 if (Op.TiedOperandNum > (unsigned)SrcAsmOperand)
806 /// extractSingletonRegisterForAsmOperand - Extract singleton register,
807 /// if present, from specified token.
809 extractSingletonRegisterForAsmOperand(MatchableInfo::AsmOperand &Op,
810 const AsmMatcherInfo &Info,
811 StringRef RegisterPrefix) {
812 StringRef Tok = Op.Token;
814 // If this token is not an isolated token, i.e., it isn't separated from
815 // other tokens (e.g. with whitespace), don't interpret it as a register name.
816 if (!Op.IsIsolatedToken)
819 if (RegisterPrefix.empty()) {
820 std::string LoweredTok = Tok.lower();
821 if (const CodeGenRegister *Reg = Info.Target.getRegisterByName(LoweredTok))
822 Op.SingletonReg = Reg->TheDef;
826 if (!Tok.startswith(RegisterPrefix))
829 StringRef RegName = Tok.substr(RegisterPrefix.size());
830 if (const CodeGenRegister *Reg = Info.Target.getRegisterByName(RegName))
831 Op.SingletonReg = Reg->TheDef;
833 // If there is no register prefix (i.e. "%" in "%eax"), then this may
834 // be some random non-register token, just ignore it.
838 void MatchableInfo::initialize(const AsmMatcherInfo &Info,
839 SmallPtrSetImpl<Record*> &SingletonRegisters,
840 AsmVariantInfo const &Variant) {
841 AsmVariantID = Variant.AsmVariantNo;
843 CodeGenInstruction::FlattenAsmStringVariants(AsmString,
844 Variant.AsmVariantNo);
846 tokenizeAsmString(Info, Variant);
848 // Compute the require features.
849 for (Record *Predicate : TheDef->getValueAsListOfDefs("Predicates"))
850 if (const SubtargetFeatureInfo *Feature =
851 Info.getSubtargetFeature(Predicate))
852 RequiredFeatures.push_back(Feature);
854 // Collect singleton registers, if used.
855 for (MatchableInfo::AsmOperand &Op : AsmOperands) {
856 extractSingletonRegisterForAsmOperand(Op, Info, Variant.RegisterPrefix);
857 if (Record *Reg = Op.SingletonReg)
858 SingletonRegisters.insert(Reg);
861 const RecordVal *DepMask = TheDef->getValue("DeprecatedFeatureMask");
863 DepMask = TheDef->getValue("ComplexDeprecationPredicate");
866 DepMask ? !DepMask->getValue()->getAsUnquotedString().empty() : false;
869 /// Append an AsmOperand for the given substring of AsmString.
870 void MatchableInfo::addAsmOperand(size_t Start, size_t End,
871 std::string const &Separators) {
872 StringRef String = AsmString;
873 // Look for separators before and after to figure out is this token is
874 // isolated. Accept '$$' as that's how we escape '$'.
875 bool IsIsolatedToken =
876 (!Start || Separators.find(String[Start - 1]) != StringRef::npos ||
877 String.substr(Start - 1, 2) == "$$") &&
878 (End >= String.size() || Separators.find(String[End]) != StringRef::npos);
879 AsmOperands.push_back(AsmOperand(IsIsolatedToken, String.slice(Start, End)));
882 /// tokenizeAsmString - Tokenize a simplified assembly string.
883 void MatchableInfo::tokenizeAsmString(const AsmMatcherInfo &Info,
884 AsmVariantInfo const &Variant) {
885 StringRef String = AsmString;
888 std::string Separators = Variant.TokenizingCharacters +
889 Variant.SeparatorCharacters;
890 for (size_t i = 0, e = String.size(); i != e; ++i) {
891 if(Variant.BreakCharacters.find(String[i]) != std::string::npos) {
893 addAsmOperand(Prev, i, Separators);
899 if(Variant.TokenizingCharacters.find(String[i]) != std::string::npos) {
901 addAsmOperand(Prev, i, Separators);
904 addAsmOperand(i, i + 1, Separators);
908 if(Variant.SeparatorCharacters.find(String[i]) != std::string::npos) {
910 addAsmOperand(Prev, i, Separators);
919 addAsmOperand(Prev, i, Separators);
923 assert(i != String.size() && "Invalid quoted character");
924 addAsmOperand(i, i + 1, Separators);
929 if (InTok && Prev != i) {
930 addAsmOperand(Prev, i, Separators);
934 // If this isn't "${", start new identifier looking like "$xxx"
935 if (i + 1 == String.size() || String[i + 1] != '{') {
940 size_t EndPos = String.find('}', i);
941 assert(EndPos != StringRef::npos &&
942 "Missing brace in operand reference!");
943 addAsmOperand(i, EndPos+1, Separators);
952 if (InTok && Prev != String.size())
953 addAsmOperand(Prev, StringRef::npos, Separators);
955 // The first token of the instruction is the mnemonic, which must be a
956 // simple string, not a $foo variable or a singleton register.
957 if (AsmOperands.empty())
958 PrintFatalError(TheDef->getLoc(),
959 "Instruction '" + TheDef->getName() + "' has no tokens");
960 assert(!AsmOperands[0].Token.empty());
961 if (AsmOperands[0].Token[0] != '$')
962 Mnemonic = AsmOperands[0].Token;
965 bool MatchableInfo::validate(StringRef CommentDelimiter, bool Hack) const {
966 // Reject matchables with no .s string.
967 if (AsmString.empty())
968 PrintFatalError(TheDef->getLoc(), "instruction with empty asm string");
970 // Reject any matchables with a newline in them, they should be marked
971 // isCodeGenOnly if they are pseudo instructions.
972 if (AsmString.find('\n') != std::string::npos)
973 PrintFatalError(TheDef->getLoc(),
974 "multiline instruction is not valid for the asmparser, "
975 "mark it isCodeGenOnly");
977 // Remove comments from the asm string. We know that the asmstring only
979 if (!CommentDelimiter.empty() &&
980 StringRef(AsmString).find(CommentDelimiter) != StringRef::npos)
981 PrintFatalError(TheDef->getLoc(),
982 "asmstring for instruction has comment character in it, "
983 "mark it isCodeGenOnly");
985 // Reject matchables with operand modifiers, these aren't something we can
986 // handle, the target should be refactored to use operands instead of
989 // Also, check for instructions which reference the operand multiple times;
990 // this implies a constraint we would not honor.
991 std::set<std::string> OperandNames;
992 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
993 StringRef Tok = AsmOperands[i].Token;
994 if (Tok[0] == '$' && Tok.find(':') != StringRef::npos)
995 PrintFatalError(TheDef->getLoc(),
996 "matchable with operand modifier '" + Tok +
997 "' not supported by asm matcher. Mark isCodeGenOnly!");
999 // Verify that any operand is only mentioned once.
1000 // We reject aliases and ignore instructions for now.
1001 if (Tok[0] == '$' && !OperandNames.insert(Tok).second) {
1003 PrintFatalError(TheDef->getLoc(),
1004 "ERROR: matchable with tied operand '" + Tok +
1005 "' can never be matched!");
1006 // FIXME: Should reject these. The ARM backend hits this with $lane in a
1007 // bunch of instructions. It is unclear what the right answer is.
1009 errs() << "warning: '" << TheDef->getName() << "': "
1010 << "ignoring instruction with tied operand '"
1020 static std::string getEnumNameForToken(StringRef Str) {
1023 for (StringRef::iterator it = Str.begin(), ie = Str.end(); it != ie; ++it) {
1025 case '*': Res += "_STAR_"; break;
1026 case '%': Res += "_PCT_"; break;
1027 case ':': Res += "_COLON_"; break;
1028 case '!': Res += "_EXCLAIM_"; break;
1029 case '.': Res += "_DOT_"; break;
1030 case '<': Res += "_LT_"; break;
1031 case '>': Res += "_GT_"; break;
1032 case '-': Res += "_MINUS_"; break;
1034 if ((*it >= 'A' && *it <= 'Z') ||
1035 (*it >= 'a' && *it <= 'z') ||
1036 (*it >= '0' && *it <= '9'))
1039 Res += "_" + utostr((unsigned) *it) + "_";
1046 ClassInfo *AsmMatcherInfo::getTokenClass(StringRef Token) {
1047 ClassInfo *&Entry = TokenClasses[Token];
1050 Classes.emplace_front();
1051 Entry = &Classes.front();
1052 Entry->Kind = ClassInfo::Token;
1053 Entry->ClassName = "Token";
1054 Entry->Name = "MCK_" + getEnumNameForToken(Token);
1055 Entry->ValueName = Token;
1056 Entry->PredicateMethod = "<invalid>";
1057 Entry->RenderMethod = "<invalid>";
1058 Entry->ParserMethod = "";
1059 Entry->DiagnosticType = "";
1066 AsmMatcherInfo::getOperandClass(const CGIOperandList::OperandInfo &OI,
1068 Record *Rec = OI.Rec;
1070 Rec = cast<DefInit>(OI.MIOperandInfo->getArg(SubOpIdx))->getDef();
1071 return getOperandClass(Rec, SubOpIdx);
1075 AsmMatcherInfo::getOperandClass(Record *Rec, int SubOpIdx) {
1076 if (Rec->isSubClassOf("RegisterOperand")) {
1077 // RegisterOperand may have an associated ParserMatchClass. If it does,
1078 // use it, else just fall back to the underlying register class.
1079 const RecordVal *R = Rec->getValue("ParserMatchClass");
1080 if (!R || !R->getValue())
1081 PrintFatalError("Record `" + Rec->getName() +
1082 "' does not have a ParserMatchClass!\n");
1084 if (DefInit *DI= dyn_cast<DefInit>(R->getValue())) {
1085 Record *MatchClass = DI->getDef();
1086 if (ClassInfo *CI = AsmOperandClasses[MatchClass])
1090 // No custom match class. Just use the register class.
1091 Record *ClassRec = Rec->getValueAsDef("RegClass");
1093 PrintFatalError(Rec->getLoc(), "RegisterOperand `" + Rec->getName() +
1094 "' has no associated register class!\n");
1095 if (ClassInfo *CI = RegisterClassClasses[ClassRec])
1097 PrintFatalError(Rec->getLoc(), "register class has no class info!");
1101 if (Rec->isSubClassOf("RegisterClass")) {
1102 if (ClassInfo *CI = RegisterClassClasses[Rec])
1104 PrintFatalError(Rec->getLoc(), "register class has no class info!");
1107 if (!Rec->isSubClassOf("Operand"))
1108 PrintFatalError(Rec->getLoc(), "Operand `" + Rec->getName() +
1109 "' does not derive from class Operand!\n");
1110 Record *MatchClass = Rec->getValueAsDef("ParserMatchClass");
1111 if (ClassInfo *CI = AsmOperandClasses[MatchClass])
1114 PrintFatalError(Rec->getLoc(), "operand has no match class!");
1117 struct LessRegisterSet {
1118 bool operator() (const RegisterSet &LHS, const RegisterSet & RHS) const {
1119 // std::set<T> defines its own compariso "operator<", but it
1120 // performs a lexicographical comparison by T's innate comparison
1121 // for some reason. We don't want non-deterministic pointer
1122 // comparisons so use this instead.
1123 return std::lexicographical_compare(LHS.begin(), LHS.end(),
1124 RHS.begin(), RHS.end(),
1129 void AsmMatcherInfo::
1130 buildRegisterClasses(SmallPtrSetImpl<Record*> &SingletonRegisters) {
1131 const auto &Registers = Target.getRegBank().getRegisters();
1132 auto &RegClassList = Target.getRegBank().getRegClasses();
1134 typedef std::set<RegisterSet, LessRegisterSet> RegisterSetSet;
1136 // The register sets used for matching.
1137 RegisterSetSet RegisterSets;
1139 // Gather the defined sets.
1140 for (const CodeGenRegisterClass &RC : RegClassList)
1141 RegisterSets.insert(
1142 RegisterSet(RC.getOrder().begin(), RC.getOrder().end()));
1144 // Add any required singleton sets.
1145 for (Record *Rec : SingletonRegisters) {
1146 RegisterSets.insert(RegisterSet(&Rec, &Rec + 1));
1149 // Introduce derived sets where necessary (when a register does not determine
1150 // a unique register set class), and build the mapping of registers to the set
1151 // they should classify to.
1152 std::map<Record*, RegisterSet> RegisterMap;
1153 for (const CodeGenRegister &CGR : Registers) {
1154 // Compute the intersection of all sets containing this register.
1155 RegisterSet ContainingSet;
1157 for (const RegisterSet &RS : RegisterSets) {
1158 if (!RS.count(CGR.TheDef))
1161 if (ContainingSet.empty()) {
1167 std::swap(Tmp, ContainingSet);
1168 std::insert_iterator<RegisterSet> II(ContainingSet,
1169 ContainingSet.begin());
1170 std::set_intersection(Tmp.begin(), Tmp.end(), RS.begin(), RS.end(), II,
1174 if (!ContainingSet.empty()) {
1175 RegisterSets.insert(ContainingSet);
1176 RegisterMap.insert(std::make_pair(CGR.TheDef, ContainingSet));
1180 // Construct the register classes.
1181 std::map<RegisterSet, ClassInfo*, LessRegisterSet> RegisterSetClasses;
1183 for (const RegisterSet &RS : RegisterSets) {
1184 Classes.emplace_front();
1185 ClassInfo *CI = &Classes.front();
1186 CI->Kind = ClassInfo::RegisterClass0 + Index;
1187 CI->ClassName = "Reg" + utostr(Index);
1188 CI->Name = "MCK_Reg" + utostr(Index);
1190 CI->PredicateMethod = ""; // unused
1191 CI->RenderMethod = "addRegOperands";
1193 // FIXME: diagnostic type.
1194 CI->DiagnosticType = "";
1195 RegisterSetClasses.insert(std::make_pair(RS, CI));
1199 // Find the superclasses; we could compute only the subgroup lattice edges,
1200 // but there isn't really a point.
1201 for (const RegisterSet &RS : RegisterSets) {
1202 ClassInfo *CI = RegisterSetClasses[RS];
1203 for (const RegisterSet &RS2 : RegisterSets)
1205 std::includes(RS2.begin(), RS2.end(), RS.begin(), RS.end(),
1207 CI->SuperClasses.push_back(RegisterSetClasses[RS2]);
1210 // Name the register classes which correspond to a user defined RegisterClass.
1211 for (const CodeGenRegisterClass &RC : RegClassList) {
1212 // Def will be NULL for non-user defined register classes.
1213 Record *Def = RC.getDef();
1216 ClassInfo *CI = RegisterSetClasses[RegisterSet(RC.getOrder().begin(),
1217 RC.getOrder().end())];
1218 if (CI->ValueName.empty()) {
1219 CI->ClassName = RC.getName();
1220 CI->Name = "MCK_" + RC.getName();
1221 CI->ValueName = RC.getName();
1223 CI->ValueName = CI->ValueName + "," + RC.getName();
1225 RegisterClassClasses.insert(std::make_pair(Def, CI));
1228 // Populate the map for individual registers.
1229 for (std::map<Record*, RegisterSet>::iterator it = RegisterMap.begin(),
1230 ie = RegisterMap.end(); it != ie; ++it)
1231 RegisterClasses[it->first] = RegisterSetClasses[it->second];
1233 // Name the register classes which correspond to singleton registers.
1234 for (Record *Rec : SingletonRegisters) {
1235 ClassInfo *CI = RegisterClasses[Rec];
1236 assert(CI && "Missing singleton register class info!");
1238 if (CI->ValueName.empty()) {
1239 CI->ClassName = Rec->getName();
1240 CI->Name = "MCK_" + Rec->getName();
1241 CI->ValueName = Rec->getName();
1243 CI->ValueName = CI->ValueName + "," + Rec->getName();
1247 void AsmMatcherInfo::buildOperandClasses() {
1248 std::vector<Record*> AsmOperands =
1249 Records.getAllDerivedDefinitions("AsmOperandClass");
1251 // Pre-populate AsmOperandClasses map.
1252 for (Record *Rec : AsmOperands) {
1253 Classes.emplace_front();
1254 AsmOperandClasses[Rec] = &Classes.front();
1258 for (Record *Rec : AsmOperands) {
1259 ClassInfo *CI = AsmOperandClasses[Rec];
1260 CI->Kind = ClassInfo::UserClass0 + Index;
1262 ListInit *Supers = Rec->getValueAsListInit("SuperClasses");
1263 for (Init *I : Supers->getValues()) {
1264 DefInit *DI = dyn_cast<DefInit>(I);
1266 PrintError(Rec->getLoc(), "Invalid super class reference!");
1270 ClassInfo *SC = AsmOperandClasses[DI->getDef()];
1272 PrintError(Rec->getLoc(), "Invalid super class reference!");
1274 CI->SuperClasses.push_back(SC);
1276 CI->ClassName = Rec->getValueAsString("Name");
1277 CI->Name = "MCK_" + CI->ClassName;
1278 CI->ValueName = Rec->getName();
1280 // Get or construct the predicate method name.
1281 Init *PMName = Rec->getValueInit("PredicateMethod");
1282 if (StringInit *SI = dyn_cast<StringInit>(PMName)) {
1283 CI->PredicateMethod = SI->getValue();
1285 assert(isa<UnsetInit>(PMName) && "Unexpected PredicateMethod field!");
1286 CI->PredicateMethod = "is" + CI->ClassName;
1289 // Get or construct the render method name.
1290 Init *RMName = Rec->getValueInit("RenderMethod");
1291 if (StringInit *SI = dyn_cast<StringInit>(RMName)) {
1292 CI->RenderMethod = SI->getValue();
1294 assert(isa<UnsetInit>(RMName) && "Unexpected RenderMethod field!");
1295 CI->RenderMethod = "add" + CI->ClassName + "Operands";
1298 // Get the parse method name or leave it as empty.
1299 Init *PRMName = Rec->getValueInit("ParserMethod");
1300 if (StringInit *SI = dyn_cast<StringInit>(PRMName))
1301 CI->ParserMethod = SI->getValue();
1303 // Get the diagnostic type or leave it as empty.
1304 // Get the parse method name or leave it as empty.
1305 Init *DiagnosticType = Rec->getValueInit("DiagnosticType");
1306 if (StringInit *SI = dyn_cast<StringInit>(DiagnosticType))
1307 CI->DiagnosticType = SI->getValue();
1313 AsmMatcherInfo::AsmMatcherInfo(Record *asmParser,
1314 CodeGenTarget &target,
1315 RecordKeeper &records)
1316 : Records(records), AsmParser(asmParser), Target(target) {
1319 /// buildOperandMatchInfo - Build the necessary information to handle user
1320 /// defined operand parsing methods.
1321 void AsmMatcherInfo::buildOperandMatchInfo() {
1323 /// Map containing a mask with all operands indices that can be found for
1324 /// that class inside a instruction.
1325 typedef std::map<ClassInfo *, unsigned, less_ptr<ClassInfo>> OpClassMaskTy;
1326 OpClassMaskTy OpClassMask;
1328 for (const auto &MI : Matchables) {
1329 OpClassMask.clear();
1331 // Keep track of all operands of this instructions which belong to the
1333 for (unsigned i = 0, e = MI->AsmOperands.size(); i != e; ++i) {
1334 const MatchableInfo::AsmOperand &Op = MI->AsmOperands[i];
1335 if (Op.Class->ParserMethod.empty())
1337 unsigned &OperandMask = OpClassMask[Op.Class];
1338 OperandMask |= (1 << i);
1341 // Generate operand match info for each mnemonic/operand class pair.
1342 for (const auto &OCM : OpClassMask) {
1343 unsigned OpMask = OCM.second;
1344 ClassInfo *CI = OCM.first;
1345 OperandMatchInfo.push_back(OperandMatchEntry::create(MI.get(), CI,
1351 void AsmMatcherInfo::buildInfo() {
1352 // Build information about all of the AssemblerPredicates.
1353 std::vector<Record*> AllPredicates =
1354 Records.getAllDerivedDefinitions("Predicate");
1355 for (unsigned i = 0, e = AllPredicates.size(); i != e; ++i) {
1356 Record *Pred = AllPredicates[i];
1357 // Ignore predicates that are not intended for the assembler.
1358 if (!Pred->getValueAsBit("AssemblerMatcherPredicate"))
1361 if (Pred->getName().empty())
1362 PrintFatalError(Pred->getLoc(), "Predicate has no name!");
1364 SubtargetFeatures.insert(std::make_pair(
1365 Pred, SubtargetFeatureInfo(Pred, SubtargetFeatures.size())));
1366 DEBUG(SubtargetFeatures.find(Pred)->second.dump());
1367 assert(SubtargetFeatures.size() <= 64 && "Too many subtarget features!");
1370 // Parse the instructions; we need to do this first so that we can gather the
1371 // singleton register classes.
1372 SmallPtrSet<Record*, 16> SingletonRegisters;
1373 unsigned VariantCount = Target.getAsmParserVariantCount();
1374 for (unsigned VC = 0; VC != VariantCount; ++VC) {
1375 Record *AsmVariant = Target.getAsmParserVariant(VC);
1376 std::string CommentDelimiter =
1377 AsmVariant->getValueAsString("CommentDelimiter");
1378 AsmVariantInfo Variant;
1379 Variant.RegisterPrefix = AsmVariant->getValueAsString("RegisterPrefix");
1380 Variant.TokenizingCharacters =
1381 AsmVariant->getValueAsString("TokenizingCharacters");
1382 Variant.SeparatorCharacters =
1383 AsmVariant->getValueAsString("SeparatorCharacters");
1384 Variant.BreakCharacters =
1385 AsmVariant->getValueAsString("BreakCharacters");
1386 Variant.AsmVariantNo = AsmVariant->getValueAsInt("Variant");
1388 for (const CodeGenInstruction *CGI : Target.instructions()) {
1390 // If the tblgen -match-prefix option is specified (for tblgen hackers),
1391 // filter the set of instructions we consider.
1392 if (!StringRef(CGI->TheDef->getName()).startswith(MatchPrefix))
1395 // Ignore "codegen only" instructions.
1396 if (CGI->TheDef->getValueAsBit("isCodeGenOnly"))
1399 auto II = llvm::make_unique<MatchableInfo>(*CGI);
1401 II->initialize(*this, SingletonRegisters, Variant);
1403 // Ignore instructions which shouldn't be matched and diagnose invalid
1404 // instruction definitions with an error.
1405 if (!II->validate(CommentDelimiter, true))
1408 Matchables.push_back(std::move(II));
1411 // Parse all of the InstAlias definitions and stick them in the list of
1413 std::vector<Record*> AllInstAliases =
1414 Records.getAllDerivedDefinitions("InstAlias");
1415 for (unsigned i = 0, e = AllInstAliases.size(); i != e; ++i) {
1416 auto Alias = llvm::make_unique<CodeGenInstAlias>(AllInstAliases[i],
1417 Variant.AsmVariantNo,
1420 // If the tblgen -match-prefix option is specified (for tblgen hackers),
1421 // filter the set of instruction aliases we consider, based on the target
1423 if (!StringRef(Alias->ResultInst->TheDef->getName())
1424 .startswith( MatchPrefix))
1427 auto II = llvm::make_unique<MatchableInfo>(std::move(Alias));
1429 II->initialize(*this, SingletonRegisters, Variant);
1431 // Validate the alias definitions.
1432 II->validate(CommentDelimiter, false);
1434 Matchables.push_back(std::move(II));
1438 // Build info for the register classes.
1439 buildRegisterClasses(SingletonRegisters);
1441 // Build info for the user defined assembly operand classes.
1442 buildOperandClasses();
1444 // Build the information about matchables, now that we have fully formed
1446 std::vector<std::unique_ptr<MatchableInfo>> NewMatchables;
1447 for (auto &II : Matchables) {
1448 // Parse the tokens after the mnemonic.
1449 // Note: buildInstructionOperandReference may insert new AsmOperands, so
1450 // don't precompute the loop bound.
1451 for (unsigned i = 0; i != II->AsmOperands.size(); ++i) {
1452 MatchableInfo::AsmOperand &Op = II->AsmOperands[i];
1453 StringRef Token = Op.Token;
1455 // Check for singleton registers.
1456 if (Record *RegRecord = Op.SingletonReg) {
1457 Op.Class = RegisterClasses[RegRecord];
1458 assert(Op.Class && Op.Class->Registers.size() == 1 &&
1459 "Unexpected class for singleton register");
1463 // Check for simple tokens.
1464 if (Token[0] != '$') {
1465 Op.Class = getTokenClass(Token);
1469 if (Token.size() > 1 && isdigit(Token[1])) {
1470 Op.Class = getTokenClass(Token);
1474 // Otherwise this is an operand reference.
1475 StringRef OperandName;
1476 if (Token[1] == '{')
1477 OperandName = Token.substr(2, Token.size() - 3);
1479 OperandName = Token.substr(1);
1481 if (II->DefRec.is<const CodeGenInstruction*>())
1482 buildInstructionOperandReference(II.get(), OperandName, i);
1484 buildAliasOperandReference(II.get(), OperandName, Op);
1487 if (II->DefRec.is<const CodeGenInstruction*>()) {
1488 II->buildInstructionResultOperands();
1489 // If the instruction has a two-operand alias, build up the
1490 // matchable here. We'll add them in bulk at the end to avoid
1491 // confusing this loop.
1492 std::string Constraint =
1493 II->TheDef->getValueAsString("TwoOperandAliasConstraint");
1494 if (Constraint != "") {
1495 // Start by making a copy of the original matchable.
1496 auto AliasII = llvm::make_unique<MatchableInfo>(*II);
1498 // Adjust it to be a two-operand alias.
1499 AliasII->formTwoOperandAlias(Constraint);
1501 // Add the alias to the matchables list.
1502 NewMatchables.push_back(std::move(AliasII));
1505 II->buildAliasResultOperands();
1507 if (!NewMatchables.empty())
1508 Matchables.insert(Matchables.end(),
1509 std::make_move_iterator(NewMatchables.begin()),
1510 std::make_move_iterator(NewMatchables.end()));
1512 // Process token alias definitions and set up the associated superclass
1514 std::vector<Record*> AllTokenAliases =
1515 Records.getAllDerivedDefinitions("TokenAlias");
1516 for (Record *Rec : AllTokenAliases) {
1517 ClassInfo *FromClass = getTokenClass(Rec->getValueAsString("FromToken"));
1518 ClassInfo *ToClass = getTokenClass(Rec->getValueAsString("ToToken"));
1519 if (FromClass == ToClass)
1520 PrintFatalError(Rec->getLoc(),
1521 "error: Destination value identical to source value.");
1522 FromClass->SuperClasses.push_back(ToClass);
1525 // Reorder classes so that classes precede super classes.
1529 /// buildInstructionOperandReference - The specified operand is a reference to a
1530 /// named operand such as $src. Resolve the Class and OperandInfo pointers.
1531 void AsmMatcherInfo::
1532 buildInstructionOperandReference(MatchableInfo *II,
1533 StringRef OperandName,
1534 unsigned AsmOpIdx) {
1535 const CodeGenInstruction &CGI = *II->DefRec.get<const CodeGenInstruction*>();
1536 const CGIOperandList &Operands = CGI.Operands;
1537 MatchableInfo::AsmOperand *Op = &II->AsmOperands[AsmOpIdx];
1539 // Map this token to an operand.
1541 if (!Operands.hasOperandNamed(OperandName, Idx))
1542 PrintFatalError(II->TheDef->getLoc(),
1543 "error: unable to find operand: '" + OperandName + "'");
1545 // If the instruction operand has multiple suboperands, but the parser
1546 // match class for the asm operand is still the default "ImmAsmOperand",
1547 // then handle each suboperand separately.
1548 if (Op->SubOpIdx == -1 && Operands[Idx].MINumOperands > 1) {
1549 Record *Rec = Operands[Idx].Rec;
1550 assert(Rec->isSubClassOf("Operand") && "Unexpected operand!");
1551 Record *MatchClass = Rec->getValueAsDef("ParserMatchClass");
1552 if (MatchClass && MatchClass->getValueAsString("Name") == "Imm") {
1553 // Insert remaining suboperands after AsmOpIdx in II->AsmOperands.
1554 StringRef Token = Op->Token; // save this in case Op gets moved
1555 for (unsigned SI = 1, SE = Operands[Idx].MINumOperands; SI != SE; ++SI) {
1556 MatchableInfo::AsmOperand NewAsmOp(/*IsIsolatedToken=*/true, Token);
1557 NewAsmOp.SubOpIdx = SI;
1558 II->AsmOperands.insert(II->AsmOperands.begin()+AsmOpIdx+SI, NewAsmOp);
1560 // Replace Op with first suboperand.
1561 Op = &II->AsmOperands[AsmOpIdx]; // update the pointer in case it moved
1566 // Set up the operand class.
1567 Op->Class = getOperandClass(Operands[Idx], Op->SubOpIdx);
1569 // If the named operand is tied, canonicalize it to the untied operand.
1570 // For example, something like:
1571 // (outs GPR:$dst), (ins GPR:$src)
1572 // with an asmstring of
1574 // we want to canonicalize to:
1576 // so that we know how to provide the $dst operand when filling in the result.
1578 if (Operands[Idx].MINumOperands == 1)
1579 OITied = Operands[Idx].getTiedRegister();
1581 // The tied operand index is an MIOperand index, find the operand that
1583 std::pair<unsigned, unsigned> Idx = Operands.getSubOperandNumber(OITied);
1584 OperandName = Operands[Idx.first].Name;
1585 Op->SubOpIdx = Idx.second;
1588 Op->SrcOpName = OperandName;
1591 /// buildAliasOperandReference - When parsing an operand reference out of the
1592 /// matching string (e.g. "movsx $src, $dst"), determine what the class of the
1593 /// operand reference is by looking it up in the result pattern definition.
1594 void AsmMatcherInfo::buildAliasOperandReference(MatchableInfo *II,
1595 StringRef OperandName,
1596 MatchableInfo::AsmOperand &Op) {
1597 const CodeGenInstAlias &CGA = *II->DefRec.get<const CodeGenInstAlias*>();
1599 // Set up the operand class.
1600 for (unsigned i = 0, e = CGA.ResultOperands.size(); i != e; ++i)
1601 if (CGA.ResultOperands[i].isRecord() &&
1602 CGA.ResultOperands[i].getName() == OperandName) {
1603 // It's safe to go with the first one we find, because CodeGenInstAlias
1604 // validates that all operands with the same name have the same record.
1605 Op.SubOpIdx = CGA.ResultInstOperandIndex[i].second;
1606 // Use the match class from the Alias definition, not the
1607 // destination instruction, as we may have an immediate that's
1608 // being munged by the match class.
1609 Op.Class = getOperandClass(CGA.ResultOperands[i].getRecord(),
1611 Op.SrcOpName = OperandName;
1615 PrintFatalError(II->TheDef->getLoc(),
1616 "error: unable to find operand: '" + OperandName + "'");
1619 void MatchableInfo::buildInstructionResultOperands() {
1620 const CodeGenInstruction *ResultInst = getResultInst();
1622 // Loop over all operands of the result instruction, determining how to
1624 for (const CGIOperandList::OperandInfo &OpInfo : ResultInst->Operands) {
1625 // If this is a tied operand, just copy from the previously handled operand.
1627 if (OpInfo.MINumOperands == 1)
1628 TiedOp = OpInfo.getTiedRegister();
1630 ResOperands.push_back(ResOperand::getTiedOp(TiedOp));
1634 // Find out what operand from the asmparser this MCInst operand comes from.
1635 int SrcOperand = findAsmOperandNamed(OpInfo.Name);
1636 if (OpInfo.Name.empty() || SrcOperand == -1) {
1637 // This may happen for operands that are tied to a suboperand of a
1638 // complex operand. Simply use a dummy value here; nobody should
1639 // use this operand slot.
1640 // FIXME: The long term goal is for the MCOperand list to not contain
1641 // tied operands at all.
1642 ResOperands.push_back(ResOperand::getImmOp(0));
1646 // Check if the one AsmOperand populates the entire operand.
1647 unsigned NumOperands = OpInfo.MINumOperands;
1648 if (AsmOperands[SrcOperand].SubOpIdx == -1) {
1649 ResOperands.push_back(ResOperand::getRenderedOp(SrcOperand, NumOperands));
1653 // Add a separate ResOperand for each suboperand.
1654 for (unsigned AI = 0; AI < NumOperands; ++AI) {
1655 assert(AsmOperands[SrcOperand+AI].SubOpIdx == (int)AI &&
1656 AsmOperands[SrcOperand+AI].SrcOpName == OpInfo.Name &&
1657 "unexpected AsmOperands for suboperands");
1658 ResOperands.push_back(ResOperand::getRenderedOp(SrcOperand + AI, 1));
1663 void MatchableInfo::buildAliasResultOperands() {
1664 const CodeGenInstAlias &CGA = *DefRec.get<const CodeGenInstAlias*>();
1665 const CodeGenInstruction *ResultInst = getResultInst();
1667 // Loop over all operands of the result instruction, determining how to
1669 unsigned AliasOpNo = 0;
1670 unsigned LastOpNo = CGA.ResultInstOperandIndex.size();
1671 for (unsigned i = 0, e = ResultInst->Operands.size(); i != e; ++i) {
1672 const CGIOperandList::OperandInfo *OpInfo = &ResultInst->Operands[i];
1674 // If this is a tied operand, just copy from the previously handled operand.
1676 if (OpInfo->MINumOperands == 1)
1677 TiedOp = OpInfo->getTiedRegister();
1679 ResOperands.push_back(ResOperand::getTiedOp(TiedOp));
1683 // Handle all the suboperands for this operand.
1684 const std::string &OpName = OpInfo->Name;
1685 for ( ; AliasOpNo < LastOpNo &&
1686 CGA.ResultInstOperandIndex[AliasOpNo].first == i; ++AliasOpNo) {
1687 int SubIdx = CGA.ResultInstOperandIndex[AliasOpNo].second;
1689 // Find out what operand from the asmparser that this MCInst operand
1691 switch (CGA.ResultOperands[AliasOpNo].Kind) {
1692 case CodeGenInstAlias::ResultOperand::K_Record: {
1693 StringRef Name = CGA.ResultOperands[AliasOpNo].getName();
1694 int SrcOperand = findAsmOperand(Name, SubIdx);
1695 if (SrcOperand == -1)
1696 PrintFatalError(TheDef->getLoc(), "Instruction '" +
1697 TheDef->getName() + "' has operand '" + OpName +
1698 "' that doesn't appear in asm string!");
1699 unsigned NumOperands = (SubIdx == -1 ? OpInfo->MINumOperands : 1);
1700 ResOperands.push_back(ResOperand::getRenderedOp(SrcOperand,
1704 case CodeGenInstAlias::ResultOperand::K_Imm: {
1705 int64_t ImmVal = CGA.ResultOperands[AliasOpNo].getImm();
1706 ResOperands.push_back(ResOperand::getImmOp(ImmVal));
1709 case CodeGenInstAlias::ResultOperand::K_Reg: {
1710 Record *Reg = CGA.ResultOperands[AliasOpNo].getRegister();
1711 ResOperands.push_back(ResOperand::getRegOp(Reg));
1719 static unsigned getConverterOperandID(const std::string &Name,
1720 SmallSetVector<std::string, 16> &Table,
1722 IsNew = Table.insert(Name);
1724 unsigned ID = IsNew ? Table.size() - 1 :
1725 std::find(Table.begin(), Table.end(), Name) - Table.begin();
1727 assert(ID < Table.size());
1733 static void emitConvertFuncs(CodeGenTarget &Target, StringRef ClassName,
1734 std::vector<std::unique_ptr<MatchableInfo>> &Infos,
1736 SmallSetVector<std::string, 16> OperandConversionKinds;
1737 SmallSetVector<std::string, 16> InstructionConversionKinds;
1738 std::vector<std::vector<uint8_t> > ConversionTable;
1739 size_t MaxRowLength = 2; // minimum is custom converter plus terminator.
1741 // TargetOperandClass - This is the target's operand class, like X86Operand.
1742 std::string TargetOperandClass = Target.getName() + "Operand";
1744 // Write the convert function to a separate stream, so we can drop it after
1745 // the enum. We'll build up the conversion handlers for the individual
1746 // operand types opportunistically as we encounter them.
1747 std::string ConvertFnBody;
1748 raw_string_ostream CvtOS(ConvertFnBody);
1749 // Start the unified conversion function.
1750 CvtOS << "void " << Target.getName() << ClassName << "::\n"
1751 << "convertToMCInst(unsigned Kind, MCInst &Inst, "
1752 << "unsigned Opcode,\n"
1753 << " const OperandVector"
1754 << " &Operands) {\n"
1755 << " assert(Kind < CVT_NUM_SIGNATURES && \"Invalid signature!\");\n"
1756 << " const uint8_t *Converter = ConversionTable[Kind];\n"
1757 << " Inst.setOpcode(Opcode);\n"
1758 << " for (const uint8_t *p = Converter; *p; p+= 2) {\n"
1759 << " switch (*p) {\n"
1760 << " default: llvm_unreachable(\"invalid conversion entry!\");\n"
1761 << " case CVT_Reg:\n"
1762 << " static_cast<" << TargetOperandClass
1763 << "&>(*Operands[*(p + 1)]).addRegOperands(Inst, 1);\n"
1765 << " case CVT_Tied:\n"
1766 << " Inst.addOperand(Inst.getOperand(*(p + 1)));\n"
1769 std::string OperandFnBody;
1770 raw_string_ostream OpOS(OperandFnBody);
1771 // Start the operand number lookup function.
1772 OpOS << "void " << Target.getName() << ClassName << "::\n"
1773 << "convertToMapAndConstraints(unsigned Kind,\n";
1775 OpOS << "const OperandVector &Operands) {\n"
1776 << " assert(Kind < CVT_NUM_SIGNATURES && \"Invalid signature!\");\n"
1777 << " unsigned NumMCOperands = 0;\n"
1778 << " const uint8_t *Converter = ConversionTable[Kind];\n"
1779 << " for (const uint8_t *p = Converter; *p; p+= 2) {\n"
1780 << " switch (*p) {\n"
1781 << " default: llvm_unreachable(\"invalid conversion entry!\");\n"
1782 << " case CVT_Reg:\n"
1783 << " Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);\n"
1784 << " Operands[*(p + 1)]->setConstraint(\"r\");\n"
1785 << " ++NumMCOperands;\n"
1787 << " case CVT_Tied:\n"
1788 << " ++NumMCOperands;\n"
1791 // Pre-populate the operand conversion kinds with the standard always
1792 // available entries.
1793 OperandConversionKinds.insert("CVT_Done");
1794 OperandConversionKinds.insert("CVT_Reg");
1795 OperandConversionKinds.insert("CVT_Tied");
1796 enum { CVT_Done, CVT_Reg, CVT_Tied };
1798 for (auto &II : Infos) {
1799 // Check if we have a custom match function.
1800 std::string AsmMatchConverter =
1801 II->getResultInst()->TheDef->getValueAsString("AsmMatchConverter");
1802 if (!AsmMatchConverter.empty() && II->UseInstAsmMatchConverter) {
1803 std::string Signature = "ConvertCustom_" + AsmMatchConverter;
1804 II->ConversionFnKind = Signature;
1806 // Check if we have already generated this signature.
1807 if (!InstructionConversionKinds.insert(Signature))
1810 // Remember this converter for the kind enum.
1811 unsigned KindID = OperandConversionKinds.size();
1812 OperandConversionKinds.insert("CVT_" +
1813 getEnumNameForToken(AsmMatchConverter));
1815 // Add the converter row for this instruction.
1816 ConversionTable.emplace_back();
1817 ConversionTable.back().push_back(KindID);
1818 ConversionTable.back().push_back(CVT_Done);
1820 // Add the handler to the conversion driver function.
1821 CvtOS << " case CVT_"
1822 << getEnumNameForToken(AsmMatchConverter) << ":\n"
1823 << " " << AsmMatchConverter << "(Inst, Operands);\n"
1826 // FIXME: Handle the operand number lookup for custom match functions.
1830 // Build the conversion function signature.
1831 std::string Signature = "Convert";
1833 std::vector<uint8_t> ConversionRow;
1835 // Compute the convert enum and the case body.
1836 MaxRowLength = std::max(MaxRowLength, II->ResOperands.size()*2 + 1 );
1838 for (unsigned i = 0, e = II->ResOperands.size(); i != e; ++i) {
1839 const MatchableInfo::ResOperand &OpInfo = II->ResOperands[i];
1841 // Generate code to populate each result operand.
1842 switch (OpInfo.Kind) {
1843 case MatchableInfo::ResOperand::RenderAsmOperand: {
1844 // This comes from something we parsed.
1845 const MatchableInfo::AsmOperand &Op =
1846 II->AsmOperands[OpInfo.AsmOperandNum];
1848 // Registers are always converted the same, don't duplicate the
1849 // conversion function based on them.
1852 Class = Op.Class->isRegisterClass() ? "Reg" : Op.Class->ClassName;
1854 Signature += utostr(OpInfo.MINumOperands);
1855 Signature += "_" + itostr(OpInfo.AsmOperandNum);
1857 // Add the conversion kind, if necessary, and get the associated ID
1858 // the index of its entry in the vector).
1859 std::string Name = "CVT_" + (Op.Class->isRegisterClass() ? "Reg" :
1860 Op.Class->RenderMethod);
1861 Name = getEnumNameForToken(Name);
1863 bool IsNewConverter = false;
1864 unsigned ID = getConverterOperandID(Name, OperandConversionKinds,
1867 // Add the operand entry to the instruction kind conversion row.
1868 ConversionRow.push_back(ID);
1869 ConversionRow.push_back(OpInfo.AsmOperandNum);
1871 if (!IsNewConverter)
1874 // This is a new operand kind. Add a handler for it to the
1875 // converter driver.
1876 CvtOS << " case " << Name << ":\n"
1877 << " static_cast<" << TargetOperandClass
1878 << "&>(*Operands[*(p + 1)])." << Op.Class->RenderMethod
1879 << "(Inst, " << OpInfo.MINumOperands << ");\n"
1882 // Add a handler for the operand number lookup.
1883 OpOS << " case " << Name << ":\n"
1884 << " Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);\n";
1886 if (Op.Class->isRegisterClass())
1887 OpOS << " Operands[*(p + 1)]->setConstraint(\"r\");\n";
1889 OpOS << " Operands[*(p + 1)]->setConstraint(\"m\");\n";
1890 OpOS << " NumMCOperands += " << OpInfo.MINumOperands << ";\n"
1894 case MatchableInfo::ResOperand::TiedOperand: {
1895 // If this operand is tied to a previous one, just copy the MCInst
1896 // operand from the earlier one.We can only tie single MCOperand values.
1897 assert(OpInfo.MINumOperands == 1 && "Not a singular MCOperand");
1898 unsigned TiedOp = OpInfo.TiedOperandNum;
1899 assert(i > TiedOp && "Tied operand precedes its target!");
1900 Signature += "__Tie" + utostr(TiedOp);
1901 ConversionRow.push_back(CVT_Tied);
1902 ConversionRow.push_back(TiedOp);
1905 case MatchableInfo::ResOperand::ImmOperand: {
1906 int64_t Val = OpInfo.ImmVal;
1907 std::string Ty = "imm_" + itostr(Val);
1908 Ty = getEnumNameForToken(Ty);
1909 Signature += "__" + Ty;
1911 std::string Name = "CVT_" + Ty;
1912 bool IsNewConverter = false;
1913 unsigned ID = getConverterOperandID(Name, OperandConversionKinds,
1915 // Add the operand entry to the instruction kind conversion row.
1916 ConversionRow.push_back(ID);
1917 ConversionRow.push_back(0);
1919 if (!IsNewConverter)
1922 CvtOS << " case " << Name << ":\n"
1923 << " Inst.addOperand(MCOperand::createImm(" << Val << "));\n"
1926 OpOS << " case " << Name << ":\n"
1927 << " Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);\n"
1928 << " Operands[*(p + 1)]->setConstraint(\"\");\n"
1929 << " ++NumMCOperands;\n"
1933 case MatchableInfo::ResOperand::RegOperand: {
1934 std::string Reg, Name;
1935 if (!OpInfo.Register) {
1939 Reg = getQualifiedName(OpInfo.Register);
1940 Name = "reg" + OpInfo.Register->getName();
1942 Signature += "__" + Name;
1943 Name = "CVT_" + Name;
1944 bool IsNewConverter = false;
1945 unsigned ID = getConverterOperandID(Name, OperandConversionKinds,
1947 // Add the operand entry to the instruction kind conversion row.
1948 ConversionRow.push_back(ID);
1949 ConversionRow.push_back(0);
1951 if (!IsNewConverter)
1953 CvtOS << " case " << Name << ":\n"
1954 << " Inst.addOperand(MCOperand::createReg(" << Reg << "));\n"
1957 OpOS << " case " << Name << ":\n"
1958 << " Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);\n"
1959 << " Operands[*(p + 1)]->setConstraint(\"m\");\n"
1960 << " ++NumMCOperands;\n"
1966 // If there were no operands, add to the signature to that effect
1967 if (Signature == "Convert")
1968 Signature += "_NoOperands";
1970 II->ConversionFnKind = Signature;
1972 // Save the signature. If we already have it, don't add a new row
1974 if (!InstructionConversionKinds.insert(Signature))
1977 // Add the row to the table.
1978 ConversionTable.push_back(std::move(ConversionRow));
1981 // Finish up the converter driver function.
1982 CvtOS << " }\n }\n}\n\n";
1984 // Finish up the operand number lookup function.
1985 OpOS << " }\n }\n}\n\n";
1987 OS << "namespace {\n";
1989 // Output the operand conversion kind enum.
1990 OS << "enum OperatorConversionKind {\n";
1991 for (unsigned i = 0, e = OperandConversionKinds.size(); i != e; ++i)
1992 OS << " " << OperandConversionKinds[i] << ",\n";
1993 OS << " CVT_NUM_CONVERTERS\n";
1996 // Output the instruction conversion kind enum.
1997 OS << "enum InstructionConversionKind {\n";
1998 for (const std::string &Signature : InstructionConversionKinds)
1999 OS << " " << Signature << ",\n";
2000 OS << " CVT_NUM_SIGNATURES\n";
2004 OS << "} // end anonymous namespace\n\n";
2006 // Output the conversion table.
2007 OS << "static const uint8_t ConversionTable[CVT_NUM_SIGNATURES]["
2008 << MaxRowLength << "] = {\n";
2010 for (unsigned Row = 0, ERow = ConversionTable.size(); Row != ERow; ++Row) {
2011 assert(ConversionTable[Row].size() % 2 == 0 && "bad conversion row!");
2012 OS << " // " << InstructionConversionKinds[Row] << "\n";
2014 for (unsigned i = 0, e = ConversionTable[Row].size(); i != e; i += 2)
2015 OS << OperandConversionKinds[ConversionTable[Row][i]] << ", "
2016 << (unsigned)(ConversionTable[Row][i + 1]) << ", ";
2017 OS << "CVT_Done },\n";
2022 // Spit out the conversion driver function.
2025 // Spit out the operand number lookup function.
2029 /// emitMatchClassEnumeration - Emit the enumeration for match class kinds.
2030 static void emitMatchClassEnumeration(CodeGenTarget &Target,
2031 std::forward_list<ClassInfo> &Infos,
2033 OS << "namespace {\n\n";
2035 OS << "/// MatchClassKind - The kinds of classes which participate in\n"
2036 << "/// instruction matching.\n";
2037 OS << "enum MatchClassKind {\n";
2038 OS << " InvalidMatchClass = 0,\n";
2039 for (const auto &CI : Infos) {
2040 OS << " " << CI.Name << ", // ";
2041 if (CI.Kind == ClassInfo::Token) {
2042 OS << "'" << CI.ValueName << "'\n";
2043 } else if (CI.isRegisterClass()) {
2044 if (!CI.ValueName.empty())
2045 OS << "register class '" << CI.ValueName << "'\n";
2047 OS << "derived register class\n";
2049 OS << "user defined class '" << CI.ValueName << "'\n";
2052 OS << " NumMatchClassKinds\n";
2058 /// emitValidateOperandClass - Emit the function to validate an operand class.
2059 static void emitValidateOperandClass(AsmMatcherInfo &Info,
2061 OS << "static unsigned validateOperandClass(MCParsedAsmOperand &GOp, "
2062 << "MatchClassKind Kind) {\n";
2063 OS << " " << Info.Target.getName() << "Operand &Operand = ("
2064 << Info.Target.getName() << "Operand&)GOp;\n";
2066 // The InvalidMatchClass is not to match any operand.
2067 OS << " if (Kind == InvalidMatchClass)\n";
2068 OS << " return MCTargetAsmParser::Match_InvalidOperand;\n\n";
2070 // Check for Token operands first.
2071 // FIXME: Use a more specific diagnostic type.
2072 OS << " if (Operand.isToken())\n";
2073 OS << " return isSubclass(matchTokenString(Operand.getToken()), Kind) ?\n"
2074 << " MCTargetAsmParser::Match_Success :\n"
2075 << " MCTargetAsmParser::Match_InvalidOperand;\n\n";
2077 // Check the user classes. We don't care what order since we're only
2078 // actually matching against one of them.
2079 for (const auto &CI : Info.Classes) {
2080 if (!CI.isUserClass())
2083 OS << " // '" << CI.ClassName << "' class\n";
2084 OS << " if (Kind == " << CI.Name << ") {\n";
2085 OS << " if (Operand." << CI.PredicateMethod << "())\n";
2086 OS << " return MCTargetAsmParser::Match_Success;\n";
2087 if (!CI.DiagnosticType.empty())
2088 OS << " return " << Info.Target.getName() << "AsmParser::Match_"
2089 << CI.DiagnosticType << ";\n";
2093 // Check for register operands, including sub-classes.
2094 OS << " if (Operand.isReg()) {\n";
2095 OS << " MatchClassKind OpKind;\n";
2096 OS << " switch (Operand.getReg()) {\n";
2097 OS << " default: OpKind = InvalidMatchClass; break;\n";
2098 for (const auto &RC : Info.RegisterClasses)
2099 OS << " case " << Info.Target.getName() << "::"
2100 << RC.first->getName() << ": OpKind = " << RC.second->Name
2103 OS << " return isSubclass(OpKind, Kind) ? "
2104 << "MCTargetAsmParser::Match_Success :\n "
2105 << " MCTargetAsmParser::Match_InvalidOperand;\n }\n\n";
2107 // Generic fallthrough match failure case for operands that don't have
2108 // specialized diagnostic types.
2109 OS << " return MCTargetAsmParser::Match_InvalidOperand;\n";
2113 /// emitIsSubclass - Emit the subclass predicate function.
2114 static void emitIsSubclass(CodeGenTarget &Target,
2115 std::forward_list<ClassInfo> &Infos,
2117 OS << "/// isSubclass - Compute whether \\p A is a subclass of \\p B.\n";
2118 OS << "static bool isSubclass(MatchClassKind A, MatchClassKind B) {\n";
2119 OS << " if (A == B)\n";
2120 OS << " return true;\n\n";
2123 raw_string_ostream SS(OStr);
2125 SS << " switch (A) {\n";
2126 SS << " default:\n";
2127 SS << " return false;\n";
2128 for (const auto &A : Infos) {
2129 std::vector<StringRef> SuperClasses;
2130 for (const auto &B : Infos) {
2131 if (&A != &B && A.isSubsetOf(B))
2132 SuperClasses.push_back(B.Name);
2135 if (SuperClasses.empty())
2139 SS << "\n case " << A.Name << ":\n";
2141 if (SuperClasses.size() == 1) {
2142 SS << " return B == " << SuperClasses.back().str() << ";\n";
2146 if (!SuperClasses.empty()) {
2147 SS << " switch (B) {\n";
2148 SS << " default: return false;\n";
2149 for (unsigned i = 0, e = SuperClasses.size(); i != e; ++i)
2150 SS << " case " << SuperClasses[i].str() << ": return true;\n";
2153 // No case statement to emit
2154 SS << " return false;\n";
2159 // If there were case statements emitted into the string stream, write them
2160 // to the output stream, otherwise write the default.
2164 OS << " return false;\n";
2169 /// emitMatchTokenString - Emit the function to match a token string to the
2170 /// appropriate match class value.
2171 static void emitMatchTokenString(CodeGenTarget &Target,
2172 std::forward_list<ClassInfo> &Infos,
2174 // Construct the match list.
2175 std::vector<StringMatcher::StringPair> Matches;
2176 for (const auto &CI : Infos) {
2177 if (CI.Kind == ClassInfo::Token)
2178 Matches.emplace_back(CI.ValueName, "return " + CI.Name + ";");
2181 OS << "static MatchClassKind matchTokenString(StringRef Name) {\n";
2183 StringMatcher("Name", Matches, OS).Emit();
2185 OS << " return InvalidMatchClass;\n";
2189 /// emitMatchRegisterName - Emit the function to match a string to the target
2190 /// specific register enum.
2191 static void emitMatchRegisterName(CodeGenTarget &Target, Record *AsmParser,
2193 // Construct the match list.
2194 std::vector<StringMatcher::StringPair> Matches;
2195 const auto &Regs = Target.getRegBank().getRegisters();
2196 for (const CodeGenRegister &Reg : Regs) {
2197 if (Reg.TheDef->getValueAsString("AsmName").empty())
2200 Matches.emplace_back(Reg.TheDef->getValueAsString("AsmName"),
2201 "return " + utostr(Reg.EnumValue) + ";");
2204 OS << "static unsigned MatchRegisterName(StringRef Name) {\n";
2206 StringMatcher("Name", Matches, OS).Emit();
2208 OS << " return 0;\n";
2212 static const char *getMinimalTypeForRange(uint64_t Range) {
2213 assert(Range <= 0xFFFFFFFFFFFFFFFFULL && "Enum too large");
2214 if (Range > 0xFFFFFFFFULL)
2223 static const char *getMinimalRequiredFeaturesType(const AsmMatcherInfo &Info) {
2224 uint64_t MaxIndex = Info.SubtargetFeatures.size();
2227 return getMinimalTypeForRange(1ULL << MaxIndex);
2230 /// emitSubtargetFeatureFlagEnumeration - Emit the subtarget feature flag
2232 static void emitSubtargetFeatureFlagEnumeration(AsmMatcherInfo &Info,
2234 OS << "// Flags for subtarget features that participate in "
2235 << "instruction matching.\n";
2236 OS << "enum SubtargetFeatureFlag : " << getMinimalRequiredFeaturesType(Info)
2238 for (const auto &SF : Info.SubtargetFeatures) {
2239 const SubtargetFeatureInfo &SFI = SF.second;
2240 OS << " " << SFI.getEnumName() << " = (1ULL << " << SFI.Index << "),\n";
2242 OS << " Feature_None = 0\n";
2246 /// emitOperandDiagnosticTypes - Emit the operand matching diagnostic types.
2247 static void emitOperandDiagnosticTypes(AsmMatcherInfo &Info, raw_ostream &OS) {
2248 // Get the set of diagnostic types from all of the operand classes.
2249 std::set<StringRef> Types;
2250 for (std::map<Record*, ClassInfo*>::const_iterator
2251 I = Info.AsmOperandClasses.begin(),
2252 E = Info.AsmOperandClasses.end(); I != E; ++I) {
2253 if (!I->second->DiagnosticType.empty())
2254 Types.insert(I->second->DiagnosticType);
2257 if (Types.empty()) return;
2259 // Now emit the enum entries.
2260 for (std::set<StringRef>::const_iterator I = Types.begin(), E = Types.end();
2262 OS << " Match_" << *I << ",\n";
2263 OS << " END_OPERAND_DIAGNOSTIC_TYPES\n";
2266 /// emitGetSubtargetFeatureName - Emit the helper function to get the
2267 /// user-level name for a subtarget feature.
2268 static void emitGetSubtargetFeatureName(AsmMatcherInfo &Info, raw_ostream &OS) {
2269 OS << "// User-level names for subtarget features that participate in\n"
2270 << "// instruction matching.\n"
2271 << "static const char *getSubtargetFeatureName(uint64_t Val) {\n";
2272 if (!Info.SubtargetFeatures.empty()) {
2273 OS << " switch(Val) {\n";
2274 for (const auto &SF : Info.SubtargetFeatures) {
2275 const SubtargetFeatureInfo &SFI = SF.second;
2276 // FIXME: Totally just a placeholder name to get the algorithm working.
2277 OS << " case " << SFI.getEnumName() << ": return \""
2278 << SFI.TheDef->getValueAsString("PredicateName") << "\";\n";
2280 OS << " default: return \"(unknown)\";\n";
2283 // Nothing to emit, so skip the switch
2284 OS << " return \"(unknown)\";\n";
2289 /// emitComputeAvailableFeatures - Emit the function to compute the list of
2290 /// available features given a subtarget.
2291 static void emitComputeAvailableFeatures(AsmMatcherInfo &Info,
2293 std::string ClassName =
2294 Info.AsmParser->getValueAsString("AsmParserClassName");
2296 OS << "uint64_t " << Info.Target.getName() << ClassName << "::\n"
2297 << "ComputeAvailableFeatures(const FeatureBitset& FB) const {\n";
2298 OS << " uint64_t Features = 0;\n";
2299 for (const auto &SF : Info.SubtargetFeatures) {
2300 const SubtargetFeatureInfo &SFI = SF.second;
2303 std::string CondStorage =
2304 SFI.TheDef->getValueAsString("AssemblerCondString");
2305 StringRef Conds = CondStorage;
2306 std::pair<StringRef,StringRef> Comma = Conds.split(',');
2313 StringRef Cond = Comma.first;
2314 if (Cond[0] == '!') {
2316 Cond = Cond.substr(1);
2322 OS << "FB[" << Info.Target.getName() << "::" << Cond << "])";
2324 if (Comma.second.empty())
2328 Comma = Comma.second.split(',');
2332 OS << " Features |= " << SFI.getEnumName() << ";\n";
2334 OS << " return Features;\n";
2338 static std::string GetAliasRequiredFeatures(Record *R,
2339 const AsmMatcherInfo &Info) {
2340 std::vector<Record*> ReqFeatures = R->getValueAsListOfDefs("Predicates");
2342 unsigned NumFeatures = 0;
2343 for (unsigned i = 0, e = ReqFeatures.size(); i != e; ++i) {
2344 const SubtargetFeatureInfo *F = Info.getSubtargetFeature(ReqFeatures[i]);
2347 PrintFatalError(R->getLoc(), "Predicate '" + ReqFeatures[i]->getName() +
2348 "' is not marked as an AssemblerPredicate!");
2353 Result += F->getEnumName();
2357 if (NumFeatures > 1)
2358 Result = '(' + Result + ')';
2362 static void emitMnemonicAliasVariant(raw_ostream &OS,const AsmMatcherInfo &Info,
2363 std::vector<Record*> &Aliases,
2364 unsigned Indent = 0,
2365 StringRef AsmParserVariantName = StringRef()){
2366 // Keep track of all the aliases from a mnemonic. Use an std::map so that the
2367 // iteration order of the map is stable.
2368 std::map<std::string, std::vector<Record*> > AliasesFromMnemonic;
2370 for (unsigned i = 0, e = Aliases.size(); i != e; ++i) {
2371 Record *R = Aliases[i];
2372 // FIXME: Allow AssemblerVariantName to be a comma separated list.
2373 std::string AsmVariantName = R->getValueAsString("AsmVariantName");
2374 if (AsmVariantName != AsmParserVariantName)
2376 AliasesFromMnemonic[R->getValueAsString("FromMnemonic")].push_back(R);
2378 if (AliasesFromMnemonic.empty())
2381 // Process each alias a "from" mnemonic at a time, building the code executed
2382 // by the string remapper.
2383 std::vector<StringMatcher::StringPair> Cases;
2384 for (std::map<std::string, std::vector<Record*> >::iterator
2385 I = AliasesFromMnemonic.begin(), E = AliasesFromMnemonic.end();
2387 const std::vector<Record*> &ToVec = I->second;
2389 // Loop through each alias and emit code that handles each case. If there
2390 // are two instructions without predicates, emit an error. If there is one,
2392 std::string MatchCode;
2393 int AliasWithNoPredicate = -1;
2395 for (unsigned i = 0, e = ToVec.size(); i != e; ++i) {
2396 Record *R = ToVec[i];
2397 std::string FeatureMask = GetAliasRequiredFeatures(R, Info);
2399 // If this unconditionally matches, remember it for later and diagnose
2401 if (FeatureMask.empty()) {
2402 if (AliasWithNoPredicate != -1) {
2403 // We can't have two aliases from the same mnemonic with no predicate.
2404 PrintError(ToVec[AliasWithNoPredicate]->getLoc(),
2405 "two MnemonicAliases with the same 'from' mnemonic!");
2406 PrintFatalError(R->getLoc(), "this is the other MnemonicAlias.");
2409 AliasWithNoPredicate = i;
2412 if (R->getValueAsString("ToMnemonic") == I->first)
2413 PrintFatalError(R->getLoc(), "MnemonicAlias to the same string");
2415 if (!MatchCode.empty())
2416 MatchCode += "else ";
2417 MatchCode += "if ((Features & " + FeatureMask + ") == "+FeatureMask+")\n";
2418 MatchCode += " Mnemonic = \"" +R->getValueAsString("ToMnemonic")+"\";\n";
2421 if (AliasWithNoPredicate != -1) {
2422 Record *R = ToVec[AliasWithNoPredicate];
2423 if (!MatchCode.empty())
2424 MatchCode += "else\n ";
2425 MatchCode += "Mnemonic = \"" + R->getValueAsString("ToMnemonic")+"\";\n";
2428 MatchCode += "return;";
2430 Cases.push_back(std::make_pair(I->first, MatchCode));
2432 StringMatcher("Mnemonic", Cases, OS).Emit(Indent);
2435 /// emitMnemonicAliases - If the target has any MnemonicAlias<> definitions,
2436 /// emit a function for them and return true, otherwise return false.
2437 static bool emitMnemonicAliases(raw_ostream &OS, const AsmMatcherInfo &Info,
2438 CodeGenTarget &Target) {
2439 // Ignore aliases when match-prefix is set.
2440 if (!MatchPrefix.empty())
2443 std::vector<Record*> Aliases =
2444 Info.getRecords().getAllDerivedDefinitions("MnemonicAlias");
2445 if (Aliases.empty()) return false;
2447 OS << "static void applyMnemonicAliases(StringRef &Mnemonic, "
2448 "uint64_t Features, unsigned VariantID) {\n";
2449 OS << " switch (VariantID) {\n";
2450 unsigned VariantCount = Target.getAsmParserVariantCount();
2451 for (unsigned VC = 0; VC != VariantCount; ++VC) {
2452 Record *AsmVariant = Target.getAsmParserVariant(VC);
2453 int AsmParserVariantNo = AsmVariant->getValueAsInt("Variant");
2454 std::string AsmParserVariantName = AsmVariant->getValueAsString("Name");
2455 OS << " case " << AsmParserVariantNo << ":\n";
2456 emitMnemonicAliasVariant(OS, Info, Aliases, /*Indent=*/2,
2457 AsmParserVariantName);
2462 // Emit aliases that apply to all variants.
2463 emitMnemonicAliasVariant(OS, Info, Aliases);
2470 static void emitCustomOperandParsing(raw_ostream &OS, CodeGenTarget &Target,
2471 const AsmMatcherInfo &Info, StringRef ClassName,
2472 StringToOffsetTable &StringTable,
2473 unsigned MaxMnemonicIndex) {
2474 unsigned MaxMask = 0;
2475 for (std::vector<OperandMatchEntry>::const_iterator it =
2476 Info.OperandMatchInfo.begin(), ie = Info.OperandMatchInfo.end();
2478 MaxMask |= it->OperandMask;
2481 // Emit the static custom operand parsing table;
2482 OS << "namespace {\n";
2483 OS << " struct OperandMatchEntry {\n";
2484 OS << " " << getMinimalRequiredFeaturesType(Info)
2485 << " RequiredFeatures;\n";
2486 OS << " " << getMinimalTypeForRange(MaxMnemonicIndex)
2488 OS << " " << getMinimalTypeForRange(std::distance(
2489 Info.Classes.begin(), Info.Classes.end())) << " Class;\n";
2490 OS << " " << getMinimalTypeForRange(MaxMask)
2491 << " OperandMask;\n\n";
2492 OS << " StringRef getMnemonic() const {\n";
2493 OS << " return StringRef(MnemonicTable + Mnemonic + 1,\n";
2494 OS << " MnemonicTable[Mnemonic]);\n";
2498 OS << " // Predicate for searching for an opcode.\n";
2499 OS << " struct LessOpcodeOperand {\n";
2500 OS << " bool operator()(const OperandMatchEntry &LHS, StringRef RHS) {\n";
2501 OS << " return LHS.getMnemonic() < RHS;\n";
2503 OS << " bool operator()(StringRef LHS, const OperandMatchEntry &RHS) {\n";
2504 OS << " return LHS < RHS.getMnemonic();\n";
2506 OS << " bool operator()(const OperandMatchEntry &LHS,";
2507 OS << " const OperandMatchEntry &RHS) {\n";
2508 OS << " return LHS.getMnemonic() < RHS.getMnemonic();\n";
2512 OS << "} // end anonymous namespace.\n\n";
2514 OS << "static const OperandMatchEntry OperandMatchTable["
2515 << Info.OperandMatchInfo.size() << "] = {\n";
2517 OS << " /* Operand List Mask, Mnemonic, Operand Class, Features */\n";
2518 for (std::vector<OperandMatchEntry>::const_iterator it =
2519 Info.OperandMatchInfo.begin(), ie = Info.OperandMatchInfo.end();
2521 const OperandMatchEntry &OMI = *it;
2522 const MatchableInfo &II = *OMI.MI;
2526 // Write the required features mask.
2527 if (!II.RequiredFeatures.empty()) {
2528 for (unsigned i = 0, e = II.RequiredFeatures.size(); i != e; ++i) {
2530 OS << II.RequiredFeatures[i]->getEnumName();
2535 // Store a pascal-style length byte in the mnemonic.
2536 std::string LenMnemonic = char(II.Mnemonic.size()) + II.Mnemonic.str();
2537 OS << ", " << StringTable.GetOrAddStringOffset(LenMnemonic, false)
2538 << " /* " << II.Mnemonic << " */, ";
2542 OS << ", " << OMI.OperandMask;
2544 bool printComma = false;
2545 for (int i = 0, e = 31; i !=e; ++i)
2546 if (OMI.OperandMask & (1 << i)) {
2558 // Emit the operand class switch to call the correct custom parser for
2559 // the found operand class.
2560 OS << Target.getName() << ClassName << "::OperandMatchResultTy "
2561 << Target.getName() << ClassName << "::\n"
2562 << "tryCustomParseOperand(OperandVector"
2563 << " &Operands,\n unsigned MCK) {\n\n"
2564 << " switch(MCK) {\n";
2566 for (const auto &CI : Info.Classes) {
2567 if (CI.ParserMethod.empty())
2569 OS << " case " << CI.Name << ":\n"
2570 << " return " << CI.ParserMethod << "(Operands);\n";
2573 OS << " default:\n";
2574 OS << " return MatchOperand_NoMatch;\n";
2576 OS << " return MatchOperand_NoMatch;\n";
2579 // Emit the static custom operand parser. This code is very similar with
2580 // the other matcher. Also use MatchResultTy here just in case we go for
2581 // a better error handling.
2582 OS << Target.getName() << ClassName << "::OperandMatchResultTy "
2583 << Target.getName() << ClassName << "::\n"
2584 << "MatchOperandParserImpl(OperandVector"
2585 << " &Operands,\n StringRef Mnemonic) {\n";
2587 // Emit code to get the available features.
2588 OS << " // Get the current feature set.\n";
2589 OS << " uint64_t AvailableFeatures = getAvailableFeatures();\n\n";
2591 OS << " // Get the next operand index.\n";
2592 OS << " unsigned NextOpNum = Operands.size();\n";
2594 // Emit code to search the table.
2595 OS << " // Search the table.\n";
2596 OS << " std::pair<const OperandMatchEntry*, const OperandMatchEntry*>";
2597 OS << " MnemonicRange\n";
2598 OS << " (OperandMatchTable, OperandMatchTable+";
2599 OS << Info.OperandMatchInfo.size() << ");\n";
2600 OS << " if(!Mnemonic.empty())\n";
2601 OS << " MnemonicRange = std::equal_range(OperandMatchTable,";
2602 OS << " OperandMatchTable+"
2603 << Info.OperandMatchInfo.size() << ", Mnemonic,\n"
2604 << " LessOpcodeOperand());\n\n";
2606 OS << " if (MnemonicRange.first == MnemonicRange.second)\n";
2607 OS << " return MatchOperand_NoMatch;\n\n";
2609 OS << " for (const OperandMatchEntry *it = MnemonicRange.first,\n"
2610 << " *ie = MnemonicRange.second; it != ie; ++it) {\n";
2612 OS << " // equal_range guarantees that instruction mnemonic matches.\n";
2613 OS << " assert(Mnemonic == it->getMnemonic());\n\n";
2615 // Emit check that the required features are available.
2616 OS << " // check if the available features match\n";
2617 OS << " if ((AvailableFeatures & it->RequiredFeatures) "
2618 << "!= it->RequiredFeatures) {\n";
2619 OS << " continue;\n";
2622 // Emit check to ensure the operand number matches.
2623 OS << " // check if the operand in question has a custom parser.\n";
2624 OS << " if (!(it->OperandMask & (1 << NextOpNum)))\n";
2625 OS << " continue;\n\n";
2627 // Emit call to the custom parser method
2628 OS << " // call custom parse method to handle the operand\n";
2629 OS << " OperandMatchResultTy Result = ";
2630 OS << "tryCustomParseOperand(Operands, it->Class);\n";
2631 OS << " if (Result != MatchOperand_NoMatch)\n";
2632 OS << " return Result;\n";
2635 OS << " // Okay, we had no match.\n";
2636 OS << " return MatchOperand_NoMatch;\n";
2640 void AsmMatcherEmitter::run(raw_ostream &OS) {
2641 CodeGenTarget Target(Records);
2642 Record *AsmParser = Target.getAsmParser();
2643 std::string ClassName = AsmParser->getValueAsString("AsmParserClassName");
2645 // Compute the information on the instructions to match.
2646 AsmMatcherInfo Info(AsmParser, Target, Records);
2649 // Sort the instruction table using the partial order on classes. We use
2650 // stable_sort to ensure that ambiguous instructions are still
2651 // deterministically ordered.
2652 std::stable_sort(Info.Matchables.begin(), Info.Matchables.end(),
2653 [](const std::unique_ptr<MatchableInfo> &a,
2654 const std::unique_ptr<MatchableInfo> &b){
2657 DEBUG_WITH_TYPE("instruction_info", {
2658 for (const auto &MI : Info.Matchables)
2662 // Check for ambiguous matchables.
2663 DEBUG_WITH_TYPE("ambiguous_instrs", {
2664 unsigned NumAmbiguous = 0;
2665 for (auto I = Info.Matchables.begin(), E = Info.Matchables.end(); I != E;
2667 for (auto J = std::next(I); J != E; ++J) {
2668 const MatchableInfo &A = **I;
2669 const MatchableInfo &B = **J;
2671 if (A.couldMatchAmbiguouslyWith(B)) {
2672 errs() << "warning: ambiguous matchables:\n";
2674 errs() << "\nis incomparable with:\n";
2682 errs() << "warning: " << NumAmbiguous
2683 << " ambiguous matchables!\n";
2686 // Compute the information on the custom operand parsing.
2687 Info.buildOperandMatchInfo();
2689 // Write the output.
2691 // Information for the class declaration.
2692 OS << "\n#ifdef GET_ASSEMBLER_HEADER\n";
2693 OS << "#undef GET_ASSEMBLER_HEADER\n";
2694 OS << " // This should be included into the middle of the declaration of\n";
2695 OS << " // your subclasses implementation of MCTargetAsmParser.\n";
2696 OS << " uint64_t ComputeAvailableFeatures(const FeatureBitset& FB) const;\n";
2697 OS << " void convertToMCInst(unsigned Kind, MCInst &Inst, "
2698 << "unsigned Opcode,\n"
2699 << " const OperandVector "
2701 OS << " void convertToMapAndConstraints(unsigned Kind,\n ";
2702 OS << " const OperandVector &Operands) override;\n";
2703 OS << " bool mnemonicIsValid(StringRef Mnemonic, unsigned VariantID);\n";
2704 OS << " unsigned MatchInstructionImpl(const OperandVector &Operands,\n"
2705 << " MCInst &Inst,\n"
2706 << " uint64_t &ErrorInfo,"
2707 << " bool matchingInlineAsm,\n"
2708 << " unsigned VariantID = 0);\n";
2710 if (!Info.OperandMatchInfo.empty()) {
2711 OS << "\n enum OperandMatchResultTy {\n";
2712 OS << " MatchOperand_Success, // operand matched successfully\n";
2713 OS << " MatchOperand_NoMatch, // operand did not match\n";
2714 OS << " MatchOperand_ParseFail // operand matched but had errors\n";
2716 OS << " OperandMatchResultTy MatchOperandParserImpl(\n";
2717 OS << " OperandVector &Operands,\n";
2718 OS << " StringRef Mnemonic);\n";
2720 OS << " OperandMatchResultTy tryCustomParseOperand(\n";
2721 OS << " OperandVector &Operands,\n";
2722 OS << " unsigned MCK);\n\n";
2725 OS << "#endif // GET_ASSEMBLER_HEADER_INFO\n\n";
2727 // Emit the operand match diagnostic enum names.
2728 OS << "\n#ifdef GET_OPERAND_DIAGNOSTIC_TYPES\n";
2729 OS << "#undef GET_OPERAND_DIAGNOSTIC_TYPES\n\n";
2730 emitOperandDiagnosticTypes(Info, OS);
2731 OS << "#endif // GET_OPERAND_DIAGNOSTIC_TYPES\n\n";
2734 OS << "\n#ifdef GET_REGISTER_MATCHER\n";
2735 OS << "#undef GET_REGISTER_MATCHER\n\n";
2737 // Emit the subtarget feature enumeration.
2738 emitSubtargetFeatureFlagEnumeration(Info, OS);
2740 // Emit the function to match a register name to number.
2741 // This should be omitted for Mips target
2742 if (AsmParser->getValueAsBit("ShouldEmitMatchRegisterName"))
2743 emitMatchRegisterName(Target, AsmParser, OS);
2745 OS << "#endif // GET_REGISTER_MATCHER\n\n";
2747 OS << "\n#ifdef GET_SUBTARGET_FEATURE_NAME\n";
2748 OS << "#undef GET_SUBTARGET_FEATURE_NAME\n\n";
2750 // Generate the helper function to get the names for subtarget features.
2751 emitGetSubtargetFeatureName(Info, OS);
2753 OS << "#endif // GET_SUBTARGET_FEATURE_NAME\n\n";
2755 OS << "\n#ifdef GET_MATCHER_IMPLEMENTATION\n";
2756 OS << "#undef GET_MATCHER_IMPLEMENTATION\n\n";
2758 // Generate the function that remaps for mnemonic aliases.
2759 bool HasMnemonicAliases = emitMnemonicAliases(OS, Info, Target);
2761 // Generate the convertToMCInst function to convert operands into an MCInst.
2762 // Also, generate the convertToMapAndConstraints function for MS-style inline
2763 // assembly. The latter doesn't actually generate a MCInst.
2764 emitConvertFuncs(Target, ClassName, Info.Matchables, OS);
2766 // Emit the enumeration for classes which participate in matching.
2767 emitMatchClassEnumeration(Target, Info.Classes, OS);
2769 // Emit the routine to match token strings to their match class.
2770 emitMatchTokenString(Target, Info.Classes, OS);
2772 // Emit the subclass predicate routine.
2773 emitIsSubclass(Target, Info.Classes, OS);
2775 // Emit the routine to validate an operand against a match class.
2776 emitValidateOperandClass(Info, OS);
2778 // Emit the available features compute function.
2779 emitComputeAvailableFeatures(Info, OS);
2782 StringToOffsetTable StringTable;
2784 size_t MaxNumOperands = 0;
2785 unsigned MaxMnemonicIndex = 0;
2786 bool HasDeprecation = false;
2787 for (const auto &MI : Info.Matchables) {
2788 MaxNumOperands = std::max(MaxNumOperands, MI->AsmOperands.size());
2789 HasDeprecation |= MI->HasDeprecation;
2791 // Store a pascal-style length byte in the mnemonic.
2792 std::string LenMnemonic = char(MI->Mnemonic.size()) + MI->Mnemonic.str();
2793 MaxMnemonicIndex = std::max(MaxMnemonicIndex,
2794 StringTable.GetOrAddStringOffset(LenMnemonic, false));
2797 OS << "static const char *const MnemonicTable =\n";
2798 StringTable.EmitString(OS);
2801 // Emit the static match table; unused classes get initalized to 0 which is
2802 // guaranteed to be InvalidMatchClass.
2804 // FIXME: We can reduce the size of this table very easily. First, we change
2805 // it so that store the kinds in separate bit-fields for each index, which
2806 // only needs to be the max width used for classes at that index (we also need
2807 // to reject based on this during classification). If we then make sure to
2808 // order the match kinds appropriately (putting mnemonics last), then we
2809 // should only end up using a few bits for each class, especially the ones
2810 // following the mnemonic.
2811 OS << "namespace {\n";
2812 OS << " struct MatchEntry {\n";
2813 OS << " " << getMinimalTypeForRange(MaxMnemonicIndex)
2815 OS << " uint16_t Opcode;\n";
2816 OS << " " << getMinimalTypeForRange(Info.Matchables.size())
2818 OS << " " << getMinimalRequiredFeaturesType(Info)
2819 << " RequiredFeatures;\n";
2820 OS << " " << getMinimalTypeForRange(
2821 std::distance(Info.Classes.begin(), Info.Classes.end()))
2822 << " Classes[" << MaxNumOperands << "];\n";
2823 OS << " StringRef getMnemonic() const {\n";
2824 OS << " return StringRef(MnemonicTable + Mnemonic + 1,\n";
2825 OS << " MnemonicTable[Mnemonic]);\n";
2829 OS << " // Predicate for searching for an opcode.\n";
2830 OS << " struct LessOpcode {\n";
2831 OS << " bool operator()(const MatchEntry &LHS, StringRef RHS) {\n";
2832 OS << " return LHS.getMnemonic() < RHS;\n";
2834 OS << " bool operator()(StringRef LHS, const MatchEntry &RHS) {\n";
2835 OS << " return LHS < RHS.getMnemonic();\n";
2837 OS << " bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) {\n";
2838 OS << " return LHS.getMnemonic() < RHS.getMnemonic();\n";
2842 OS << "} // end anonymous namespace.\n\n";
2844 unsigned VariantCount = Target.getAsmParserVariantCount();
2845 for (unsigned VC = 0; VC != VariantCount; ++VC) {
2846 Record *AsmVariant = Target.getAsmParserVariant(VC);
2847 int AsmVariantNo = AsmVariant->getValueAsInt("Variant");
2849 OS << "static const MatchEntry MatchTable" << VC << "[] = {\n";
2851 for (const auto &MI : Info.Matchables) {
2852 if (MI->AsmVariantID != AsmVariantNo)
2855 // Store a pascal-style length byte in the mnemonic.
2856 std::string LenMnemonic = char(MI->Mnemonic.size()) + MI->Mnemonic.str();
2857 OS << " { " << StringTable.GetOrAddStringOffset(LenMnemonic, false)
2858 << " /* " << MI->Mnemonic << " */, "
2859 << Target.getName() << "::"
2860 << MI->getResultInst()->TheDef->getName() << ", "
2861 << MI->ConversionFnKind << ", ";
2863 // Write the required features mask.
2864 if (!MI->RequiredFeatures.empty()) {
2865 for (unsigned i = 0, e = MI->RequiredFeatures.size(); i != e; ++i) {
2867 OS << MI->RequiredFeatures[i]->getEnumName();
2873 for (unsigned i = 0, e = MI->AsmOperands.size(); i != e; ++i) {
2874 const MatchableInfo::AsmOperand &Op = MI->AsmOperands[i];
2877 OS << Op.Class->Name;
2885 // A method to determine if a mnemonic is in the list.
2886 OS << "bool " << Target.getName() << ClassName << "::\n"
2887 << "mnemonicIsValid(StringRef Mnemonic, unsigned VariantID) {\n";
2888 OS << " // Find the appropriate table for this asm variant.\n";
2889 OS << " const MatchEntry *Start, *End;\n";
2890 OS << " switch (VariantID) {\n";
2891 OS << " default: llvm_unreachable(\"invalid variant!\");\n";
2892 for (unsigned VC = 0; VC != VariantCount; ++VC) {
2893 Record *AsmVariant = Target.getAsmParserVariant(VC);
2894 int AsmVariantNo = AsmVariant->getValueAsInt("Variant");
2895 OS << " case " << AsmVariantNo << ": Start = std::begin(MatchTable" << VC
2896 << "); End = std::end(MatchTable" << VC << "); break;\n";
2899 OS << " // Search the table.\n";
2900 OS << " std::pair<const MatchEntry*, const MatchEntry*> MnemonicRange =\n";
2901 OS << " std::equal_range(Start, End, Mnemonic, LessOpcode());\n";
2902 OS << " return MnemonicRange.first != MnemonicRange.second;\n";
2905 // Finally, build the match function.
2906 OS << "unsigned " << Target.getName() << ClassName << "::\n"
2907 << "MatchInstructionImpl(const OperandVector &Operands,\n";
2908 OS << " MCInst &Inst, uint64_t &ErrorInfo,\n"
2909 << " bool matchingInlineAsm, unsigned VariantID) {\n";
2911 OS << " // Eliminate obvious mismatches.\n";
2912 OS << " if (Operands.size() > " << MaxNumOperands << ") {\n";
2913 OS << " ErrorInfo = " << MaxNumOperands << ";\n";
2914 OS << " return Match_InvalidOperand;\n";
2917 // Emit code to get the available features.
2918 OS << " // Get the current feature set.\n";
2919 OS << " uint64_t AvailableFeatures = getAvailableFeatures();\n\n";
2921 OS << " // Get the instruction mnemonic, which is the first token.\n";
2922 OS << " StringRef Mnemonic;\n";
2923 OS << " if (Operands[0]->isToken())\n";
2924 OS << " Mnemonic = ((" << Target.getName()
2925 << "Operand&)*Operands[0]).getToken();\n\n";
2927 if (HasMnemonicAliases) {
2928 OS << " // Process all MnemonicAliases to remap the mnemonic.\n";
2929 OS << " applyMnemonicAliases(Mnemonic, AvailableFeatures, VariantID);\n\n";
2932 // Emit code to compute the class list for this operand vector.
2933 OS << " // Some state to try to produce better error messages.\n";
2934 OS << " bool HadMatchOtherThanFeatures = false;\n";
2935 OS << " bool HadMatchOtherThanPredicate = false;\n";
2936 OS << " unsigned RetCode = Match_InvalidOperand;\n";
2937 OS << " uint64_t MissingFeatures = ~0ULL;\n";
2938 OS << " // Set ErrorInfo to the operand that mismatches if it is\n";
2939 OS << " // wrong for all instances of the instruction.\n";
2940 OS << " ErrorInfo = ~0ULL;\n";
2942 // Emit code to search the table.
2943 OS << " // Find the appropriate table for this asm variant.\n";
2944 OS << " const MatchEntry *Start, *End;\n";
2945 OS << " switch (VariantID) {\n";
2946 OS << " default: llvm_unreachable(\"invalid variant!\");\n";
2947 for (unsigned VC = 0; VC != VariantCount; ++VC) {
2948 Record *AsmVariant = Target.getAsmParserVariant(VC);
2949 int AsmVariantNo = AsmVariant->getValueAsInt("Variant");
2950 OS << " case " << AsmVariantNo << ": Start = std::begin(MatchTable" << VC
2951 << "); End = std::end(MatchTable" << VC << "); break;\n";
2954 OS << " // Search the table.\n";
2955 OS << " std::pair<const MatchEntry*, const MatchEntry*> "
2956 "MnemonicRange(Start, End);\n";
2957 OS << " unsigned SIndex = Mnemonic.empty() ? 0 : 1;\n";
2958 OS << " if (!Mnemonic.empty())\n";
2959 OS << " MnemonicRange = std::equal_range(Start, End, Mnemonic.lower(), LessOpcode());\n\n";
2961 OS << " // Return a more specific error code if no mnemonics match.\n";
2962 OS << " if (MnemonicRange.first == MnemonicRange.second)\n";
2963 OS << " return Match_MnemonicFail;\n\n";
2965 OS << " for (const MatchEntry *it = MnemonicRange.first, "
2966 << "*ie = MnemonicRange.second;\n";
2967 OS << " it != ie; ++it) {\n";
2969 // Emit check that the subclasses match.
2970 OS << " bool OperandsValid = true;\n";
2971 OS << " for (unsigned i = SIndex; i != " << MaxNumOperands << "; ++i) {\n";
2972 OS << " auto Formal = static_cast<MatchClassKind>(it->Classes[i]);\n";
2973 OS << " if (i >= Operands.size()) {\n";
2974 OS << " OperandsValid = (Formal == " <<"InvalidMatchClass);\n";
2975 OS << " if (!OperandsValid) ErrorInfo = i;\n";
2978 OS << " MCParsedAsmOperand &Actual = *Operands[i];\n";
2979 OS << " unsigned Diag = validateOperandClass(Actual, Formal);\n";
2980 OS << " if (Diag == Match_Success)\n";
2981 OS << " continue;\n";
2982 OS << " // If the generic handler indicates an invalid operand\n";
2983 OS << " // failure, check for a special case.\n";
2984 OS << " if (Diag == Match_InvalidOperand) {\n";
2985 OS << " Diag = validateTargetOperandClass(Actual, Formal);\n";
2986 OS << " if (Diag == Match_Success)\n";
2987 OS << " continue;\n";
2989 OS << " // If this operand is broken for all of the instances of this\n";
2990 OS << " // mnemonic, keep track of it so we can report loc info.\n";
2991 OS << " // If we already had a match that only failed due to a\n";
2992 OS << " // target predicate, that diagnostic is preferred.\n";
2993 OS << " if (!HadMatchOtherThanPredicate &&\n";
2994 OS << " (it == MnemonicRange.first || ErrorInfo <= i)) {\n";
2995 OS << " ErrorInfo = i;\n";
2996 OS << " // InvalidOperand is the default. Prefer specificity.\n";
2997 OS << " if (Diag != Match_InvalidOperand)\n";
2998 OS << " RetCode = Diag;\n";
3000 OS << " // Otherwise, just reject this instance of the mnemonic.\n";
3001 OS << " OperandsValid = false;\n";
3005 OS << " if (!OperandsValid) continue;\n";
3007 // Emit check that the required features are available.
3008 OS << " if ((AvailableFeatures & it->RequiredFeatures) "
3009 << "!= it->RequiredFeatures) {\n";
3010 OS << " HadMatchOtherThanFeatures = true;\n";
3011 OS << " uint64_t NewMissingFeatures = it->RequiredFeatures & "
3012 "~AvailableFeatures;\n";
3013 OS << " if (countPopulation(NewMissingFeatures) <=\n"
3014 " countPopulation(MissingFeatures))\n";
3015 OS << " MissingFeatures = NewMissingFeatures;\n";
3016 OS << " continue;\n";
3019 OS << " Inst.clear();\n\n";
3020 OS << " if (matchingInlineAsm) {\n";
3021 OS << " Inst.setOpcode(it->Opcode);\n";
3022 OS << " convertToMapAndConstraints(it->ConvertFn, Operands);\n";
3023 OS << " return Match_Success;\n";
3025 OS << " // We have selected a definite instruction, convert the parsed\n"
3026 << " // operands into the appropriate MCInst.\n";
3027 OS << " convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands);\n";
3030 // Verify the instruction with the target-specific match predicate function.
3031 OS << " // We have a potential match. Check the target predicate to\n"
3032 << " // handle any context sensitive constraints.\n"
3033 << " unsigned MatchResult;\n"
3034 << " if ((MatchResult = checkTargetMatchPredicate(Inst)) !="
3035 << " Match_Success) {\n"
3036 << " Inst.clear();\n"
3037 << " RetCode = MatchResult;\n"
3038 << " HadMatchOtherThanPredicate = true;\n"
3042 // Call the post-processing function, if used.
3043 std::string InsnCleanupFn =
3044 AsmParser->getValueAsString("AsmParserInstCleanup");
3045 if (!InsnCleanupFn.empty())
3046 OS << " " << InsnCleanupFn << "(Inst);\n";
3048 if (HasDeprecation) {
3049 OS << " std::string Info;\n";
3050 OS << " if (MII.get(Inst.getOpcode()).getDeprecatedInfo(Inst, getSTI(), Info)) {\n";
3051 OS << " SMLoc Loc = ((" << Target.getName()
3052 << "Operand&)*Operands[0]).getStartLoc();\n";
3053 OS << " getParser().Warning(Loc, Info, None);\n";
3057 OS << " return Match_Success;\n";
3060 OS << " // Okay, we had no match. Try to return a useful error code.\n";
3061 OS << " if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures)\n";
3062 OS << " return RetCode;\n\n";
3063 OS << " // Missing feature matches return which features were missing\n";
3064 OS << " ErrorInfo = MissingFeatures;\n";
3065 OS << " return Match_MissingFeature;\n";
3068 if (!Info.OperandMatchInfo.empty())
3069 emitCustomOperandParsing(OS, Target, Info, ClassName, StringTable,
3072 OS << "#endif // GET_MATCHER_IMPLEMENTATION\n\n";
3077 void EmitAsmMatcher(RecordKeeper &RK, raw_ostream &OS) {
3078 emitSourceFileHeader("Assembly Matcher Source Fragment", OS);
3079 AsmMatcherEmitter(RK).run(OS);
3082 } // End llvm namespace