1 //===- AsmMatcherEmitter.cpp - Generate an assembly matcher ---------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This tablegen backend emits a target specifier matcher for converting parsed
11 // assembly operands in the MCInst structures.
13 // The input to the target specific matcher is a list of literal tokens and
14 // operands. The target specific parser should generally eliminate any syntax
15 // which is not relevant for matching; for example, comma tokens should have
16 // already been consumed and eliminated by the parser. Most instructions will
17 // end up with a single literal token (the instruction name) and some number of
20 // Some example inputs, for X86:
21 // 'addl' (immediate ...) (register ...)
22 // 'add' (immediate ...) (memory ...)
25 // The assembly matcher is responsible for converting this input into a precise
26 // machine instruction (i.e., an instruction with a well defined encoding). This
27 // mapping has several properties which complicate matching:
29 // - It may be ambiguous; many architectures can legally encode particular
30 // variants of an instruction in different ways (for example, using a smaller
31 // encoding for small immediates). Such ambiguities should never be
32 // arbitrarily resolved by the assembler, the assembler is always responsible
33 // for choosing the "best" available instruction.
35 // - It may depend on the subtarget or the assembler context. Instructions
36 // which are invalid for the current mode, but otherwise unambiguous (e.g.,
37 // an SSE instruction in a file being assembled for i486) should be accepted
38 // and rejected by the assembler front end. However, if the proper encoding
39 // for an instruction is dependent on the assembler context then the matcher
40 // is responsible for selecting the correct machine instruction for the
43 // The core matching algorithm attempts to exploit the regularity in most
44 // instruction sets to quickly determine the set of possibly matching
45 // instructions, and the simplify the generated code. Additionally, this helps
46 // to ensure that the ambiguities are intentionally resolved by the user.
48 // The matching is divided into two distinct phases:
50 // 1. Classification: Each operand is mapped to the unique set which (a)
51 // contains it, and (b) is the largest such subset for which a single
52 // instruction could match all members.
54 // For register classes, we can generate these subgroups automatically. For
55 // arbitrary operands, we expect the user to define the classes and their
56 // relations to one another (for example, 8-bit signed immediates as a
57 // subset of 32-bit immediates).
59 // By partitioning the operands in this way, we guarantee that for any
60 // tuple of classes, any single instruction must match either all or none
61 // of the sets of operands which could classify to that tuple.
63 // In addition, the subset relation amongst classes induces a partial order
64 // on such tuples, which we use to resolve ambiguities.
66 // FIXME: What do we do if a crazy case shows up where this is the wrong
69 // 2. The input can now be treated as a tuple of classes (static tokens are
70 // simple singleton sets). Each such tuple should generally map to a single
71 // instruction (we currently ignore cases where this isn't true, whee!!!),
72 // which we can emit a simple matcher for.
74 //===----------------------------------------------------------------------===//
76 #include "AsmMatcherEmitter.h"
77 #include "CodeGenTarget.h"
79 #include "llvm/ADT/OwningPtr.h"
80 #include "llvm/ADT/SmallVector.h"
81 #include "llvm/ADT/STLExtras.h"
82 #include "llvm/ADT/StringExtras.h"
83 #include "llvm/Support/CommandLine.h"
84 #include "llvm/Support/Debug.h"
90 static cl::opt<std::string>
91 MatchPrefix("match-prefix", cl::init(""),
92 cl::desc("Only match instructions with the given prefix"));
94 /// FlattenVariants - Flatten an .td file assembly string by selecting the
95 /// variant at index \arg N.
96 static std::string FlattenVariants(const std::string &AsmString,
98 StringRef Cur = AsmString;
102 // Find the start of the next variant string.
103 size_t VariantsStart = 0;
104 for (size_t e = Cur.size(); VariantsStart != e; ++VariantsStart)
105 if (Cur[VariantsStart] == '{' &&
106 (VariantsStart == 0 || (Cur[VariantsStart-1] != '$' &&
107 Cur[VariantsStart-1] != '\\')))
110 // Add the prefix to the result.
111 Res += Cur.slice(0, VariantsStart);
112 if (VariantsStart == Cur.size())
115 ++VariantsStart; // Skip the '{'.
117 // Scan to the end of the variants string.
118 size_t VariantsEnd = VariantsStart;
119 unsigned NestedBraces = 1;
120 for (size_t e = Cur.size(); VariantsEnd != e; ++VariantsEnd) {
121 if (Cur[VariantsEnd] == '}' && Cur[VariantsEnd-1] != '\\') {
122 if (--NestedBraces == 0)
124 } else if (Cur[VariantsEnd] == '{')
128 // Select the Nth variant (or empty).
129 StringRef Selection = Cur.slice(VariantsStart, VariantsEnd);
130 for (unsigned i = 0; i != N; ++i)
131 Selection = Selection.split('|').second;
132 Res += Selection.split('|').first;
134 assert(VariantsEnd != Cur.size() &&
135 "Unterminated variants in assembly string!");
136 Cur = Cur.substr(VariantsEnd + 1);
142 /// TokenizeAsmString - Tokenize a simplified assembly string.
143 static void TokenizeAsmString(StringRef AsmString,
144 SmallVectorImpl<StringRef> &Tokens) {
147 for (unsigned i = 0, e = AsmString.size(); i != e; ++i) {
148 switch (AsmString[i]) {
157 Tokens.push_back(AsmString.slice(Prev, i));
160 if (!isspace(AsmString[i]) && AsmString[i] != ',')
161 Tokens.push_back(AsmString.substr(i, 1));
167 Tokens.push_back(AsmString.slice(Prev, i));
171 assert(i != AsmString.size() && "Invalid quoted character");
172 Tokens.push_back(AsmString.substr(i, 1));
177 // If this isn't "${", treat like a normal token.
178 if (i + 1 == AsmString.size() || AsmString[i + 1] != '{') {
180 Tokens.push_back(AsmString.slice(Prev, i));
188 Tokens.push_back(AsmString.slice(Prev, i));
192 StringRef::iterator End =
193 std::find(AsmString.begin() + i, AsmString.end(), '}');
194 assert(End != AsmString.end() && "Missing brace in operand reference!");
195 size_t EndPos = End - AsmString.begin();
196 Tokens.push_back(AsmString.slice(i, EndPos+1));
204 Tokens.push_back(AsmString.slice(Prev, i));
214 if (InTok && Prev != AsmString.size())
215 Tokens.push_back(AsmString.substr(Prev));
218 static bool IsAssemblerInstruction(StringRef Name,
219 const CodeGenInstruction &CGI,
220 const SmallVectorImpl<StringRef> &Tokens) {
221 // Ignore "codegen only" instructions.
222 if (CGI.TheDef->getValueAsBit("isCodeGenOnly"))
225 // Ignore pseudo ops.
227 // FIXME: This is a hack; can we convert these instructions to set the
228 // "codegen only" bit instead?
229 if (const RecordVal *Form = CGI.TheDef->getValue("Form"))
230 if (Form->getValue()->getAsString() == "Pseudo")
233 // Ignore "Int_*" and "*_Int" instructions, which are internal aliases.
235 // FIXME: This is a total hack.
236 if (StringRef(Name).startswith("Int_") || StringRef(Name).endswith("_Int"))
239 // Ignore instructions with no .s string.
241 // FIXME: What are these?
242 if (CGI.AsmString.empty())
245 // FIXME: Hack; ignore any instructions with a newline in them.
246 if (std::find(CGI.AsmString.begin(),
247 CGI.AsmString.end(), '\n') != CGI.AsmString.end())
250 // Ignore instructions with attributes, these are always fake instructions for
251 // simplifying codegen.
253 // FIXME: Is this true?
255 // Also, check for instructions which reference the operand multiple times;
256 // this implies a constraint we would not honor.
257 std::set<std::string> OperandNames;
258 for (unsigned i = 1, e = Tokens.size(); i < e; ++i) {
259 if (Tokens[i][0] == '$' &&
260 std::find(Tokens[i].begin(),
261 Tokens[i].end(), ':') != Tokens[i].end()) {
263 errs() << "warning: '" << Name << "': "
264 << "ignoring instruction; operand with attribute '"
265 << Tokens[i] << "'\n";
270 if (Tokens[i][0] == '$' && !OperandNames.insert(Tokens[i]).second) {
272 errs() << "warning: '" << Name << "': "
273 << "ignoring instruction with tied operand '"
274 << Tokens[i].str() << "'\n";
285 struct SubtargetFeatureInfo;
287 /// ClassInfo - Helper class for storing the information about a particular
288 /// class of operands which can be matched.
291 /// Invalid kind, for use as a sentinel value.
294 /// The class for a particular token.
297 /// The (first) register class, subsequent register classes are
298 /// RegisterClass0+1, and so on.
301 /// The (first) user defined class, subsequent user defined classes are
302 /// UserClass0+1, and so on.
306 /// Kind - The class kind, which is either a predefined kind, or (UserClass0 +
307 /// N) for the Nth user defined class.
310 /// SuperClasses - The super classes of this class. Note that for simplicities
311 /// sake user operands only record their immediate super class, while register
312 /// operands include all superclasses.
313 std::vector<ClassInfo*> SuperClasses;
315 /// Name - The full class name, suitable for use in an enum.
318 /// ClassName - The unadorned generic name for this class (e.g., Token).
319 std::string ClassName;
321 /// ValueName - The name of the value this class represents; for a token this
322 /// is the literal token string, for an operand it is the TableGen class (or
323 /// empty if this is a derived class).
324 std::string ValueName;
326 /// PredicateMethod - The name of the operand method to test whether the
327 /// operand matches this class; this is not valid for Token or register kinds.
328 std::string PredicateMethod;
330 /// RenderMethod - The name of the operand method to add this operand to an
331 /// MCInst; this is not valid for Token or register kinds.
332 std::string RenderMethod;
334 /// For register classes, the records for all the registers in this class.
335 std::set<Record*> Registers;
338 /// isRegisterClass() - Check if this is a register class.
339 bool isRegisterClass() const {
340 return Kind >= RegisterClass0 && Kind < UserClass0;
343 /// isUserClass() - Check if this is a user defined class.
344 bool isUserClass() const {
345 return Kind >= UserClass0;
348 /// isRelatedTo - Check whether this class is "related" to \arg RHS. Classes
349 /// are related if they are in the same class hierarchy.
350 bool isRelatedTo(const ClassInfo &RHS) const {
351 // Tokens are only related to tokens.
352 if (Kind == Token || RHS.Kind == Token)
353 return Kind == Token && RHS.Kind == Token;
355 // Registers classes are only related to registers classes, and only if
356 // their intersection is non-empty.
357 if (isRegisterClass() || RHS.isRegisterClass()) {
358 if (!isRegisterClass() || !RHS.isRegisterClass())
361 std::set<Record*> Tmp;
362 std::insert_iterator< std::set<Record*> > II(Tmp, Tmp.begin());
363 std::set_intersection(Registers.begin(), Registers.end(),
364 RHS.Registers.begin(), RHS.Registers.end(),
370 // Otherwise we have two users operands; they are related if they are in the
371 // same class hierarchy.
373 // FIXME: This is an oversimplification, they should only be related if they
374 // intersect, however we don't have that information.
375 assert(isUserClass() && RHS.isUserClass() && "Unexpected class!");
376 const ClassInfo *Root = this;
377 while (!Root->SuperClasses.empty())
378 Root = Root->SuperClasses.front();
380 const ClassInfo *RHSRoot = &RHS;
381 while (!RHSRoot->SuperClasses.empty())
382 RHSRoot = RHSRoot->SuperClasses.front();
384 return Root == RHSRoot;
387 /// isSubsetOf - Test whether this class is a subset of \arg RHS;
388 bool isSubsetOf(const ClassInfo &RHS) const {
389 // This is a subset of RHS if it is the same class...
393 // ... or if any of its super classes are a subset of RHS.
394 for (std::vector<ClassInfo*>::const_iterator it = SuperClasses.begin(),
395 ie = SuperClasses.end(); it != ie; ++it)
396 if ((*it)->isSubsetOf(RHS))
402 /// operator< - Compare two classes.
403 bool operator<(const ClassInfo &RHS) const {
407 // Unrelated classes can be ordered by kind.
408 if (!isRelatedTo(RHS))
409 return Kind < RHS.Kind;
413 assert(0 && "Invalid kind!");
415 // Tokens are comparable by value.
417 // FIXME: Compare by enum value.
418 return ValueName < RHS.ValueName;
421 // This class preceeds the RHS if it is a proper subset of the RHS.
424 if (RHS.isSubsetOf(*this))
427 // Otherwise, order by name to ensure we have a total ordering.
428 return ValueName < RHS.ValueName;
433 /// InstructionInfo - Helper class for storing the necessary information for an
434 /// instruction which is capable of being matched.
435 struct InstructionInfo {
437 /// The unique class instance this operand should match.
440 /// The original operand this corresponds to, if any.
441 const CodeGenInstruction::OperandInfo *OperandInfo;
444 /// InstrName - The target name for this instruction.
445 std::string InstrName;
447 /// Instr - The instruction this matches.
448 const CodeGenInstruction *Instr;
450 /// AsmString - The assembly string for this instruction (with variants
452 std::string AsmString;
454 /// Tokens - The tokenized assembly pattern that this instruction matches.
455 SmallVector<StringRef, 4> Tokens;
457 /// Operands - The operands that this instruction matches.
458 SmallVector<Operand, 4> Operands;
460 /// Predicates - The required subtarget features to match this instruction.
461 SmallVector<SubtargetFeatureInfo*, 4> RequiredFeatures;
463 /// ConversionFnKind - The enum value which is passed to the generated
464 /// ConvertToMCInst to convert parsed operands into an MCInst for this
466 std::string ConversionFnKind;
468 /// operator< - Compare two instructions.
469 bool operator<(const InstructionInfo &RHS) const {
470 if (Operands.size() != RHS.Operands.size())
471 return Operands.size() < RHS.Operands.size();
473 // Compare lexicographically by operand. The matcher validates that other
474 // orderings wouldn't be ambiguous using \see CouldMatchAmiguouslyWith().
475 for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
476 if (*Operands[i].Class < *RHS.Operands[i].Class)
478 if (*RHS.Operands[i].Class < *Operands[i].Class)
485 /// CouldMatchAmiguouslyWith - Check whether this instruction could
486 /// ambiguously match the same set of operands as \arg RHS (without being a
487 /// strictly superior match).
488 bool CouldMatchAmiguouslyWith(const InstructionInfo &RHS) {
489 // The number of operands is unambiguous.
490 if (Operands.size() != RHS.Operands.size())
493 // Otherwise, make sure the ordering of the two instructions is unambiguous
494 // by checking that either (a) a token or operand kind discriminates them,
495 // or (b) the ordering among equivalent kinds is consistent.
497 // Tokens and operand kinds are unambiguous (assuming a correct target
499 for (unsigned i = 0, e = Operands.size(); i != e; ++i)
500 if (Operands[i].Class->Kind != RHS.Operands[i].Class->Kind ||
501 Operands[i].Class->Kind == ClassInfo::Token)
502 if (*Operands[i].Class < *RHS.Operands[i].Class ||
503 *RHS.Operands[i].Class < *Operands[i].Class)
506 // Otherwise, this operand could commute if all operands are equivalent, or
507 // there is a pair of operands that compare less than and a pair that
508 // compare greater than.
509 bool HasLT = false, HasGT = false;
510 for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
511 if (*Operands[i].Class < *RHS.Operands[i].Class)
513 if (*RHS.Operands[i].Class < *Operands[i].Class)
517 return !(HasLT ^ HasGT);
524 /// SubtargetFeatureInfo - Helper class for storing information on a subtarget
525 /// feature which participates in instruction matching.
526 struct SubtargetFeatureInfo {
527 /// \brief The predicate record for this feature.
530 /// \brief An unique index assigned to represent this feature.
533 /// \brief The name of the enumerated constant identifying this feature.
534 std::string EnumName;
537 class AsmMatcherInfo {
539 /// The tablegen AsmParser record.
542 /// The AsmParser "CommentDelimiter" value.
543 std::string CommentDelimiter;
545 /// The AsmParser "RegisterPrefix" value.
546 std::string RegisterPrefix;
548 /// The classes which are needed for matching.
549 std::vector<ClassInfo*> Classes;
551 /// The information on the instruction to match.
552 std::vector<InstructionInfo*> Instructions;
554 /// Map of Register records to their class information.
555 std::map<Record*, ClassInfo*> RegisterClasses;
557 /// Map of Predicate records to their subtarget information.
558 std::map<Record*, SubtargetFeatureInfo*> SubtargetFeatures;
561 /// Map of token to class information which has already been constructed.
562 std::map<std::string, ClassInfo*> TokenClasses;
564 /// Map of RegisterClass records to their class information.
565 std::map<Record*, ClassInfo*> RegisterClassClasses;
567 /// Map of AsmOperandClass records to their class information.
568 std::map<Record*, ClassInfo*> AsmOperandClasses;
571 /// getTokenClass - Lookup or create the class for the given token.
572 ClassInfo *getTokenClass(StringRef Token);
574 /// getOperandClass - Lookup or create the class for the given operand.
575 ClassInfo *getOperandClass(StringRef Token,
576 const CodeGenInstruction::OperandInfo &OI);
578 /// getSubtargetFeature - Lookup or create the subtarget feature info for the
580 SubtargetFeatureInfo *getSubtargetFeature(Record *Def) {
581 assert(Def->isSubClassOf("Predicate") && "Invalid predicate type!");
583 SubtargetFeatureInfo *&Entry = SubtargetFeatures[Def];
585 Entry = new SubtargetFeatureInfo;
587 Entry->Index = SubtargetFeatures.size() - 1;
588 Entry->EnumName = "Feature_" + Def->getName();
589 assert(Entry->Index < 32 && "Too many subtarget features!");
595 /// BuildRegisterClasses - Build the ClassInfo* instances for register
597 void BuildRegisterClasses(CodeGenTarget &Target,
598 std::set<std::string> &SingletonRegisterNames);
600 /// BuildOperandClasses - Build the ClassInfo* instances for user defined
602 void BuildOperandClasses(CodeGenTarget &Target);
605 AsmMatcherInfo(Record *_AsmParser);
607 /// BuildInfo - Construct the various tables used during matching.
608 void BuildInfo(CodeGenTarget &Target);
613 void InstructionInfo::dump() {
614 errs() << InstrName << " -- " << "flattened:\"" << AsmString << '\"'
616 for (unsigned i = 0, e = Tokens.size(); i != e; ++i) {
623 for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
624 Operand &Op = Operands[i];
625 errs() << " op[" << i << "] = " << Op.Class->ClassName << " - ";
626 if (Op.Class->Kind == ClassInfo::Token) {
627 errs() << '\"' << Tokens[i] << "\"\n";
631 if (!Op.OperandInfo) {
632 errs() << "(singleton register)\n";
636 const CodeGenInstruction::OperandInfo &OI = *Op.OperandInfo;
637 errs() << OI.Name << " " << OI.Rec->getName()
638 << " (" << OI.MIOperandNo << ", " << OI.MINumOperands << ")\n";
642 static std::string getEnumNameForToken(StringRef Str) {
645 for (StringRef::iterator it = Str.begin(), ie = Str.end(); it != ie; ++it) {
647 case '*': Res += "_STAR_"; break;
648 case '%': Res += "_PCT_"; break;
649 case ':': Res += "_COLON_"; break;
655 Res += "_" + utostr((unsigned) *it) + "_";
663 /// getRegisterRecord - Get the register record for \arg name, or 0.
664 static Record *getRegisterRecord(CodeGenTarget &Target, StringRef Name) {
665 for (unsigned i = 0, e = Target.getRegisters().size(); i != e; ++i) {
666 const CodeGenRegister &Reg = Target.getRegisters()[i];
667 if (Name == Reg.TheDef->getValueAsString("AsmName"))
674 ClassInfo *AsmMatcherInfo::getTokenClass(StringRef Token) {
675 ClassInfo *&Entry = TokenClasses[Token];
678 Entry = new ClassInfo();
679 Entry->Kind = ClassInfo::Token;
680 Entry->ClassName = "Token";
681 Entry->Name = "MCK_" + getEnumNameForToken(Token);
682 Entry->ValueName = Token;
683 Entry->PredicateMethod = "<invalid>";
684 Entry->RenderMethod = "<invalid>";
685 Classes.push_back(Entry);
692 AsmMatcherInfo::getOperandClass(StringRef Token,
693 const CodeGenInstruction::OperandInfo &OI) {
694 if (OI.Rec->isSubClassOf("RegisterClass")) {
695 ClassInfo *CI = RegisterClassClasses[OI.Rec];
698 PrintError(OI.Rec->getLoc(), "register class has no class info!");
699 throw std::string("ERROR: Missing register class!");
705 assert(OI.Rec->isSubClassOf("Operand") && "Unexpected operand!");
706 Record *MatchClass = OI.Rec->getValueAsDef("ParserMatchClass");
707 ClassInfo *CI = AsmOperandClasses[MatchClass];
710 PrintError(OI.Rec->getLoc(), "operand has no match class!");
711 throw std::string("ERROR: Missing match class!");
717 void AsmMatcherInfo::BuildRegisterClasses(CodeGenTarget &Target,
718 std::set<std::string>
719 &SingletonRegisterNames) {
720 std::vector<CodeGenRegisterClass> RegisterClasses;
721 std::vector<CodeGenRegister> Registers;
723 RegisterClasses = Target.getRegisterClasses();
724 Registers = Target.getRegisters();
726 // The register sets used for matching.
727 std::set< std::set<Record*> > RegisterSets;
729 // Gather the defined sets.
730 for (std::vector<CodeGenRegisterClass>::iterator it = RegisterClasses.begin(),
731 ie = RegisterClasses.end(); it != ie; ++it)
732 RegisterSets.insert(std::set<Record*>(it->Elements.begin(),
733 it->Elements.end()));
735 // Add any required singleton sets.
736 for (std::set<std::string>::iterator it = SingletonRegisterNames.begin(),
737 ie = SingletonRegisterNames.end(); it != ie; ++it)
738 if (Record *Rec = getRegisterRecord(Target, *it))
739 RegisterSets.insert(std::set<Record*>(&Rec, &Rec + 1));
741 // Introduce derived sets where necessary (when a register does not determine
742 // a unique register set class), and build the mapping of registers to the set
743 // they should classify to.
744 std::map<Record*, std::set<Record*> > RegisterMap;
745 for (std::vector<CodeGenRegister>::iterator it = Registers.begin(),
746 ie = Registers.end(); it != ie; ++it) {
747 CodeGenRegister &CGR = *it;
748 // Compute the intersection of all sets containing this register.
749 std::set<Record*> ContainingSet;
751 for (std::set< std::set<Record*> >::iterator it = RegisterSets.begin(),
752 ie = RegisterSets.end(); it != ie; ++it) {
753 if (!it->count(CGR.TheDef))
756 if (ContainingSet.empty()) {
759 std::set<Record*> Tmp;
760 std::swap(Tmp, ContainingSet);
761 std::insert_iterator< std::set<Record*> > II(ContainingSet,
762 ContainingSet.begin());
763 std::set_intersection(Tmp.begin(), Tmp.end(), it->begin(), it->end(),
768 if (!ContainingSet.empty()) {
769 RegisterSets.insert(ContainingSet);
770 RegisterMap.insert(std::make_pair(CGR.TheDef, ContainingSet));
774 // Construct the register classes.
775 std::map<std::set<Record*>, ClassInfo*> RegisterSetClasses;
777 for (std::set< std::set<Record*> >::iterator it = RegisterSets.begin(),
778 ie = RegisterSets.end(); it != ie; ++it, ++Index) {
779 ClassInfo *CI = new ClassInfo();
780 CI->Kind = ClassInfo::RegisterClass0 + Index;
781 CI->ClassName = "Reg" + utostr(Index);
782 CI->Name = "MCK_Reg" + utostr(Index);
784 CI->PredicateMethod = ""; // unused
785 CI->RenderMethod = "addRegOperands";
787 Classes.push_back(CI);
788 RegisterSetClasses.insert(std::make_pair(*it, CI));
791 // Find the superclasses; we could compute only the subgroup lattice edges,
792 // but there isn't really a point.
793 for (std::set< std::set<Record*> >::iterator it = RegisterSets.begin(),
794 ie = RegisterSets.end(); it != ie; ++it) {
795 ClassInfo *CI = RegisterSetClasses[*it];
796 for (std::set< std::set<Record*> >::iterator it2 = RegisterSets.begin(),
797 ie2 = RegisterSets.end(); it2 != ie2; ++it2)
799 std::includes(it2->begin(), it2->end(), it->begin(), it->end()))
800 CI->SuperClasses.push_back(RegisterSetClasses[*it2]);
803 // Name the register classes which correspond to a user defined RegisterClass.
804 for (std::vector<CodeGenRegisterClass>::iterator it = RegisterClasses.begin(),
805 ie = RegisterClasses.end(); it != ie; ++it) {
806 ClassInfo *CI = RegisterSetClasses[std::set<Record*>(it->Elements.begin(),
807 it->Elements.end())];
808 if (CI->ValueName.empty()) {
809 CI->ClassName = it->getName();
810 CI->Name = "MCK_" + it->getName();
811 CI->ValueName = it->getName();
813 CI->ValueName = CI->ValueName + "," + it->getName();
815 RegisterClassClasses.insert(std::make_pair(it->TheDef, CI));
818 // Populate the map for individual registers.
819 for (std::map<Record*, std::set<Record*> >::iterator it = RegisterMap.begin(),
820 ie = RegisterMap.end(); it != ie; ++it)
821 this->RegisterClasses[it->first] = RegisterSetClasses[it->second];
823 // Name the register classes which correspond to singleton registers.
824 for (std::set<std::string>::iterator it = SingletonRegisterNames.begin(),
825 ie = SingletonRegisterNames.end(); it != ie; ++it) {
826 if (Record *Rec = getRegisterRecord(Target, *it)) {
827 ClassInfo *CI = this->RegisterClasses[Rec];
828 assert(CI && "Missing singleton register class info!");
830 if (CI->ValueName.empty()) {
831 CI->ClassName = Rec->getName();
832 CI->Name = "MCK_" + Rec->getName();
833 CI->ValueName = Rec->getName();
835 CI->ValueName = CI->ValueName + "," + Rec->getName();
840 void AsmMatcherInfo::BuildOperandClasses(CodeGenTarget &Target) {
841 std::vector<Record*> AsmOperands;
842 AsmOperands = Records.getAllDerivedDefinitions("AsmOperandClass");
844 // Pre-populate AsmOperandClasses map.
845 for (std::vector<Record*>::iterator it = AsmOperands.begin(),
846 ie = AsmOperands.end(); it != ie; ++it)
847 AsmOperandClasses[*it] = new ClassInfo();
850 for (std::vector<Record*>::iterator it = AsmOperands.begin(),
851 ie = AsmOperands.end(); it != ie; ++it, ++Index) {
852 ClassInfo *CI = AsmOperandClasses[*it];
853 CI->Kind = ClassInfo::UserClass0 + Index;
855 ListInit *Supers = (*it)->getValueAsListInit("SuperClasses");
856 for (unsigned i = 0, e = Supers->getSize(); i != e; ++i) {
857 DefInit *DI = dynamic_cast<DefInit*>(Supers->getElement(i));
859 PrintError((*it)->getLoc(), "Invalid super class reference!");
863 ClassInfo *SC = AsmOperandClasses[DI->getDef()];
865 PrintError((*it)->getLoc(), "Invalid super class reference!");
867 CI->SuperClasses.push_back(SC);
869 CI->ClassName = (*it)->getValueAsString("Name");
870 CI->Name = "MCK_" + CI->ClassName;
871 CI->ValueName = (*it)->getName();
873 // Get or construct the predicate method name.
874 Init *PMName = (*it)->getValueInit("PredicateMethod");
875 if (StringInit *SI = dynamic_cast<StringInit*>(PMName)) {
876 CI->PredicateMethod = SI->getValue();
878 assert(dynamic_cast<UnsetInit*>(PMName) &&
879 "Unexpected PredicateMethod field!");
880 CI->PredicateMethod = "is" + CI->ClassName;
883 // Get or construct the render method name.
884 Init *RMName = (*it)->getValueInit("RenderMethod");
885 if (StringInit *SI = dynamic_cast<StringInit*>(RMName)) {
886 CI->RenderMethod = SI->getValue();
888 assert(dynamic_cast<UnsetInit*>(RMName) &&
889 "Unexpected RenderMethod field!");
890 CI->RenderMethod = "add" + CI->ClassName + "Operands";
893 AsmOperandClasses[*it] = CI;
894 Classes.push_back(CI);
898 AsmMatcherInfo::AsmMatcherInfo(Record *_AsmParser)
899 : AsmParser(_AsmParser),
900 CommentDelimiter(AsmParser->getValueAsString("CommentDelimiter")),
901 RegisterPrefix(AsmParser->getValueAsString("RegisterPrefix"))
905 void AsmMatcherInfo::BuildInfo(CodeGenTarget &Target) {
906 // Parse the instructions; we need to do this first so that we can gather the
907 // singleton register classes.
908 std::set<std::string> SingletonRegisterNames;
910 const std::vector<const CodeGenInstruction*> &InstrList =
911 Target.getInstructionsByEnumValue();
913 for (unsigned i = 0, e = InstrList.size(); i != e; ++i) {
914 const CodeGenInstruction &CGI = *InstrList[i];
916 if (!StringRef(CGI.TheDef->getName()).startswith(MatchPrefix))
919 OwningPtr<InstructionInfo> II(new InstructionInfo());
921 II->InstrName = CGI.TheDef->getName();
923 II->AsmString = FlattenVariants(CGI.AsmString, 0);
925 // Remove comments from the asm string.
926 if (!CommentDelimiter.empty()) {
927 size_t Idx = StringRef(II->AsmString).find(CommentDelimiter);
928 if (Idx != StringRef::npos)
929 II->AsmString = II->AsmString.substr(0, Idx);
932 TokenizeAsmString(II->AsmString, II->Tokens);
934 // Ignore instructions which shouldn't be matched.
935 if (!IsAssemblerInstruction(CGI.TheDef->getName(), CGI, II->Tokens))
938 // Collect singleton registers, if used.
939 if (!RegisterPrefix.empty()) {
940 for (unsigned i = 0, e = II->Tokens.size(); i != e; ++i) {
941 if (II->Tokens[i].startswith(RegisterPrefix)) {
942 StringRef RegName = II->Tokens[i].substr(RegisterPrefix.size());
943 Record *Rec = getRegisterRecord(Target, RegName);
946 std::string Err = "unable to find register for '" + RegName.str() +
947 "' (which matches register prefix)";
948 throw TGError(CGI.TheDef->getLoc(), Err);
951 SingletonRegisterNames.insert(RegName);
956 // Compute the require features.
957 ListInit *Predicates = CGI.TheDef->getValueAsListInit("Predicates");
958 for (unsigned i = 0, e = Predicates->getSize(); i != e; ++i) {
959 if (DefInit *Pred = dynamic_cast<DefInit*>(Predicates->getElement(i))) {
960 // Ignore OptForSize and OptForSpeed, they aren't really requirements,
961 // rather they are hints to isel.
963 // FIXME: Find better way to model this.
964 if (Pred->getDef()->getName() == "OptForSize" ||
965 Pred->getDef()->getName() == "OptForSpeed")
968 // FIXME: Total hack; for now, we just limit ourselves to In32BitMode
969 // and In64BitMode, because we aren't going to have the right feature
970 // masks for SSE and friends. We need to decide what we are going to do
971 // about CPU subtypes to implement this the right way.
972 if (Pred->getDef()->getName() != "In32BitMode" &&
973 Pred->getDef()->getName() != "In64BitMode")
976 II->RequiredFeatures.push_back(getSubtargetFeature(Pred->getDef()));
980 Instructions.push_back(II.take());
983 // Build info for the register classes.
984 BuildRegisterClasses(Target, SingletonRegisterNames);
986 // Build info for the user defined assembly operand classes.
987 BuildOperandClasses(Target);
989 // Build the instruction information.
990 for (std::vector<InstructionInfo*>::iterator it = Instructions.begin(),
991 ie = Instructions.end(); it != ie; ++it) {
992 InstructionInfo *II = *it;
994 for (unsigned i = 0, e = II->Tokens.size(); i != e; ++i) {
995 StringRef Token = II->Tokens[i];
997 // Check for singleton registers.
998 if (!RegisterPrefix.empty() && Token.startswith(RegisterPrefix)) {
999 StringRef RegName = II->Tokens[i].substr(RegisterPrefix.size());
1000 InstructionInfo::Operand Op;
1001 Op.Class = RegisterClasses[getRegisterRecord(Target, RegName)];
1003 assert(Op.Class && Op.Class->Registers.size() == 1 &&
1004 "Unexpected class for singleton register");
1005 II->Operands.push_back(Op);
1009 // Check for simple tokens.
1010 if (Token[0] != '$') {
1011 InstructionInfo::Operand Op;
1012 Op.Class = getTokenClass(Token);
1014 II->Operands.push_back(Op);
1018 // Otherwise this is an operand reference.
1019 StringRef OperandName;
1020 if (Token[1] == '{')
1021 OperandName = Token.substr(2, Token.size() - 3);
1023 OperandName = Token.substr(1);
1025 // Map this token to an operand. FIXME: Move elsewhere.
1028 Idx = II->Instr->getOperandNamed(OperandName);
1030 throw std::string("error: unable to find operand: '" +
1031 OperandName.str() + "'");
1034 // FIXME: This is annoying, the named operand may be tied (e.g.,
1035 // XCHG8rm). What we want is the untied operand, which we now have to
1036 // grovel for. Only worry about this for single entry operands, we have to
1037 // clean this up anyway.
1038 const CodeGenInstruction::OperandInfo *OI = &II->Instr->OperandList[Idx];
1039 if (OI->Constraints[0].isTied()) {
1040 unsigned TiedOp = OI->Constraints[0].getTiedOperand();
1042 // The tied operand index is an MIOperand index, find the operand that
1044 for (unsigned i = 0, e = II->Instr->OperandList.size(); i != e; ++i) {
1045 if (II->Instr->OperandList[i].MIOperandNo == TiedOp) {
1046 OI = &II->Instr->OperandList[i];
1051 assert(OI && "Unable to find tied operand target!");
1054 InstructionInfo::Operand Op;
1055 Op.Class = getOperandClass(Token, *OI);
1056 Op.OperandInfo = OI;
1057 II->Operands.push_back(Op);
1061 // Reorder classes so that classes preceed super classes.
1062 std::sort(Classes.begin(), Classes.end(), less_ptr<ClassInfo>());
1065 static std::pair<unsigned, unsigned> *
1066 GetTiedOperandAtIndex(SmallVectorImpl<std::pair<unsigned, unsigned> > &List,
1068 for (unsigned i = 0, e = List.size(); i != e; ++i)
1069 if (Index == List[i].first)
1075 static void EmitConvertToMCInst(CodeGenTarget &Target,
1076 std::vector<InstructionInfo*> &Infos,
1078 // Write the convert function to a separate stream, so we can drop it after
1080 std::string ConvertFnBody;
1081 raw_string_ostream CvtOS(ConvertFnBody);
1083 // Function we have already generated.
1084 std::set<std::string> GeneratedFns;
1086 // Start the unified conversion function.
1088 CvtOS << "static void ConvertToMCInst(ConversionKind Kind, MCInst &Inst, "
1089 << "unsigned Opcode,\n"
1090 << " const SmallVectorImpl<MCParsedAsmOperand*"
1091 << "> &Operands) {\n";
1092 CvtOS << " Inst.setOpcode(Opcode);\n";
1093 CvtOS << " switch (Kind) {\n";
1094 CvtOS << " default:\n";
1096 // Start the enum, which we will generate inline.
1098 OS << "// Unified function for converting operants to MCInst instances.\n\n";
1099 OS << "enum ConversionKind {\n";
1101 // TargetOperandClass - This is the target's operand class, like X86Operand.
1102 std::string TargetOperandClass = Target.getName() + "Operand";
1104 for (std::vector<InstructionInfo*>::const_iterator it = Infos.begin(),
1105 ie = Infos.end(); it != ie; ++it) {
1106 InstructionInfo &II = **it;
1108 // Order the (class) operands by the order to convert them into an MCInst.
1109 SmallVector<std::pair<unsigned, unsigned>, 4> MIOperandList;
1110 for (unsigned i = 0, e = II.Operands.size(); i != e; ++i) {
1111 InstructionInfo::Operand &Op = II.Operands[i];
1113 MIOperandList.push_back(std::make_pair(Op.OperandInfo->MIOperandNo, i));
1116 // Find any tied operands.
1117 SmallVector<std::pair<unsigned, unsigned>, 4> TiedOperands;
1118 for (unsigned i = 0, e = II.Instr->OperandList.size(); i != e; ++i) {
1119 const CodeGenInstruction::OperandInfo &OpInfo = II.Instr->OperandList[i];
1120 for (unsigned j = 0, e = OpInfo.Constraints.size(); j != e; ++j) {
1121 const CodeGenInstruction::ConstraintInfo &CI = OpInfo.Constraints[j];
1123 TiedOperands.push_back(std::make_pair(OpInfo.MIOperandNo + j,
1124 CI.getTiedOperand()));
1128 std::sort(MIOperandList.begin(), MIOperandList.end());
1130 // Compute the total number of operands.
1131 unsigned NumMIOperands = 0;
1132 for (unsigned i = 0, e = II.Instr->OperandList.size(); i != e; ++i) {
1133 const CodeGenInstruction::OperandInfo &OI = II.Instr->OperandList[i];
1134 NumMIOperands = std::max(NumMIOperands,
1135 OI.MIOperandNo + OI.MINumOperands);
1138 // Build the conversion function signature.
1139 std::string Signature = "Convert";
1140 unsigned CurIndex = 0;
1141 for (unsigned i = 0, e = MIOperandList.size(); i != e; ++i) {
1142 InstructionInfo::Operand &Op = II.Operands[MIOperandList[i].second];
1143 assert(CurIndex <= Op.OperandInfo->MIOperandNo &&
1144 "Duplicate match for instruction operand!");
1146 // Skip operands which weren't matched by anything, this occurs when the
1147 // .td file encodes "implicit" operands as explicit ones.
1149 // FIXME: This should be removed from the MCInst structure.
1150 for (; CurIndex != Op.OperandInfo->MIOperandNo; ++CurIndex) {
1151 std::pair<unsigned, unsigned> *Tie = GetTiedOperandAtIndex(TiedOperands,
1154 Signature += "__Imp";
1156 Signature += "__Tie" + utostr(Tie->second);
1161 // Registers are always converted the same, don't duplicate the conversion
1162 // function based on them.
1164 // FIXME: We could generalize this based on the render method, if it
1166 if (Op.Class->isRegisterClass())
1169 Signature += Op.Class->ClassName;
1170 Signature += utostr(Op.OperandInfo->MINumOperands);
1171 Signature += "_" + utostr(MIOperandList[i].second);
1173 CurIndex += Op.OperandInfo->MINumOperands;
1176 // Add any trailing implicit operands.
1177 for (; CurIndex != NumMIOperands; ++CurIndex) {
1178 std::pair<unsigned, unsigned> *Tie = GetTiedOperandAtIndex(TiedOperands,
1181 Signature += "__Imp";
1183 Signature += "__Tie" + utostr(Tie->second);
1186 II.ConversionFnKind = Signature;
1188 // Check if we have already generated this signature.
1189 if (!GeneratedFns.insert(Signature).second)
1192 // If not, emit it now.
1194 // Add to the enum list.
1195 OS << " " << Signature << ",\n";
1197 // And to the convert function.
1198 CvtOS << " case " << Signature << ":\n";
1200 for (unsigned i = 0, e = MIOperandList.size(); i != e; ++i) {
1201 InstructionInfo::Operand &Op = II.Operands[MIOperandList[i].second];
1203 // Add the implicit operands.
1204 for (; CurIndex != Op.OperandInfo->MIOperandNo; ++CurIndex) {
1205 // See if this is a tied operand.
1206 std::pair<unsigned, unsigned> *Tie = GetTiedOperandAtIndex(TiedOperands,
1210 // If not, this is some implicit operand. Just assume it is a register
1212 CvtOS << " Inst.addOperand(MCOperand::CreateReg(0));\n";
1214 // Copy the tied operand.
1215 assert(Tie->first>Tie->second && "Tied operand preceeds its target!");
1216 CvtOS << " Inst.addOperand(Inst.getOperand("
1217 << Tie->second << "));\n";
1221 CvtOS << " ((" << TargetOperandClass << "*)Operands["
1222 << MIOperandList[i].second
1223 << "])->" << Op.Class->RenderMethod
1224 << "(Inst, " << Op.OperandInfo->MINumOperands << ");\n";
1225 CurIndex += Op.OperandInfo->MINumOperands;
1228 // And add trailing implicit operands.
1229 for (; CurIndex != NumMIOperands; ++CurIndex) {
1230 std::pair<unsigned, unsigned> *Tie = GetTiedOperandAtIndex(TiedOperands,
1234 // If not, this is some implicit operand. Just assume it is a register
1236 CvtOS << " Inst.addOperand(MCOperand::CreateReg(0));\n";
1238 // Copy the tied operand.
1239 assert(Tie->first>Tie->second && "Tied operand preceeds its target!");
1240 CvtOS << " Inst.addOperand(Inst.getOperand("
1241 << Tie->second << "));\n";
1245 CvtOS << " return;\n";
1248 // Finish the convert function.
1253 // Finish the enum, and drop the convert function after it.
1255 OS << " NumConversionVariants\n";
1261 /// EmitMatchClassEnumeration - Emit the enumeration for match class kinds.
1262 static void EmitMatchClassEnumeration(CodeGenTarget &Target,
1263 std::vector<ClassInfo*> &Infos,
1265 OS << "namespace {\n\n";
1267 OS << "/// MatchClassKind - The kinds of classes which participate in\n"
1268 << "/// instruction matching.\n";
1269 OS << "enum MatchClassKind {\n";
1270 OS << " InvalidMatchClass = 0,\n";
1271 for (std::vector<ClassInfo*>::iterator it = Infos.begin(),
1272 ie = Infos.end(); it != ie; ++it) {
1273 ClassInfo &CI = **it;
1274 OS << " " << CI.Name << ", // ";
1275 if (CI.Kind == ClassInfo::Token) {
1276 OS << "'" << CI.ValueName << "'\n";
1277 } else if (CI.isRegisterClass()) {
1278 if (!CI.ValueName.empty())
1279 OS << "register class '" << CI.ValueName << "'\n";
1281 OS << "derived register class\n";
1283 OS << "user defined class '" << CI.ValueName << "'\n";
1286 OS << " NumMatchClassKinds\n";
1292 /// EmitClassifyOperand - Emit the function to classify an operand.
1293 static void EmitClassifyOperand(CodeGenTarget &Target,
1294 AsmMatcherInfo &Info,
1296 OS << "static MatchClassKind ClassifyOperand(MCParsedAsmOperand *GOp) {\n"
1297 << " " << Target.getName() << "Operand &Operand = *("
1298 << Target.getName() << "Operand*)GOp;\n";
1301 OS << " if (Operand.isToken())\n";
1302 OS << " return MatchTokenString(Operand.getToken());\n\n";
1304 // Classify registers.
1306 // FIXME: Don't hardcode isReg, getReg.
1307 OS << " if (Operand.isReg()) {\n";
1308 OS << " switch (Operand.getReg()) {\n";
1309 OS << " default: return InvalidMatchClass;\n";
1310 for (std::map<Record*, ClassInfo*>::iterator
1311 it = Info.RegisterClasses.begin(), ie = Info.RegisterClasses.end();
1313 OS << " case " << Target.getName() << "::"
1314 << it->first->getName() << ": return " << it->second->Name << ";\n";
1318 // Classify user defined operands.
1319 for (std::vector<ClassInfo*>::iterator it = Info.Classes.begin(),
1320 ie = Info.Classes.end(); it != ie; ++it) {
1321 ClassInfo &CI = **it;
1323 if (!CI.isUserClass())
1326 OS << " // '" << CI.ClassName << "' class";
1327 if (!CI.SuperClasses.empty()) {
1328 OS << ", subclass of ";
1329 for (unsigned i = 0, e = CI.SuperClasses.size(); i != e; ++i) {
1331 OS << "'" << CI.SuperClasses[i]->ClassName << "'";
1332 assert(CI < *CI.SuperClasses[i] && "Invalid class relation!");
1337 OS << " if (Operand." << CI.PredicateMethod << "()) {\n";
1339 // Validate subclass relationships.
1340 if (!CI.SuperClasses.empty()) {
1341 for (unsigned i = 0, e = CI.SuperClasses.size(); i != e; ++i)
1342 OS << " assert(Operand." << CI.SuperClasses[i]->PredicateMethod
1343 << "() && \"Invalid class relationship!\");\n";
1346 OS << " return " << CI.Name << ";\n";
1349 OS << " return InvalidMatchClass;\n";
1353 /// EmitIsSubclass - Emit the subclass predicate function.
1354 static void EmitIsSubclass(CodeGenTarget &Target,
1355 std::vector<ClassInfo*> &Infos,
1357 OS << "/// IsSubclass - Compute whether \\arg A is a subclass of \\arg B.\n";
1358 OS << "static bool IsSubclass(MatchClassKind A, MatchClassKind B) {\n";
1359 OS << " if (A == B)\n";
1360 OS << " return true;\n\n";
1362 OS << " switch (A) {\n";
1363 OS << " default:\n";
1364 OS << " return false;\n";
1365 for (std::vector<ClassInfo*>::iterator it = Infos.begin(),
1366 ie = Infos.end(); it != ie; ++it) {
1367 ClassInfo &A = **it;
1369 if (A.Kind != ClassInfo::Token) {
1370 std::vector<StringRef> SuperClasses;
1371 for (std::vector<ClassInfo*>::iterator it = Infos.begin(),
1372 ie = Infos.end(); it != ie; ++it) {
1373 ClassInfo &B = **it;
1375 if (&A != &B && A.isSubsetOf(B))
1376 SuperClasses.push_back(B.Name);
1379 if (SuperClasses.empty())
1382 OS << "\n case " << A.Name << ":\n";
1384 if (SuperClasses.size() == 1) {
1385 OS << " return B == " << SuperClasses.back() << ";\n";
1389 OS << " switch (B) {\n";
1390 OS << " default: return false;\n";
1391 for (unsigned i = 0, e = SuperClasses.size(); i != e; ++i)
1392 OS << " case " << SuperClasses[i] << ": return true;\n";
1400 typedef std::pair<std::string, std::string> StringPair;
1402 /// FindFirstNonCommonLetter - Find the first character in the keys of the
1403 /// string pairs that is not shared across the whole set of strings. All
1404 /// strings are assumed to have the same length.
1406 FindFirstNonCommonLetter(const std::vector<const StringPair*> &Matches) {
1407 assert(!Matches.empty());
1408 for (unsigned i = 0, e = Matches[0]->first.size(); i != e; ++i) {
1409 // Check to see if letter i is the same across the set.
1410 char Letter = Matches[0]->first[i];
1412 for (unsigned str = 0, e = Matches.size(); str != e; ++str)
1413 if (Matches[str]->first[i] != Letter)
1417 return Matches[0]->first.size();
1420 /// EmitStringMatcherForChar - Given a set of strings that are known to be the
1421 /// same length and whose characters leading up to CharNo are the same, emit
1422 /// code to verify that CharNo and later are the same.
1424 /// \return - True if control can leave the emitted code fragment.
1425 static bool EmitStringMatcherForChar(const std::string &StrVariableName,
1426 const std::vector<const StringPair*> &Matches,
1427 unsigned CharNo, unsigned IndentCount,
1429 assert(!Matches.empty() && "Must have at least one string to match!");
1430 std::string Indent(IndentCount*2+4, ' ');
1432 // If we have verified that the entire string matches, we're done: output the
1434 if (CharNo == Matches[0]->first.size()) {
1435 assert(Matches.size() == 1 && "Had duplicate keys to match on");
1437 // FIXME: If Matches[0].first has embeded \n, this will be bad.
1438 OS << Indent << Matches[0]->second << "\t // \"" << Matches[0]->first
1443 // Bucket the matches by the character we are comparing.
1444 std::map<char, std::vector<const StringPair*> > MatchesByLetter;
1446 for (unsigned i = 0, e = Matches.size(); i != e; ++i)
1447 MatchesByLetter[Matches[i]->first[CharNo]].push_back(Matches[i]);
1450 // If we have exactly one bucket to match, see how many characters are common
1451 // across the whole set and match all of them at once.
1452 if (MatchesByLetter.size() == 1) {
1453 unsigned FirstNonCommonLetter = FindFirstNonCommonLetter(Matches);
1454 unsigned NumChars = FirstNonCommonLetter-CharNo;
1456 // Emit code to break out if the prefix doesn't match.
1457 if (NumChars == 1) {
1458 // Do the comparison with if (Str[1] != 'f')
1459 // FIXME: Need to escape general characters.
1460 OS << Indent << "if (" << StrVariableName << "[" << CharNo << "] != '"
1461 << Matches[0]->first[CharNo] << "')\n";
1462 OS << Indent << " break;\n";
1464 // Do the comparison with if (Str.substr(1,3) != "foo").
1465 // FIXME: Need to escape general strings.
1466 OS << Indent << "if (" << StrVariableName << ".substr(" << CharNo << ","
1467 << NumChars << ") != \"";
1468 OS << Matches[0]->first.substr(CharNo, NumChars) << "\")\n";
1469 OS << Indent << " break;\n";
1472 return EmitStringMatcherForChar(StrVariableName, Matches,
1473 FirstNonCommonLetter, IndentCount, OS);
1476 // Otherwise, we have multiple possible things, emit a switch on the
1478 OS << Indent << "switch (" << StrVariableName << "[" << CharNo << "]) {\n";
1479 OS << Indent << "default: break;\n";
1481 for (std::map<char, std::vector<const StringPair*> >::iterator LI =
1482 MatchesByLetter.begin(), E = MatchesByLetter.end(); LI != E; ++LI) {
1483 // TODO: escape hard stuff (like \n) if we ever care about it.
1484 OS << Indent << "case '" << LI->first << "':\t // "
1485 << LI->second.size() << " strings to match.\n";
1486 if (EmitStringMatcherForChar(StrVariableName, LI->second, CharNo+1,
1488 OS << Indent << " break;\n";
1491 OS << Indent << "}\n";
1496 /// EmitStringMatcher - Given a list of strings and code to execute when they
1497 /// match, output a simple switch tree to classify the input string.
1499 /// If a match is found, the code in Vals[i].second is executed; control must
1500 /// not exit this code fragment. If nothing matches, execution falls through.
1502 /// \param StrVariableName - The name of the variable to test.
1503 static void EmitStringMatcher(const std::string &StrVariableName,
1504 const std::vector<StringPair> &Matches,
1506 // First level categorization: group strings by length.
1507 std::map<unsigned, std::vector<const StringPair*> > MatchesByLength;
1509 for (unsigned i = 0, e = Matches.size(); i != e; ++i)
1510 MatchesByLength[Matches[i].first.size()].push_back(&Matches[i]);
1512 // Output a switch statement on length and categorize the elements within each
1514 OS << " switch (" << StrVariableName << ".size()) {\n";
1515 OS << " default: break;\n";
1517 for (std::map<unsigned, std::vector<const StringPair*> >::iterator LI =
1518 MatchesByLength.begin(), E = MatchesByLength.end(); LI != E; ++LI) {
1519 OS << " case " << LI->first << ":\t // " << LI->second.size()
1520 << " strings to match.\n";
1521 if (EmitStringMatcherForChar(StrVariableName, LI->second, 0, 0, OS))
1529 /// EmitMatchTokenString - Emit the function to match a token string to the
1530 /// appropriate match class value.
1531 static void EmitMatchTokenString(CodeGenTarget &Target,
1532 std::vector<ClassInfo*> &Infos,
1534 // Construct the match list.
1535 std::vector<StringPair> Matches;
1536 for (std::vector<ClassInfo*>::iterator it = Infos.begin(),
1537 ie = Infos.end(); it != ie; ++it) {
1538 ClassInfo &CI = **it;
1540 if (CI.Kind == ClassInfo::Token)
1541 Matches.push_back(StringPair(CI.ValueName, "return " + CI.Name + ";"));
1544 OS << "static MatchClassKind MatchTokenString(StringRef Name) {\n";
1546 EmitStringMatcher("Name", Matches, OS);
1548 OS << " return InvalidMatchClass;\n";
1552 /// EmitMatchRegisterName - Emit the function to match a string to the target
1553 /// specific register enum.
1554 static void EmitMatchRegisterName(CodeGenTarget &Target, Record *AsmParser,
1556 // Construct the match list.
1557 std::vector<StringPair> Matches;
1558 for (unsigned i = 0, e = Target.getRegisters().size(); i != e; ++i) {
1559 const CodeGenRegister &Reg = Target.getRegisters()[i];
1560 if (Reg.TheDef->getValueAsString("AsmName").empty())
1563 Matches.push_back(StringPair(Reg.TheDef->getValueAsString("AsmName"),
1564 "return " + utostr(i + 1) + ";"));
1567 OS << "static unsigned MatchRegisterName(StringRef Name) {\n";
1569 EmitStringMatcher("Name", Matches, OS);
1571 OS << " return 0;\n";
1575 /// EmitSubtargetFeatureFlagEnumeration - Emit the subtarget feature flag
1577 static void EmitSubtargetFeatureFlagEnumeration(CodeGenTarget &Target,
1578 AsmMatcherInfo &Info,
1580 OS << "// Flags for subtarget features that participate in "
1581 << "instruction matching.\n";
1582 OS << "enum SubtargetFeatureFlag {\n";
1583 for (std::map<Record*, SubtargetFeatureInfo*>::const_iterator
1584 it = Info.SubtargetFeatures.begin(),
1585 ie = Info.SubtargetFeatures.end(); it != ie; ++it) {
1586 SubtargetFeatureInfo &SFI = *it->second;
1587 OS << " " << SFI.EnumName << " = (1 << " << SFI.Index << "),\n";
1589 OS << " Feature_None = 0\n";
1593 /// EmitComputeAvailableFeatures - Emit the function to compute the list of
1594 /// available features given a subtarget.
1595 static void EmitComputeAvailableFeatures(CodeGenTarget &Target,
1596 AsmMatcherInfo &Info,
1598 std::string ClassName =
1599 Info.AsmParser->getValueAsString("AsmParserClassName");
1601 OS << "unsigned " << Target.getName() << ClassName << "::\n"
1602 << "ComputeAvailableFeatures(const " << Target.getName()
1603 << "Subtarget *Subtarget) const {\n";
1604 OS << " unsigned Features = 0;\n";
1605 for (std::map<Record*, SubtargetFeatureInfo*>::const_iterator
1606 it = Info.SubtargetFeatures.begin(),
1607 ie = Info.SubtargetFeatures.end(); it != ie; ++it) {
1608 SubtargetFeatureInfo &SFI = *it->second;
1609 OS << " if (" << SFI.TheDef->getValueAsString("CondString")
1611 OS << " Features |= " << SFI.EnumName << ";\n";
1613 OS << " return Features;\n";
1617 void AsmMatcherEmitter::run(raw_ostream &OS) {
1618 CodeGenTarget Target;
1619 Record *AsmParser = Target.getAsmParser();
1620 std::string ClassName = AsmParser->getValueAsString("AsmParserClassName");
1622 // Compute the information on the instructions to match.
1623 AsmMatcherInfo Info(AsmParser);
1624 Info.BuildInfo(Target);
1626 // Sort the instruction table using the partial order on classes. We use
1627 // stable_sort to ensure that ambiguous instructions are still
1628 // deterministically ordered.
1629 std::stable_sort(Info.Instructions.begin(), Info.Instructions.end(),
1630 less_ptr<InstructionInfo>());
1632 DEBUG_WITH_TYPE("instruction_info", {
1633 for (std::vector<InstructionInfo*>::iterator
1634 it = Info.Instructions.begin(), ie = Info.Instructions.end();
1639 // Check for ambiguous instructions.
1640 unsigned NumAmbiguous = 0;
1641 for (unsigned i = 0, e = Info.Instructions.size(); i != e; ++i) {
1642 for (unsigned j = i + 1; j != e; ++j) {
1643 InstructionInfo &A = *Info.Instructions[i];
1644 InstructionInfo &B = *Info.Instructions[j];
1646 if (A.CouldMatchAmiguouslyWith(B)) {
1647 DEBUG_WITH_TYPE("ambiguous_instrs", {
1648 errs() << "warning: ambiguous instruction match:\n";
1650 errs() << "\nis incomparable with:\n";
1659 DEBUG_WITH_TYPE("ambiguous_instrs", {
1660 errs() << "warning: " << NumAmbiguous
1661 << " ambiguous instructions!\n";
1664 // Write the output.
1666 EmitSourceFileHeader("Assembly Matcher Source Fragment", OS);
1668 // Emit the subtarget feature enumeration.
1669 EmitSubtargetFeatureFlagEnumeration(Target, Info, OS);
1671 // Emit the function to match a register name to number.
1672 EmitMatchRegisterName(Target, AsmParser, OS);
1674 OS << "#ifndef REGISTERS_ONLY\n\n";
1676 // Generate the unified function to convert operands into an MCInst.
1677 EmitConvertToMCInst(Target, Info.Instructions, OS);
1679 // Emit the enumeration for classes which participate in matching.
1680 EmitMatchClassEnumeration(Target, Info.Classes, OS);
1682 // Emit the routine to match token strings to their match class.
1683 EmitMatchTokenString(Target, Info.Classes, OS);
1685 // Emit the routine to classify an operand.
1686 EmitClassifyOperand(Target, Info, OS);
1688 // Emit the subclass predicate routine.
1689 EmitIsSubclass(Target, Info.Classes, OS);
1691 // Emit the available features compute function.
1692 EmitComputeAvailableFeatures(Target, Info, OS);
1694 // Finally, build the match function.
1696 size_t MaxNumOperands = 0;
1697 for (std::vector<InstructionInfo*>::const_iterator it =
1698 Info.Instructions.begin(), ie = Info.Instructions.end();
1700 MaxNumOperands = std::max(MaxNumOperands, (*it)->Operands.size());
1702 const std::string &MatchName =
1703 AsmParser->getValueAsString("MatchInstructionName");
1704 OS << "bool " << Target.getName() << ClassName << "::\n"
1706 << "(const SmallVectorImpl<MCParsedAsmOperand*> &Operands,\n";
1707 OS.indent(MatchName.size() + 1);
1708 OS << "MCInst &Inst) {\n";
1710 // Emit the static match table; unused classes get initalized to 0 which is
1711 // guaranteed to be InvalidMatchClass.
1713 // FIXME: We can reduce the size of this table very easily. First, we change
1714 // it so that store the kinds in separate bit-fields for each index, which
1715 // only needs to be the max width used for classes at that index (we also need
1716 // to reject based on this during classification). If we then make sure to
1717 // order the match kinds appropriately (putting mnemonics last), then we
1718 // should only end up using a few bits for each class, especially the ones
1719 // following the mnemonic.
1720 OS << " static const struct MatchEntry {\n";
1721 OS << " unsigned Opcode;\n";
1722 OS << " ConversionKind ConvertFn;\n";
1723 OS << " MatchClassKind Classes[" << MaxNumOperands << "];\n";
1724 OS << " unsigned RequiredFeatures;\n";
1725 OS << " } MatchTable[" << Info.Instructions.size() << "] = {\n";
1727 for (std::vector<InstructionInfo*>::const_iterator it =
1728 Info.Instructions.begin(), ie = Info.Instructions.end();
1730 InstructionInfo &II = **it;
1732 OS << " { " << Target.getName() << "::" << II.InstrName
1733 << ", " << II.ConversionFnKind << ", { ";
1734 for (unsigned i = 0, e = II.Operands.size(); i != e; ++i) {
1735 InstructionInfo::Operand &Op = II.Operands[i];
1738 OS << Op.Class->Name;
1742 // Write the required features mask.
1743 if (!II.RequiredFeatures.empty()) {
1744 for (unsigned i = 0, e = II.RequiredFeatures.size(); i != e; ++i) {
1746 OS << II.RequiredFeatures[i]->EnumName;
1757 // Emit code to get the available features.
1758 OS << " // Get the current feature set.\n";
1759 OS << " unsigned AvailableFeatures = getAvailableFeatures();\n\n";
1761 // Emit code to compute the class list for this operand vector.
1762 OS << " // Eliminate obvious mismatches.\n";
1763 OS << " if (Operands.size() > " << MaxNumOperands << ")\n";
1764 OS << " return true;\n\n";
1766 OS << " // Compute the class list for this operand vector.\n";
1767 OS << " MatchClassKind Classes[" << MaxNumOperands << "];\n";
1768 OS << " for (unsigned i = 0, e = Operands.size(); i != e; ++i) {\n";
1769 OS << " Classes[i] = ClassifyOperand(Operands[i]);\n\n";
1771 OS << " // Check for invalid operands before matching.\n";
1772 OS << " if (Classes[i] == InvalidMatchClass)\n";
1773 OS << " return true;\n";
1776 OS << " // Mark unused classes.\n";
1777 OS << " for (unsigned i = Operands.size(), e = " << MaxNumOperands << "; "
1778 << "i != e; ++i)\n";
1779 OS << " Classes[i] = InvalidMatchClass;\n\n";
1781 // Emit code to search the table.
1782 OS << " // Search the table.\n";
1783 OS << " for (const MatchEntry *it = MatchTable, "
1784 << "*ie = MatchTable + " << Info.Instructions.size()
1785 << "; it != ie; ++it) {\n";
1787 // Emit check that the required features are available.
1788 OS << " if ((AvailableFeatures & it->RequiredFeatures) "
1789 << "!= it->RequiredFeatures)\n";
1790 OS << " continue;\n";
1792 // Emit check that the subclasses match.
1793 for (unsigned i = 0; i != MaxNumOperands; ++i) {
1794 OS << " if (!IsSubclass(Classes["
1795 << i << "], it->Classes[" << i << "]))\n";
1796 OS << " continue;\n";
1799 OS << " ConvertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands);\n";
1801 // Call the post-processing function, if used.
1802 std::string InsnCleanupFn =
1803 AsmParser->getValueAsString("AsmParserInstCleanup");
1804 if (!InsnCleanupFn.empty())
1805 OS << " " << InsnCleanupFn << "(Inst);\n";
1807 OS << " return false;\n";
1810 OS << " return true;\n";
1813 OS << "#endif // REGISTERS_ONLY\n";