1 //===- AsmMatcherEmitter.cpp - Generate an assembly matcher ---------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This tablegen backend emits a target specifier matcher for converting parsed
11 // assembly operands in the MCInst structures.
13 // The input to the target specific matcher is a list of literal tokens and
14 // operands. The target specific parser should generally eliminate any syntax
15 // which is not relevant for matching; for example, comma tokens should have
16 // already been consumed and eliminated by the parser. Most instructions will
17 // end up with a single literal token (the instruction name) and some number of
20 // Some example inputs, for X86:
21 // 'addl' (immediate ...) (register ...)
22 // 'add' (immediate ...) (memory ...)
25 // The assembly matcher is responsible for converting this input into a precise
26 // machine instruction (i.e., an instruction with a well defined encoding). This
27 // mapping has several properties which complicate matching:
29 // - It may be ambiguous; many architectures can legally encode particular
30 // variants of an instruction in different ways (for example, using a smaller
31 // encoding for small immediates). Such ambiguities should never be
32 // arbitrarily resolved by the assembler, the assembler is always responsible
33 // for choosing the "best" available instruction.
35 // - It may depend on the subtarget or the assembler context. Instructions
36 // which are invalid for the current mode, but otherwise unambiguous (e.g.,
37 // an SSE instruction in a file being assembled for i486) should be accepted
38 // and rejected by the assembler front end. However, if the proper encoding
39 // for an instruction is dependent on the assembler context then the matcher
40 // is responsible for selecting the correct machine instruction for the
43 // The core matching algorithm attempts to exploit the regularity in most
44 // instruction sets to quickly determine the set of possibly matching
45 // instructions, and the simplify the generated code. Additionally, this helps
46 // to ensure that the ambiguities are intentionally resolved by the user.
48 // The matching is divided into two distinct phases:
50 // 1. Classification: Each operand is mapped to the unique set which (a)
51 // contains it, and (b) is the largest such subset for which a single
52 // instruction could match all members.
54 // For register classes, we can generate these subgroups automatically. For
55 // arbitrary operands, we expect the user to define the classes and their
56 // relations to one another (for example, 8-bit signed immediates as a
57 // subset of 32-bit immediates).
59 // By partitioning the operands in this way, we guarantee that for any
60 // tuple of classes, any single instruction must match either all or none
61 // of the sets of operands which could classify to that tuple.
63 // In addition, the subset relation amongst classes induces a partial order
64 // on such tuples, which we use to resolve ambiguities.
66 // 2. The input can now be treated as a tuple of classes (static tokens are
67 // simple singleton sets). Each such tuple should generally map to a single
68 // instruction (we currently ignore cases where this isn't true, whee!!!),
69 // which we can emit a simple matcher for.
71 //===----------------------------------------------------------------------===//
73 #include "AsmMatcherEmitter.h"
74 #include "CodeGenTarget.h"
76 #include "StringMatcher.h"
77 #include "llvm/ADT/OwningPtr.h"
78 #include "llvm/ADT/SmallPtrSet.h"
79 #include "llvm/ADT/SmallVector.h"
80 #include "llvm/ADT/STLExtras.h"
81 #include "llvm/ADT/StringExtras.h"
82 #include "llvm/Support/CommandLine.h"
83 #include "llvm/Support/Debug.h"
88 static cl::opt<std::string>
89 MatchPrefix("match-prefix", cl::init(""),
90 cl::desc("Only match instructions with the given prefix"));
95 struct SubtargetFeatureInfo;
97 /// ClassInfo - Helper class for storing the information about a particular
98 /// class of operands which can be matched.
101 /// Invalid kind, for use as a sentinel value.
104 /// The class for a particular token.
107 /// The (first) register class, subsequent register classes are
108 /// RegisterClass0+1, and so on.
111 /// The (first) user defined class, subsequent user defined classes are
112 /// UserClass0+1, and so on.
116 /// Kind - The class kind, which is either a predefined kind, or (UserClass0 +
117 /// N) for the Nth user defined class.
120 /// SuperClasses - The super classes of this class. Note that for simplicities
121 /// sake user operands only record their immediate super class, while register
122 /// operands include all superclasses.
123 std::vector<ClassInfo*> SuperClasses;
125 /// Name - The full class name, suitable for use in an enum.
128 /// ClassName - The unadorned generic name for this class (e.g., Token).
129 std::string ClassName;
131 /// ValueName - The name of the value this class represents; for a token this
132 /// is the literal token string, for an operand it is the TableGen class (or
133 /// empty if this is a derived class).
134 std::string ValueName;
136 /// PredicateMethod - The name of the operand method to test whether the
137 /// operand matches this class; this is not valid for Token or register kinds.
138 std::string PredicateMethod;
140 /// RenderMethod - The name of the operand method to add this operand to an
141 /// MCInst; this is not valid for Token or register kinds.
142 std::string RenderMethod;
144 /// For register classes, the records for all the registers in this class.
145 std::set<Record*> Registers;
148 /// isRegisterClass() - Check if this is a register class.
149 bool isRegisterClass() const {
150 return Kind >= RegisterClass0 && Kind < UserClass0;
153 /// isUserClass() - Check if this is a user defined class.
154 bool isUserClass() const {
155 return Kind >= UserClass0;
158 /// isRelatedTo - Check whether this class is "related" to \arg RHS. Classes
159 /// are related if they are in the same class hierarchy.
160 bool isRelatedTo(const ClassInfo &RHS) const {
161 // Tokens are only related to tokens.
162 if (Kind == Token || RHS.Kind == Token)
163 return Kind == Token && RHS.Kind == Token;
165 // Registers classes are only related to registers classes, and only if
166 // their intersection is non-empty.
167 if (isRegisterClass() || RHS.isRegisterClass()) {
168 if (!isRegisterClass() || !RHS.isRegisterClass())
171 std::set<Record*> Tmp;
172 std::insert_iterator< std::set<Record*> > II(Tmp, Tmp.begin());
173 std::set_intersection(Registers.begin(), Registers.end(),
174 RHS.Registers.begin(), RHS.Registers.end(),
180 // Otherwise we have two users operands; they are related if they are in the
181 // same class hierarchy.
183 // FIXME: This is an oversimplification, they should only be related if they
184 // intersect, however we don't have that information.
185 assert(isUserClass() && RHS.isUserClass() && "Unexpected class!");
186 const ClassInfo *Root = this;
187 while (!Root->SuperClasses.empty())
188 Root = Root->SuperClasses.front();
190 const ClassInfo *RHSRoot = &RHS;
191 while (!RHSRoot->SuperClasses.empty())
192 RHSRoot = RHSRoot->SuperClasses.front();
194 return Root == RHSRoot;
197 /// isSubsetOf - Test whether this class is a subset of \arg RHS;
198 bool isSubsetOf(const ClassInfo &RHS) const {
199 // This is a subset of RHS if it is the same class...
203 // ... or if any of its super classes are a subset of RHS.
204 for (std::vector<ClassInfo*>::const_iterator it = SuperClasses.begin(),
205 ie = SuperClasses.end(); it != ie; ++it)
206 if ((*it)->isSubsetOf(RHS))
212 /// operator< - Compare two classes.
213 bool operator<(const ClassInfo &RHS) const {
217 // Unrelated classes can be ordered by kind.
218 if (!isRelatedTo(RHS))
219 return Kind < RHS.Kind;
223 assert(0 && "Invalid kind!");
225 // Tokens are comparable by value.
227 // FIXME: Compare by enum value.
228 return ValueName < RHS.ValueName;
231 // This class preceeds the RHS if it is a proper subset of the RHS.
234 if (RHS.isSubsetOf(*this))
237 // Otherwise, order by name to ensure we have a total ordering.
238 return ValueName < RHS.ValueName;
243 /// MatchableInfo - Helper class for storing the necessary information for an
244 /// instruction or alias which is capable of being matched.
245 struct MatchableInfo {
247 /// Token - This is the token that the operand came from.
250 /// The unique class instance this operand should match.
253 /// The original operand this corresponds to.
256 explicit AsmOperand(StringRef T) : Token(T), Class(0), SrcOpNum(-1) {}
259 /// ResOperand - This represents a single operand in the result instruction
260 /// generated by the match. In cases (like addressing modes) where a single
261 /// assembler operand expands to multiple MCOperands, this represents the
262 /// single assembler operand, not the MCOperand.
265 /// RenderAsmOperand - This represents an operand result that is
266 /// generated by calling the render method on the assembly operand. The
267 /// corresponding AsmOperand is specified by AsmOperandNum.
270 /// TiedOperand - This represents a result operand that is a duplicate of
271 /// a previous result operand.
276 /// This is the operand # in the AsmOperands list that this should be
278 unsigned AsmOperandNum;
280 /// TiedOperandNum - This is the (earlier) result operand that should be
282 unsigned TiedOperandNum;
285 /// OpInfo - This is the information about the instruction operand that is
287 const CGIOperandList::OperandInfo *OpInfo;
289 static ResOperand getRenderedOp(unsigned AsmOpNum,
290 const CGIOperandList::OperandInfo *Op) {
292 X.Kind = RenderAsmOperand;
293 X.AsmOperandNum = AsmOpNum;
298 static ResOperand getTiedOp(unsigned TiedOperandNum,
299 const CGIOperandList::OperandInfo *Op) {
301 X.Kind = TiedOperand;
302 X.TiedOperandNum = TiedOperandNum;
308 /// InstrName - The target name for this instruction.
309 std::string InstrName;
311 /// TheDef - This is the definition of the instruction or InstAlias that this
312 /// matchable came from.
313 Record *const TheDef;
316 const CGIOperandList &TheOperandList;
319 /// ResOperands - This is the operand list that should be built for the result
321 std::vector<ResOperand> ResOperands;
323 /// AsmString - The assembly string for this instruction (with variants
324 /// removed), e.g. "movsx $src, $dst".
325 std::string AsmString;
327 /// Mnemonic - This is the first token of the matched instruction, its
331 /// AsmOperands - The textual operands that this instruction matches,
332 /// annotated with a class and where in the OperandList they were defined.
333 /// This directly corresponds to the tokenized AsmString after the mnemonic is
335 SmallVector<AsmOperand, 4> AsmOperands;
337 /// Predicates - The required subtarget features to match this instruction.
338 SmallVector<SubtargetFeatureInfo*, 4> RequiredFeatures;
340 /// ConversionFnKind - The enum value which is passed to the generated
341 /// ConvertToMCInst to convert parsed operands into an MCInst for this
343 std::string ConversionFnKind;
345 MatchableInfo(const CodeGenInstruction &CGI)
346 : TheDef(CGI.TheDef), TheOperandList(CGI.Operands), AsmString(CGI.AsmString) {
347 InstrName = TheDef->getName();
350 MatchableInfo(const CodeGenInstAlias *Alias)
351 : TheDef(Alias->TheDef), TheOperandList(Alias->Operands),
352 AsmString(Alias->AsmString) {
355 DefInit *DI = dynamic_cast<DefInit*>(Alias->Result->getOperator());
358 InstrName = DI->getDef()->getName();
361 void Initialize(const AsmMatcherInfo &Info,
362 SmallPtrSet<Record*, 16> &SingletonRegisters);
364 /// Validate - Return true if this matchable is a valid thing to match against
365 /// and perform a bunch of validity checking.
366 bool Validate(StringRef CommentDelimiter, bool Hack) const;
368 /// getSingletonRegisterForAsmOperand - If the specified token is a singleton
369 /// register, return the Record for it, otherwise return null.
370 Record *getSingletonRegisterForAsmOperand(unsigned i,
371 const AsmMatcherInfo &Info) const;
373 void BuildResultOperands();
375 /// operator< - Compare two matchables.
376 bool operator<(const MatchableInfo &RHS) const {
377 // The primary comparator is the instruction mnemonic.
378 if (Mnemonic != RHS.Mnemonic)
379 return Mnemonic < RHS.Mnemonic;
381 if (AsmOperands.size() != RHS.AsmOperands.size())
382 return AsmOperands.size() < RHS.AsmOperands.size();
384 // Compare lexicographically by operand. The matcher validates that other
385 // orderings wouldn't be ambiguous using \see CouldMatchAmiguouslyWith().
386 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
387 if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class)
389 if (*RHS.AsmOperands[i].Class < *AsmOperands[i].Class)
396 /// CouldMatchAmiguouslyWith - Check whether this matchable could
397 /// ambiguously match the same set of operands as \arg RHS (without being a
398 /// strictly superior match).
399 bool CouldMatchAmiguouslyWith(const MatchableInfo &RHS) {
400 // The primary comparator is the instruction mnemonic.
401 if (Mnemonic != RHS.Mnemonic)
404 // The number of operands is unambiguous.
405 if (AsmOperands.size() != RHS.AsmOperands.size())
408 // Otherwise, make sure the ordering of the two instructions is unambiguous
409 // by checking that either (a) a token or operand kind discriminates them,
410 // or (b) the ordering among equivalent kinds is consistent.
412 // Tokens and operand kinds are unambiguous (assuming a correct target
414 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i)
415 if (AsmOperands[i].Class->Kind != RHS.AsmOperands[i].Class->Kind ||
416 AsmOperands[i].Class->Kind == ClassInfo::Token)
417 if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class ||
418 *RHS.AsmOperands[i].Class < *AsmOperands[i].Class)
421 // Otherwise, this operand could commute if all operands are equivalent, or
422 // there is a pair of operands that compare less than and a pair that
423 // compare greater than.
424 bool HasLT = false, HasGT = false;
425 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
426 if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class)
428 if (*RHS.AsmOperands[i].Class < *AsmOperands[i].Class)
432 return !(HasLT ^ HasGT);
438 void TokenizeAsmString(const AsmMatcherInfo &Info);
441 /// SubtargetFeatureInfo - Helper class for storing information on a subtarget
442 /// feature which participates in instruction matching.
443 struct SubtargetFeatureInfo {
444 /// \brief The predicate record for this feature.
447 /// \brief An unique index assigned to represent this feature.
450 SubtargetFeatureInfo(Record *D, unsigned Idx) : TheDef(D), Index(Idx) {}
452 /// \brief The name of the enumerated constant identifying this feature.
453 std::string getEnumName() const {
454 return "Feature_" + TheDef->getName();
458 class AsmMatcherInfo {
460 /// The tablegen AsmParser record.
463 /// Target - The target information.
464 CodeGenTarget &Target;
466 /// The AsmParser "RegisterPrefix" value.
467 std::string RegisterPrefix;
469 /// The classes which are needed for matching.
470 std::vector<ClassInfo*> Classes;
472 /// The information on the matchables to match.
473 std::vector<MatchableInfo*> Matchables;
475 /// Map of Register records to their class information.
476 std::map<Record*, ClassInfo*> RegisterClasses;
478 /// Map of Predicate records to their subtarget information.
479 std::map<Record*, SubtargetFeatureInfo*> SubtargetFeatures;
482 /// Map of token to class information which has already been constructed.
483 std::map<std::string, ClassInfo*> TokenClasses;
485 /// Map of RegisterClass records to their class information.
486 std::map<Record*, ClassInfo*> RegisterClassClasses;
488 /// Map of AsmOperandClass records to their class information.
489 std::map<Record*, ClassInfo*> AsmOperandClasses;
492 /// getTokenClass - Lookup or create the class for the given token.
493 ClassInfo *getTokenClass(StringRef Token);
495 /// getOperandClass - Lookup or create the class for the given operand.
496 ClassInfo *getOperandClass(StringRef Token,
497 const CGIOperandList::OperandInfo &OI);
499 /// BuildRegisterClasses - Build the ClassInfo* instances for register
501 void BuildRegisterClasses(SmallPtrSet<Record*, 16> &SingletonRegisters);
503 /// BuildOperandClasses - Build the ClassInfo* instances for user defined
505 void BuildOperandClasses();
507 void BuildInstructionOperandReference(MatchableInfo *II,
508 MatchableInfo::AsmOperand &Op);
511 AsmMatcherInfo(Record *AsmParser, CodeGenTarget &Target);
513 /// BuildInfo - Construct the various tables used during matching.
516 /// getSubtargetFeature - Lookup or create the subtarget feature info for the
518 SubtargetFeatureInfo *getSubtargetFeature(Record *Def) const {
519 assert(Def->isSubClassOf("Predicate") && "Invalid predicate type!");
520 std::map<Record*, SubtargetFeatureInfo*>::const_iterator I =
521 SubtargetFeatures.find(Def);
522 return I == SubtargetFeatures.end() ? 0 : I->second;
528 void MatchableInfo::dump() {
529 errs() << InstrName << " -- " << "flattened:\"" << AsmString << "\"\n";
531 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
532 AsmOperand &Op = AsmOperands[i];
533 errs() << " op[" << i << "] = " << Op.Class->ClassName << " - ";
534 errs() << '\"' << Op.Token << "\"\n";
536 if (!Op.OperandInfo) {
537 errs() << "(singleton register)\n";
541 const CGIOperandList::OperandInfo &OI = *Op.OperandInfo;
542 errs() << OI.Name << " " << OI.Rec->getName()
543 << " (" << OI.MIOperandNo << ", " << OI.MINumOperands << ")\n";
548 void MatchableInfo::Initialize(const AsmMatcherInfo &Info,
549 SmallPtrSet<Record*, 16> &SingletonRegisters) {
550 // TODO: Eventually support asmparser for Variant != 0.
551 AsmString = CodeGenInstruction::FlattenAsmStringVariants(AsmString, 0);
553 TokenizeAsmString(Info);
555 // Compute the require features.
556 std::vector<Record*> Predicates =TheDef->getValueAsListOfDefs("Predicates");
557 for (unsigned i = 0, e = Predicates.size(); i != e; ++i)
558 if (SubtargetFeatureInfo *Feature =
559 Info.getSubtargetFeature(Predicates[i]))
560 RequiredFeatures.push_back(Feature);
562 // Collect singleton registers, if used.
563 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
564 if (Record *Reg = getSingletonRegisterForAsmOperand(i, Info))
565 SingletonRegisters.insert(Reg);
569 /// TokenizeAsmString - Tokenize a simplified assembly string.
570 void MatchableInfo::TokenizeAsmString(const AsmMatcherInfo &Info) {
571 StringRef String = AsmString;
574 for (unsigned i = 0, e = String.size(); i != e; ++i) {
584 AsmOperands.push_back(AsmOperand(String.slice(Prev, i)));
587 if (!isspace(String[i]) && String[i] != ',')
588 AsmOperands.push_back(AsmOperand(String.substr(i, 1)));
594 AsmOperands.push_back(AsmOperand(String.slice(Prev, i)));
598 assert(i != String.size() && "Invalid quoted character");
599 AsmOperands.push_back(AsmOperand(String.substr(i, 1)));
604 // If this isn't "${", treat like a normal token.
605 if (i + 1 == String.size() || String[i + 1] != '{') {
607 AsmOperands.push_back(AsmOperand(String.slice(Prev, i)));
615 AsmOperands.push_back(AsmOperand(String.slice(Prev, i)));
619 StringRef::iterator End = std::find(String.begin() + i, String.end(),'}');
620 assert(End != String.end() && "Missing brace in operand reference!");
621 size_t EndPos = End - String.begin();
622 AsmOperands.push_back(AsmOperand(String.slice(i, EndPos+1)));
630 AsmOperands.push_back(AsmOperand(String.slice(Prev, i)));
639 if (InTok && Prev != String.size())
640 AsmOperands.push_back(AsmOperand(String.substr(Prev)));
642 // The first token of the instruction is the mnemonic, which must be a
643 // simple string, not a $foo variable or a singleton register.
644 assert(!AsmOperands.empty() && "Instruction has no tokens?");
645 Mnemonic = AsmOperands[0].Token;
646 if (Mnemonic[0] == '$' || getSingletonRegisterForAsmOperand(0, Info))
647 throw TGError(TheDef->getLoc(),
648 "Invalid instruction mnemonic '" + Mnemonic.str() + "'!");
650 // Remove the first operand, it is tracked in the mnemonic field.
651 AsmOperands.erase(AsmOperands.begin());
656 bool MatchableInfo::Validate(StringRef CommentDelimiter, bool Hack) const {
657 // Reject matchables with no .s string.
658 if (AsmString.empty())
659 throw TGError(TheDef->getLoc(), "instruction with empty asm string");
661 // Reject any matchables with a newline in them, they should be marked
662 // isCodeGenOnly if they are pseudo instructions.
663 if (AsmString.find('\n') != std::string::npos)
664 throw TGError(TheDef->getLoc(),
665 "multiline instruction is not valid for the asmparser, "
666 "mark it isCodeGenOnly");
668 // Remove comments from the asm string. We know that the asmstring only
670 if (!CommentDelimiter.empty() &&
671 StringRef(AsmString).find(CommentDelimiter) != StringRef::npos)
672 throw TGError(TheDef->getLoc(),
673 "asmstring for instruction has comment character in it, "
674 "mark it isCodeGenOnly");
676 // Reject matchables with operand modifiers, these aren't something we can
677 /// handle, the target should be refactored to use operands instead of
680 // Also, check for instructions which reference the operand multiple times;
681 // this implies a constraint we would not honor.
682 std::set<std::string> OperandNames;
683 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
684 StringRef Tok = AsmOperands[i].Token;
685 if (Tok[0] == '$' && Tok.find(':') != StringRef::npos)
686 throw TGError(TheDef->getLoc(),
687 "matchable with operand modifier '" + Tok.str() +
688 "' not supported by asm matcher. Mark isCodeGenOnly!");
690 // Verify that any operand is only mentioned once.
691 // We reject aliases and ignore instructions for now.
692 if (Tok[0] == '$' && !OperandNames.insert(Tok).second) {
694 throw TGError(TheDef->getLoc(),
695 "ERROR: matchable with tied operand '" + Tok.str() +
696 "' can never be matched!");
697 // FIXME: Should reject these. The ARM backend hits this with $lane in a
698 // bunch of instructions. It is unclear what the right answer is.
700 errs() << "warning: '" << InstrName << "': "
701 << "ignoring instruction with tied operand '"
702 << Tok.str() << "'\n";
712 /// getSingletonRegisterForAsmOperand - If the specified token is a singleton
713 /// register, return the register name, otherwise return a null StringRef.
714 Record *MatchableInfo::
715 getSingletonRegisterForAsmOperand(unsigned i, const AsmMatcherInfo &Info) const{
716 StringRef Tok = AsmOperands[i].Token;
717 if (!Tok.startswith(Info.RegisterPrefix))
720 StringRef RegName = Tok.substr(Info.RegisterPrefix.size());
721 if (const CodeGenRegister *Reg = Info.Target.getRegisterByName(RegName))
724 // If there is no register prefix (i.e. "%" in "%eax"), then this may
725 // be some random non-register token, just ignore it.
726 if (Info.RegisterPrefix.empty())
729 // Otherwise, we have something invalid prefixed with the register prefix,
731 std::string Err = "unable to find register for '" + RegName.str() +
732 "' (which matches register prefix)";
733 throw TGError(TheDef->getLoc(), Err);
737 static std::string getEnumNameForToken(StringRef Str) {
740 for (StringRef::iterator it = Str.begin(), ie = Str.end(); it != ie; ++it) {
742 case '*': Res += "_STAR_"; break;
743 case '%': Res += "_PCT_"; break;
744 case ':': Res += "_COLON_"; break;
749 Res += "_" + utostr((unsigned) *it) + "_";
756 ClassInfo *AsmMatcherInfo::getTokenClass(StringRef Token) {
757 ClassInfo *&Entry = TokenClasses[Token];
760 Entry = new ClassInfo();
761 Entry->Kind = ClassInfo::Token;
762 Entry->ClassName = "Token";
763 Entry->Name = "MCK_" + getEnumNameForToken(Token);
764 Entry->ValueName = Token;
765 Entry->PredicateMethod = "<invalid>";
766 Entry->RenderMethod = "<invalid>";
767 Classes.push_back(Entry);
774 AsmMatcherInfo::getOperandClass(StringRef Token,
775 const CGIOperandList::OperandInfo &OI) {
776 if (OI.Rec->isSubClassOf("RegisterClass")) {
777 if (ClassInfo *CI = RegisterClassClasses[OI.Rec])
779 throw TGError(OI.Rec->getLoc(), "register class has no class info!");
782 assert(OI.Rec->isSubClassOf("Operand") && "Unexpected operand!");
783 Record *MatchClass = OI.Rec->getValueAsDef("ParserMatchClass");
784 if (ClassInfo *CI = AsmOperandClasses[MatchClass])
787 throw TGError(OI.Rec->getLoc(), "operand has no match class!");
790 void AsmMatcherInfo::
791 BuildRegisterClasses(SmallPtrSet<Record*, 16> &SingletonRegisters) {
792 const std::vector<CodeGenRegister> &Registers = Target.getRegisters();
793 const std::vector<CodeGenRegisterClass> &RegClassList =
794 Target.getRegisterClasses();
796 // The register sets used for matching.
797 std::set< std::set<Record*> > RegisterSets;
799 // Gather the defined sets.
800 for (std::vector<CodeGenRegisterClass>::const_iterator it =
801 RegClassList.begin(), ie = RegClassList.end(); it != ie; ++it)
802 RegisterSets.insert(std::set<Record*>(it->Elements.begin(),
803 it->Elements.end()));
805 // Add any required singleton sets.
806 for (SmallPtrSet<Record*, 16>::iterator it = SingletonRegisters.begin(),
807 ie = SingletonRegisters.end(); it != ie; ++it) {
809 RegisterSets.insert(std::set<Record*>(&Rec, &Rec + 1));
812 // Introduce derived sets where necessary (when a register does not determine
813 // a unique register set class), and build the mapping of registers to the set
814 // they should classify to.
815 std::map<Record*, std::set<Record*> > RegisterMap;
816 for (std::vector<CodeGenRegister>::const_iterator it = Registers.begin(),
817 ie = Registers.end(); it != ie; ++it) {
818 const CodeGenRegister &CGR = *it;
819 // Compute the intersection of all sets containing this register.
820 std::set<Record*> ContainingSet;
822 for (std::set< std::set<Record*> >::iterator it = RegisterSets.begin(),
823 ie = RegisterSets.end(); it != ie; ++it) {
824 if (!it->count(CGR.TheDef))
827 if (ContainingSet.empty()) {
832 std::set<Record*> Tmp;
833 std::swap(Tmp, ContainingSet);
834 std::insert_iterator< std::set<Record*> > II(ContainingSet,
835 ContainingSet.begin());
836 std::set_intersection(Tmp.begin(), Tmp.end(), it->begin(), it->end(), II);
839 if (!ContainingSet.empty()) {
840 RegisterSets.insert(ContainingSet);
841 RegisterMap.insert(std::make_pair(CGR.TheDef, ContainingSet));
845 // Construct the register classes.
846 std::map<std::set<Record*>, ClassInfo*> RegisterSetClasses;
848 for (std::set< std::set<Record*> >::iterator it = RegisterSets.begin(),
849 ie = RegisterSets.end(); it != ie; ++it, ++Index) {
850 ClassInfo *CI = new ClassInfo();
851 CI->Kind = ClassInfo::RegisterClass0 + Index;
852 CI->ClassName = "Reg" + utostr(Index);
853 CI->Name = "MCK_Reg" + utostr(Index);
855 CI->PredicateMethod = ""; // unused
856 CI->RenderMethod = "addRegOperands";
858 Classes.push_back(CI);
859 RegisterSetClasses.insert(std::make_pair(*it, CI));
862 // Find the superclasses; we could compute only the subgroup lattice edges,
863 // but there isn't really a point.
864 for (std::set< std::set<Record*> >::iterator it = RegisterSets.begin(),
865 ie = RegisterSets.end(); it != ie; ++it) {
866 ClassInfo *CI = RegisterSetClasses[*it];
867 for (std::set< std::set<Record*> >::iterator it2 = RegisterSets.begin(),
868 ie2 = RegisterSets.end(); it2 != ie2; ++it2)
870 std::includes(it2->begin(), it2->end(), it->begin(), it->end()))
871 CI->SuperClasses.push_back(RegisterSetClasses[*it2]);
874 // Name the register classes which correspond to a user defined RegisterClass.
875 for (std::vector<CodeGenRegisterClass>::const_iterator
876 it = RegClassList.begin(), ie = RegClassList.end(); it != ie; ++it) {
877 ClassInfo *CI = RegisterSetClasses[std::set<Record*>(it->Elements.begin(),
878 it->Elements.end())];
879 if (CI->ValueName.empty()) {
880 CI->ClassName = it->getName();
881 CI->Name = "MCK_" + it->getName();
882 CI->ValueName = it->getName();
884 CI->ValueName = CI->ValueName + "," + it->getName();
886 RegisterClassClasses.insert(std::make_pair(it->TheDef, CI));
889 // Populate the map for individual registers.
890 for (std::map<Record*, std::set<Record*> >::iterator it = RegisterMap.begin(),
891 ie = RegisterMap.end(); it != ie; ++it)
892 RegisterClasses[it->first] = RegisterSetClasses[it->second];
894 // Name the register classes which correspond to singleton registers.
895 for (SmallPtrSet<Record*, 16>::iterator it = SingletonRegisters.begin(),
896 ie = SingletonRegisters.end(); it != ie; ++it) {
898 ClassInfo *CI = RegisterClasses[Rec];
899 assert(CI && "Missing singleton register class info!");
901 if (CI->ValueName.empty()) {
902 CI->ClassName = Rec->getName();
903 CI->Name = "MCK_" + Rec->getName();
904 CI->ValueName = Rec->getName();
906 CI->ValueName = CI->ValueName + "," + Rec->getName();
910 void AsmMatcherInfo::BuildOperandClasses() {
911 std::vector<Record*> AsmOperands =
912 Records.getAllDerivedDefinitions("AsmOperandClass");
914 // Pre-populate AsmOperandClasses map.
915 for (std::vector<Record*>::iterator it = AsmOperands.begin(),
916 ie = AsmOperands.end(); it != ie; ++it)
917 AsmOperandClasses[*it] = new ClassInfo();
920 for (std::vector<Record*>::iterator it = AsmOperands.begin(),
921 ie = AsmOperands.end(); it != ie; ++it, ++Index) {
922 ClassInfo *CI = AsmOperandClasses[*it];
923 CI->Kind = ClassInfo::UserClass0 + Index;
925 ListInit *Supers = (*it)->getValueAsListInit("SuperClasses");
926 for (unsigned i = 0, e = Supers->getSize(); i != e; ++i) {
927 DefInit *DI = dynamic_cast<DefInit*>(Supers->getElement(i));
929 PrintError((*it)->getLoc(), "Invalid super class reference!");
933 ClassInfo *SC = AsmOperandClasses[DI->getDef()];
935 PrintError((*it)->getLoc(), "Invalid super class reference!");
937 CI->SuperClasses.push_back(SC);
939 CI->ClassName = (*it)->getValueAsString("Name");
940 CI->Name = "MCK_" + CI->ClassName;
941 CI->ValueName = (*it)->getName();
943 // Get or construct the predicate method name.
944 Init *PMName = (*it)->getValueInit("PredicateMethod");
945 if (StringInit *SI = dynamic_cast<StringInit*>(PMName)) {
946 CI->PredicateMethod = SI->getValue();
948 assert(dynamic_cast<UnsetInit*>(PMName) &&
949 "Unexpected PredicateMethod field!");
950 CI->PredicateMethod = "is" + CI->ClassName;
953 // Get or construct the render method name.
954 Init *RMName = (*it)->getValueInit("RenderMethod");
955 if (StringInit *SI = dynamic_cast<StringInit*>(RMName)) {
956 CI->RenderMethod = SI->getValue();
958 assert(dynamic_cast<UnsetInit*>(RMName) &&
959 "Unexpected RenderMethod field!");
960 CI->RenderMethod = "add" + CI->ClassName + "Operands";
963 AsmOperandClasses[*it] = CI;
964 Classes.push_back(CI);
968 AsmMatcherInfo::AsmMatcherInfo(Record *asmParser, CodeGenTarget &target)
969 : AsmParser(asmParser), Target(target),
970 RegisterPrefix(AsmParser->getValueAsString("RegisterPrefix")) {
974 void AsmMatcherInfo::BuildInfo() {
975 // Build information about all of the AssemblerPredicates.
976 std::vector<Record*> AllPredicates =
977 Records.getAllDerivedDefinitions("Predicate");
978 for (unsigned i = 0, e = AllPredicates.size(); i != e; ++i) {
979 Record *Pred = AllPredicates[i];
980 // Ignore predicates that are not intended for the assembler.
981 if (!Pred->getValueAsBit("AssemblerMatcherPredicate"))
984 if (Pred->getName().empty())
985 throw TGError(Pred->getLoc(), "Predicate has no name!");
987 unsigned FeatureNo = SubtargetFeatures.size();
988 SubtargetFeatures[Pred] = new SubtargetFeatureInfo(Pred, FeatureNo);
989 assert(FeatureNo < 32 && "Too many subtarget features!");
992 StringRef CommentDelimiter = AsmParser->getValueAsString("CommentDelimiter");
994 // Parse the instructions; we need to do this first so that we can gather the
995 // singleton register classes.
996 SmallPtrSet<Record*, 16> SingletonRegisters;
997 for (CodeGenTarget::inst_iterator I = Target.inst_begin(),
998 E = Target.inst_end(); I != E; ++I) {
999 const CodeGenInstruction &CGI = **I;
1001 // If the tblgen -match-prefix option is specified (for tblgen hackers),
1002 // filter the set of instructions we consider.
1003 if (!StringRef(CGI.TheDef->getName()).startswith(MatchPrefix))
1006 // Ignore "codegen only" instructions.
1007 if (CGI.TheDef->getValueAsBit("isCodeGenOnly"))
1010 // Validate the operand list to ensure we can handle this instruction.
1011 for (unsigned i = 0, e = CGI.Operands.size(); i != e; ++i) {
1012 const CGIOperandList::OperandInfo &OI = CGI.Operands[i];
1014 // Validate tied operands.
1015 if (OI.getTiedRegister() != -1) {
1016 // If we have a tied operand that consists of multiple MCOperands, reject
1017 // it. We reject aliases and ignore instructions for now.
1018 if (OI.MINumOperands != 1) {
1019 // FIXME: Should reject these. The ARM backend hits this with $lane
1020 // in a bunch of instructions. It is unclear what the right answer is.
1022 errs() << "warning: '" << CGI.TheDef->getName() << "': "
1023 << "ignoring instruction with multi-operand tied operand '"
1024 << OI.Name << "'\n";
1031 OwningPtr<MatchableInfo> II(new MatchableInfo(CGI));
1033 II->Initialize(*this, SingletonRegisters);
1035 // Ignore instructions which shouldn't be matched and diagnose invalid
1036 // instruction definitions with an error.
1037 if (!II->Validate(CommentDelimiter, true))
1040 // Ignore "Int_*" and "*_Int" instructions, which are internal aliases.
1042 // FIXME: This is a total hack.
1043 if (StringRef(II->InstrName).startswith("Int_") ||
1044 StringRef(II->InstrName).endswith("_Int"))
1047 Matchables.push_back(II.take());
1050 // Parse all of the InstAlias definitions and stick them in the list of
1052 std::vector<Record*> AllInstAliases =
1053 Records.getAllDerivedDefinitions("InstAlias");
1054 for (unsigned i = 0, e = AllInstAliases.size(); i != e; ++i) {
1055 CodeGenInstAlias *Alias = new CodeGenInstAlias(AllInstAliases[i]);
1057 OwningPtr<MatchableInfo> II(new MatchableInfo(Alias));
1059 II->Initialize(*this, SingletonRegisters);
1061 // Validate the alias definitions.
1062 II->Validate(CommentDelimiter, false);
1064 Matchables.push_back(II.take());
1067 // Build info for the register classes.
1068 BuildRegisterClasses(SingletonRegisters);
1070 // Build info for the user defined assembly operand classes.
1071 BuildOperandClasses();
1073 // Build the information about matchables, now that we have fully formed
1075 for (std::vector<MatchableInfo*>::iterator it = Matchables.begin(),
1076 ie = Matchables.end(); it != ie; ++it) {
1077 MatchableInfo *II = *it;
1079 // Parse the tokens after the mnemonic.
1080 for (unsigned i = 0, e = II->AsmOperands.size(); i != e; ++i) {
1081 MatchableInfo::AsmOperand &Op = II->AsmOperands[i];
1082 StringRef Token = Op.Token;
1084 // Check for singleton registers.
1085 if (Record *RegRecord = II->getSingletonRegisterForAsmOperand(i, *this)) {
1086 Op.Class = RegisterClasses[RegRecord];
1087 assert(Op.Class && Op.Class->Registers.size() == 1 &&
1088 "Unexpected class for singleton register");
1092 // Check for simple tokens.
1093 if (Token[0] != '$') {
1094 Op.Class = getTokenClass(Token);
1098 // Otherwise this is an operand reference.
1099 BuildInstructionOperandReference(II, Op);
1102 II->BuildResultOperands();
1105 // Reorder classes so that classes preceed super classes.
1106 std::sort(Classes.begin(), Classes.end(), less_ptr<ClassInfo>());
1109 /// BuildInstructionOperandReference - The specified operand is a reference to a
1110 /// named operand such as $src. Resolve the Class and OperandInfo pointers.
1111 void AsmMatcherInfo::
1112 BuildInstructionOperandReference(MatchableInfo *II,
1113 MatchableInfo::AsmOperand &Op) {
1114 StringRef Token = Op.Token;
1115 assert(Token[0] == '$' && "Not an operand name ref");
1117 StringRef OperandName;
1118 if (Token[1] == '{')
1119 OperandName = Token.substr(2, Token.size() - 3);
1121 OperandName = Token.substr(1);
1123 const CGIOperandList &Operands = II->TheOperandList;
1126 // Map this token to an operand. FIXME: Move elsewhere.
1128 if (!Operands.hasOperandNamed(OperandName, Idx))
1129 throw TGError(II->TheDef->getLoc(), "error: unable to find operand: '" +
1130 OperandName.str() + "'");
1132 // FIXME: This is annoying, the named operand may be tied (e.g.,
1133 // XCHG8rm). What we want is the untied operand, which we now have to
1134 // grovel for. Only worry about this for single entry operands, we have to
1135 // clean this up anyway.
1136 const CGIOperandList::OperandInfo *OI = &Operands[Idx];
1137 int OITied = OI->getTiedRegister();
1139 // The tied operand index is an MIOperand index, find the operand that
1141 for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
1142 if (Operands[i].MIOperandNo == unsigned(OITied)) {
1149 assert(OI && "Unable to find tied operand target!");
1152 Op.Class = getOperandClass(Token, *OI);
1156 void MatchableInfo::BuildResultOperands() {
1157 /// OperandMap - This is a mapping from the MCInst operands (specified by the
1158 /// II.OperandList operands) to the AsmOperands that they are filled in from.
1159 SmallVector<int, 16> OperandMap(TheOperandList.size(), -1);
1161 // Order the (class) operands by the order to convert them into an MCInst.
1162 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
1163 MatchableInfo::AsmOperand &Op = AsmOperands[i];
1164 if (Op.SrcOpNum != -1)
1165 OperandMap[Op.SrcOpNum] = i;
1168 for (unsigned i = 0, e = TheOperandList.size(); i != e; ++i) {
1169 const CGIOperandList::OperandInfo &OpInfo = TheOperandList[i];
1171 // Find out what operand from the asmparser that this MCInst operand comes
1173 int SrcOperand = OperandMap[i];
1174 if (SrcOperand != -1) {
1175 ResOperands.push_back(ResOperand::getRenderedOp(SrcOperand, &OpInfo));
1179 // Otherwise, this must be a tied operand.
1180 int TiedOp = OpInfo.getTiedRegister();
1182 throw TGError(TheDef->getLoc(), "Instruction '" +
1183 TheDef->getName() + "' has operand '" + OpInfo.Name +
1184 "' that doesn't appear in asm string!");
1186 ResOperands.push_back(ResOperand::getTiedOp(TiedOp, &OpInfo));
1191 static void EmitConvertToMCInst(CodeGenTarget &Target,
1192 std::vector<MatchableInfo*> &Infos,
1194 // Write the convert function to a separate stream, so we can drop it after
1196 std::string ConvertFnBody;
1197 raw_string_ostream CvtOS(ConvertFnBody);
1199 // Function we have already generated.
1200 std::set<std::string> GeneratedFns;
1202 // Start the unified conversion function.
1203 CvtOS << "static void ConvertToMCInst(ConversionKind Kind, MCInst &Inst, "
1204 << "unsigned Opcode,\n"
1205 << " const SmallVectorImpl<MCParsedAsmOperand*"
1206 << "> &Operands) {\n";
1207 CvtOS << " Inst.setOpcode(Opcode);\n";
1208 CvtOS << " switch (Kind) {\n";
1209 CvtOS << " default:\n";
1211 // Start the enum, which we will generate inline.
1213 OS << "// Unified function for converting operands to MCInst instances.\n\n";
1214 OS << "enum ConversionKind {\n";
1216 // TargetOperandClass - This is the target's operand class, like X86Operand.
1217 std::string TargetOperandClass = Target.getName() + "Operand";
1219 for (std::vector<MatchableInfo*>::const_iterator it = Infos.begin(),
1220 ie = Infos.end(); it != ie; ++it) {
1221 MatchableInfo &II = **it;
1223 // Build the conversion function signature.
1224 std::string Signature = "Convert";
1225 std::string CaseBody;
1226 raw_string_ostream CaseOS(CaseBody);
1228 // Compute the convert enum and the case body.
1229 for (unsigned i = 0, e = II.ResOperands.size(); i != e; ++i) {
1230 const MatchableInfo::ResOperand &OpInfo = II.ResOperands[i];
1232 // Generate code to populate each result operand.
1233 switch (OpInfo.Kind) {
1234 default: assert(0 && "Unknown result operand kind");
1235 case MatchableInfo::ResOperand::RenderAsmOperand: {
1236 // This comes from something we parsed.
1237 MatchableInfo::AsmOperand &Op = II.AsmOperands[OpInfo.AsmOperandNum];
1239 // Registers are always converted the same, don't duplicate the
1240 // conversion function based on them.
1242 if (Op.Class->isRegisterClass())
1245 Signature += Op.Class->ClassName;
1246 Signature += utostr(OpInfo.OpInfo->MINumOperands);
1247 Signature += "_" + itostr(OpInfo.AsmOperandNum);
1249 CaseOS << " ((" << TargetOperandClass << "*)Operands["
1250 << (OpInfo.AsmOperandNum+1) << "])->" << Op.Class->RenderMethod
1251 << "(Inst, " << OpInfo.OpInfo->MINumOperands << ");\n";
1255 case MatchableInfo::ResOperand::TiedOperand: {
1256 // If this operand is tied to a previous one, just copy the MCInst
1257 // operand from the earlier one.We can only tie single MCOperand values.
1258 //assert(OpInfo.OpInfo->MINumOperands == 1 && "Not a singular MCOperand");
1259 unsigned TiedOp = OpInfo.TiedOperandNum;
1260 assert(i > TiedOp && "Tied operand preceeds its target!");
1261 CaseOS << " Inst.addOperand(Inst.getOperand(" << TiedOp << "));\n";
1262 Signature += "__Tie" + utostr(TiedOp);
1268 II.ConversionFnKind = Signature;
1270 // Check if we have already generated this signature.
1271 if (!GeneratedFns.insert(Signature).second)
1274 // If not, emit it now. Add to the enum list.
1275 OS << " " << Signature << ",\n";
1277 CvtOS << " case " << Signature << ":\n";
1278 CvtOS << CaseOS.str();
1279 CvtOS << " return;\n";
1282 // Finish the convert function.
1287 // Finish the enum, and drop the convert function after it.
1289 OS << " NumConversionVariants\n";
1295 /// EmitMatchClassEnumeration - Emit the enumeration for match class kinds.
1296 static void EmitMatchClassEnumeration(CodeGenTarget &Target,
1297 std::vector<ClassInfo*> &Infos,
1299 OS << "namespace {\n\n";
1301 OS << "/// MatchClassKind - The kinds of classes which participate in\n"
1302 << "/// instruction matching.\n";
1303 OS << "enum MatchClassKind {\n";
1304 OS << " InvalidMatchClass = 0,\n";
1305 for (std::vector<ClassInfo*>::iterator it = Infos.begin(),
1306 ie = Infos.end(); it != ie; ++it) {
1307 ClassInfo &CI = **it;
1308 OS << " " << CI.Name << ", // ";
1309 if (CI.Kind == ClassInfo::Token) {
1310 OS << "'" << CI.ValueName << "'\n";
1311 } else if (CI.isRegisterClass()) {
1312 if (!CI.ValueName.empty())
1313 OS << "register class '" << CI.ValueName << "'\n";
1315 OS << "derived register class\n";
1317 OS << "user defined class '" << CI.ValueName << "'\n";
1320 OS << " NumMatchClassKinds\n";
1326 /// EmitClassifyOperand - Emit the function to classify an operand.
1327 static void EmitClassifyOperand(AsmMatcherInfo &Info,
1329 OS << "static MatchClassKind ClassifyOperand(MCParsedAsmOperand *GOp) {\n"
1330 << " " << Info.Target.getName() << "Operand &Operand = *("
1331 << Info.Target.getName() << "Operand*)GOp;\n";
1334 OS << " if (Operand.isToken())\n";
1335 OS << " return MatchTokenString(Operand.getToken());\n\n";
1337 // Classify registers.
1339 // FIXME: Don't hardcode isReg, getReg.
1340 OS << " if (Operand.isReg()) {\n";
1341 OS << " switch (Operand.getReg()) {\n";
1342 OS << " default: return InvalidMatchClass;\n";
1343 for (std::map<Record*, ClassInfo*>::iterator
1344 it = Info.RegisterClasses.begin(), ie = Info.RegisterClasses.end();
1346 OS << " case " << Info.Target.getName() << "::"
1347 << it->first->getName() << ": return " << it->second->Name << ";\n";
1351 // Classify user defined operands.
1352 for (std::vector<ClassInfo*>::iterator it = Info.Classes.begin(),
1353 ie = Info.Classes.end(); it != ie; ++it) {
1354 ClassInfo &CI = **it;
1356 if (!CI.isUserClass())
1359 OS << " // '" << CI.ClassName << "' class";
1360 if (!CI.SuperClasses.empty()) {
1361 OS << ", subclass of ";
1362 for (unsigned i = 0, e = CI.SuperClasses.size(); i != e; ++i) {
1364 OS << "'" << CI.SuperClasses[i]->ClassName << "'";
1365 assert(CI < *CI.SuperClasses[i] && "Invalid class relation!");
1370 OS << " if (Operand." << CI.PredicateMethod << "()) {\n";
1372 // Validate subclass relationships.
1373 if (!CI.SuperClasses.empty()) {
1374 for (unsigned i = 0, e = CI.SuperClasses.size(); i != e; ++i)
1375 OS << " assert(Operand." << CI.SuperClasses[i]->PredicateMethod
1376 << "() && \"Invalid class relationship!\");\n";
1379 OS << " return " << CI.Name << ";\n";
1382 OS << " return InvalidMatchClass;\n";
1386 /// EmitIsSubclass - Emit the subclass predicate function.
1387 static void EmitIsSubclass(CodeGenTarget &Target,
1388 std::vector<ClassInfo*> &Infos,
1390 OS << "/// IsSubclass - Compute whether \\arg A is a subclass of \\arg B.\n";
1391 OS << "static bool IsSubclass(MatchClassKind A, MatchClassKind B) {\n";
1392 OS << " if (A == B)\n";
1393 OS << " return true;\n\n";
1395 OS << " switch (A) {\n";
1396 OS << " default:\n";
1397 OS << " return false;\n";
1398 for (std::vector<ClassInfo*>::iterator it = Infos.begin(),
1399 ie = Infos.end(); it != ie; ++it) {
1400 ClassInfo &A = **it;
1402 if (A.Kind != ClassInfo::Token) {
1403 std::vector<StringRef> SuperClasses;
1404 for (std::vector<ClassInfo*>::iterator it = Infos.begin(),
1405 ie = Infos.end(); it != ie; ++it) {
1406 ClassInfo &B = **it;
1408 if (&A != &B && A.isSubsetOf(B))
1409 SuperClasses.push_back(B.Name);
1412 if (SuperClasses.empty())
1415 OS << "\n case " << A.Name << ":\n";
1417 if (SuperClasses.size() == 1) {
1418 OS << " return B == " << SuperClasses.back() << ";\n";
1422 OS << " switch (B) {\n";
1423 OS << " default: return false;\n";
1424 for (unsigned i = 0, e = SuperClasses.size(); i != e; ++i)
1425 OS << " case " << SuperClasses[i] << ": return true;\n";
1435 /// EmitMatchTokenString - Emit the function to match a token string to the
1436 /// appropriate match class value.
1437 static void EmitMatchTokenString(CodeGenTarget &Target,
1438 std::vector<ClassInfo*> &Infos,
1440 // Construct the match list.
1441 std::vector<StringMatcher::StringPair> Matches;
1442 for (std::vector<ClassInfo*>::iterator it = Infos.begin(),
1443 ie = Infos.end(); it != ie; ++it) {
1444 ClassInfo &CI = **it;
1446 if (CI.Kind == ClassInfo::Token)
1447 Matches.push_back(StringMatcher::StringPair(CI.ValueName,
1448 "return " + CI.Name + ";"));
1451 OS << "static MatchClassKind MatchTokenString(StringRef Name) {\n";
1453 StringMatcher("Name", Matches, OS).Emit();
1455 OS << " return InvalidMatchClass;\n";
1459 /// EmitMatchRegisterName - Emit the function to match a string to the target
1460 /// specific register enum.
1461 static void EmitMatchRegisterName(CodeGenTarget &Target, Record *AsmParser,
1463 // Construct the match list.
1464 std::vector<StringMatcher::StringPair> Matches;
1465 for (unsigned i = 0, e = Target.getRegisters().size(); i != e; ++i) {
1466 const CodeGenRegister &Reg = Target.getRegisters()[i];
1467 if (Reg.TheDef->getValueAsString("AsmName").empty())
1470 Matches.push_back(StringMatcher::StringPair(
1471 Reg.TheDef->getValueAsString("AsmName"),
1472 "return " + utostr(i + 1) + ";"));
1475 OS << "static unsigned MatchRegisterName(StringRef Name) {\n";
1477 StringMatcher("Name", Matches, OS).Emit();
1479 OS << " return 0;\n";
1483 /// EmitSubtargetFeatureFlagEnumeration - Emit the subtarget feature flag
1485 static void EmitSubtargetFeatureFlagEnumeration(AsmMatcherInfo &Info,
1487 OS << "// Flags for subtarget features that participate in "
1488 << "instruction matching.\n";
1489 OS << "enum SubtargetFeatureFlag {\n";
1490 for (std::map<Record*, SubtargetFeatureInfo*>::const_iterator
1491 it = Info.SubtargetFeatures.begin(),
1492 ie = Info.SubtargetFeatures.end(); it != ie; ++it) {
1493 SubtargetFeatureInfo &SFI = *it->second;
1494 OS << " " << SFI.getEnumName() << " = (1 << " << SFI.Index << "),\n";
1496 OS << " Feature_None = 0\n";
1500 /// EmitComputeAvailableFeatures - Emit the function to compute the list of
1501 /// available features given a subtarget.
1502 static void EmitComputeAvailableFeatures(AsmMatcherInfo &Info,
1504 std::string ClassName =
1505 Info.AsmParser->getValueAsString("AsmParserClassName");
1507 OS << "unsigned " << Info.Target.getName() << ClassName << "::\n"
1508 << "ComputeAvailableFeatures(const " << Info.Target.getName()
1509 << "Subtarget *Subtarget) const {\n";
1510 OS << " unsigned Features = 0;\n";
1511 for (std::map<Record*, SubtargetFeatureInfo*>::const_iterator
1512 it = Info.SubtargetFeatures.begin(),
1513 ie = Info.SubtargetFeatures.end(); it != ie; ++it) {
1514 SubtargetFeatureInfo &SFI = *it->second;
1515 OS << " if (" << SFI.TheDef->getValueAsString("CondString")
1517 OS << " Features |= " << SFI.getEnumName() << ";\n";
1519 OS << " return Features;\n";
1523 static std::string GetAliasRequiredFeatures(Record *R,
1524 const AsmMatcherInfo &Info) {
1525 std::vector<Record*> ReqFeatures = R->getValueAsListOfDefs("Predicates");
1527 unsigned NumFeatures = 0;
1528 for (unsigned i = 0, e = ReqFeatures.size(); i != e; ++i) {
1529 SubtargetFeatureInfo *F = Info.getSubtargetFeature(ReqFeatures[i]);
1532 throw TGError(R->getLoc(), "Predicate '" + ReqFeatures[i]->getName() +
1533 "' is not marked as an AssemblerPredicate!");
1538 Result += F->getEnumName();
1542 if (NumFeatures > 1)
1543 Result = '(' + Result + ')';
1547 /// EmitMnemonicAliases - If the target has any MnemonicAlias<> definitions,
1548 /// emit a function for them and return true, otherwise return false.
1549 static bool EmitMnemonicAliases(raw_ostream &OS, const AsmMatcherInfo &Info) {
1550 std::vector<Record*> Aliases =
1551 Records.getAllDerivedDefinitions("MnemonicAlias");
1552 if (Aliases.empty()) return false;
1554 OS << "static void ApplyMnemonicAliases(StringRef &Mnemonic, "
1555 "unsigned Features) {\n";
1557 // Keep track of all the aliases from a mnemonic. Use an std::map so that the
1558 // iteration order of the map is stable.
1559 std::map<std::string, std::vector<Record*> > AliasesFromMnemonic;
1561 for (unsigned i = 0, e = Aliases.size(); i != e; ++i) {
1562 Record *R = Aliases[i];
1563 AliasesFromMnemonic[R->getValueAsString("FromMnemonic")].push_back(R);
1566 // Process each alias a "from" mnemonic at a time, building the code executed
1567 // by the string remapper.
1568 std::vector<StringMatcher::StringPair> Cases;
1569 for (std::map<std::string, std::vector<Record*> >::iterator
1570 I = AliasesFromMnemonic.begin(), E = AliasesFromMnemonic.end();
1572 const std::vector<Record*> &ToVec = I->second;
1574 // Loop through each alias and emit code that handles each case. If there
1575 // are two instructions without predicates, emit an error. If there is one,
1577 std::string MatchCode;
1578 int AliasWithNoPredicate = -1;
1580 for (unsigned i = 0, e = ToVec.size(); i != e; ++i) {
1581 Record *R = ToVec[i];
1582 std::string FeatureMask = GetAliasRequiredFeatures(R, Info);
1584 // If this unconditionally matches, remember it for later and diagnose
1586 if (FeatureMask.empty()) {
1587 if (AliasWithNoPredicate != -1) {
1588 // We can't have two aliases from the same mnemonic with no predicate.
1589 PrintError(ToVec[AliasWithNoPredicate]->getLoc(),
1590 "two MnemonicAliases with the same 'from' mnemonic!");
1591 throw TGError(R->getLoc(), "this is the other MnemonicAlias.");
1594 AliasWithNoPredicate = i;
1598 if (!MatchCode.empty())
1599 MatchCode += "else ";
1600 MatchCode += "if ((Features & " + FeatureMask + ") == "+FeatureMask+")\n";
1601 MatchCode += " Mnemonic = \"" +R->getValueAsString("ToMnemonic")+"\";\n";
1604 if (AliasWithNoPredicate != -1) {
1605 Record *R = ToVec[AliasWithNoPredicate];
1606 if (!MatchCode.empty())
1607 MatchCode += "else\n ";
1608 MatchCode += "Mnemonic = \"" + R->getValueAsString("ToMnemonic")+"\";\n";
1611 MatchCode += "return;";
1613 Cases.push_back(std::make_pair(I->first, MatchCode));
1617 StringMatcher("Mnemonic", Cases, OS).Emit();
1623 void AsmMatcherEmitter::run(raw_ostream &OS) {
1624 CodeGenTarget Target;
1625 Record *AsmParser = Target.getAsmParser();
1626 std::string ClassName = AsmParser->getValueAsString("AsmParserClassName");
1628 // Compute the information on the instructions to match.
1629 AsmMatcherInfo Info(AsmParser, Target);
1632 // Sort the instruction table using the partial order on classes. We use
1633 // stable_sort to ensure that ambiguous instructions are still
1634 // deterministically ordered.
1635 std::stable_sort(Info.Matchables.begin(), Info.Matchables.end(),
1636 less_ptr<MatchableInfo>());
1638 DEBUG_WITH_TYPE("instruction_info", {
1639 for (std::vector<MatchableInfo*>::iterator
1640 it = Info.Matchables.begin(), ie = Info.Matchables.end();
1645 // Check for ambiguous matchables.
1646 DEBUG_WITH_TYPE("ambiguous_instrs", {
1647 unsigned NumAmbiguous = 0;
1648 for (unsigned i = 0, e = Info.Matchables.size(); i != e; ++i) {
1649 for (unsigned j = i + 1; j != e; ++j) {
1650 MatchableInfo &A = *Info.Matchables[i];
1651 MatchableInfo &B = *Info.Matchables[j];
1653 if (A.CouldMatchAmiguouslyWith(B)) {
1654 errs() << "warning: ambiguous matchables:\n";
1656 errs() << "\nis incomparable with:\n";
1664 errs() << "warning: " << NumAmbiguous
1665 << " ambiguous matchables!\n";
1668 // Write the output.
1670 EmitSourceFileHeader("Assembly Matcher Source Fragment", OS);
1672 // Information for the class declaration.
1673 OS << "\n#ifdef GET_ASSEMBLER_HEADER\n";
1674 OS << "#undef GET_ASSEMBLER_HEADER\n";
1675 OS << " // This should be included into the middle of the declaration of \n";
1676 OS << " // your subclasses implementation of TargetAsmParser.\n";
1677 OS << " unsigned ComputeAvailableFeatures(const " <<
1678 Target.getName() << "Subtarget *Subtarget) const;\n";
1679 OS << " enum MatchResultTy {\n";
1680 OS << " Match_Success, Match_MnemonicFail, Match_InvalidOperand,\n";
1681 OS << " Match_MissingFeature\n";
1683 OS << " MatchResultTy MatchInstructionImpl(const "
1684 << "SmallVectorImpl<MCParsedAsmOperand*>"
1685 << " &Operands, MCInst &Inst, unsigned &ErrorInfo);\n\n";
1686 OS << "#endif // GET_ASSEMBLER_HEADER_INFO\n\n";
1691 OS << "\n#ifdef GET_REGISTER_MATCHER\n";
1692 OS << "#undef GET_REGISTER_MATCHER\n\n";
1694 // Emit the subtarget feature enumeration.
1695 EmitSubtargetFeatureFlagEnumeration(Info, OS);
1697 // Emit the function to match a register name to number.
1698 EmitMatchRegisterName(Target, AsmParser, OS);
1700 OS << "#endif // GET_REGISTER_MATCHER\n\n";
1703 OS << "\n#ifdef GET_MATCHER_IMPLEMENTATION\n";
1704 OS << "#undef GET_MATCHER_IMPLEMENTATION\n\n";
1706 // Generate the function that remaps for mnemonic aliases.
1707 bool HasMnemonicAliases = EmitMnemonicAliases(OS, Info);
1709 // Generate the unified function to convert operands into an MCInst.
1710 EmitConvertToMCInst(Target, Info.Matchables, OS);
1712 // Emit the enumeration for classes which participate in matching.
1713 EmitMatchClassEnumeration(Target, Info.Classes, OS);
1715 // Emit the routine to match token strings to their match class.
1716 EmitMatchTokenString(Target, Info.Classes, OS);
1718 // Emit the routine to classify an operand.
1719 EmitClassifyOperand(Info, OS);
1721 // Emit the subclass predicate routine.
1722 EmitIsSubclass(Target, Info.Classes, OS);
1724 // Emit the available features compute function.
1725 EmitComputeAvailableFeatures(Info, OS);
1728 size_t MaxNumOperands = 0;
1729 for (std::vector<MatchableInfo*>::const_iterator it =
1730 Info.Matchables.begin(), ie = Info.Matchables.end();
1732 MaxNumOperands = std::max(MaxNumOperands, (*it)->AsmOperands.size());
1735 // Emit the static match table; unused classes get initalized to 0 which is
1736 // guaranteed to be InvalidMatchClass.
1738 // FIXME: We can reduce the size of this table very easily. First, we change
1739 // it so that store the kinds in separate bit-fields for each index, which
1740 // only needs to be the max width used for classes at that index (we also need
1741 // to reject based on this during classification). If we then make sure to
1742 // order the match kinds appropriately (putting mnemonics last), then we
1743 // should only end up using a few bits for each class, especially the ones
1744 // following the mnemonic.
1745 OS << "namespace {\n";
1746 OS << " struct MatchEntry {\n";
1747 OS << " unsigned Opcode;\n";
1748 OS << " const char *Mnemonic;\n";
1749 OS << " ConversionKind ConvertFn;\n";
1750 OS << " MatchClassKind Classes[" << MaxNumOperands << "];\n";
1751 OS << " unsigned RequiredFeatures;\n";
1754 OS << "// Predicate for searching for an opcode.\n";
1755 OS << " struct LessOpcode {\n";
1756 OS << " bool operator()(const MatchEntry &LHS, StringRef RHS) {\n";
1757 OS << " return StringRef(LHS.Mnemonic) < RHS;\n";
1759 OS << " bool operator()(StringRef LHS, const MatchEntry &RHS) {\n";
1760 OS << " return LHS < StringRef(RHS.Mnemonic);\n";
1762 OS << " bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) {\n";
1763 OS << " return StringRef(LHS.Mnemonic) < StringRef(RHS.Mnemonic);\n";
1767 OS << "} // end anonymous namespace.\n\n";
1769 OS << "static const MatchEntry MatchTable["
1770 << Info.Matchables.size() << "] = {\n";
1772 for (std::vector<MatchableInfo*>::const_iterator it =
1773 Info.Matchables.begin(), ie = Info.Matchables.end();
1775 MatchableInfo &II = **it;
1777 OS << " { " << Target.getName() << "::" << II.InstrName
1778 << ", \"" << II.Mnemonic << "\""
1779 << ", " << II.ConversionFnKind << ", { ";
1780 for (unsigned i = 0, e = II.AsmOperands.size(); i != e; ++i) {
1781 MatchableInfo::AsmOperand &Op = II.AsmOperands[i];
1784 OS << Op.Class->Name;
1788 // Write the required features mask.
1789 if (!II.RequiredFeatures.empty()) {
1790 for (unsigned i = 0, e = II.RequiredFeatures.size(); i != e; ++i) {
1792 OS << II.RequiredFeatures[i]->getEnumName();
1802 // Finally, build the match function.
1803 OS << Target.getName() << ClassName << "::MatchResultTy "
1804 << Target.getName() << ClassName << "::\n"
1805 << "MatchInstructionImpl(const SmallVectorImpl<MCParsedAsmOperand*>"
1807 OS << " MCInst &Inst, unsigned &ErrorInfo) {\n";
1809 // Emit code to get the available features.
1810 OS << " // Get the current feature set.\n";
1811 OS << " unsigned AvailableFeatures = getAvailableFeatures();\n\n";
1813 OS << " // Get the instruction mnemonic, which is the first token.\n";
1814 OS << " StringRef Mnemonic = ((" << Target.getName()
1815 << "Operand*)Operands[0])->getToken();\n\n";
1817 if (HasMnemonicAliases) {
1818 OS << " // Process all MnemonicAliases to remap the mnemonic.\n";
1819 OS << " ApplyMnemonicAliases(Mnemonic, AvailableFeatures);\n\n";
1822 // Emit code to compute the class list for this operand vector.
1823 OS << " // Eliminate obvious mismatches.\n";
1824 OS << " if (Operands.size() > " << (MaxNumOperands+1) << ") {\n";
1825 OS << " ErrorInfo = " << (MaxNumOperands+1) << ";\n";
1826 OS << " return Match_InvalidOperand;\n";
1829 OS << " // Compute the class list for this operand vector.\n";
1830 OS << " MatchClassKind Classes[" << MaxNumOperands << "];\n";
1831 OS << " for (unsigned i = 1, e = Operands.size(); i != e; ++i) {\n";
1832 OS << " Classes[i-1] = ClassifyOperand(Operands[i]);\n\n";
1834 OS << " // Check for invalid operands before matching.\n";
1835 OS << " if (Classes[i-1] == InvalidMatchClass) {\n";
1836 OS << " ErrorInfo = i;\n";
1837 OS << " return Match_InvalidOperand;\n";
1841 OS << " // Mark unused classes.\n";
1842 OS << " for (unsigned i = Operands.size()-1, e = " << MaxNumOperands << "; "
1843 << "i != e; ++i)\n";
1844 OS << " Classes[i] = InvalidMatchClass;\n\n";
1846 OS << " // Some state to try to produce better error messages.\n";
1847 OS << " bool HadMatchOtherThanFeatures = false;\n\n";
1848 OS << " // Set ErrorInfo to the operand that mismatches if it is \n";
1849 OS << " // wrong for all instances of the instruction.\n";
1850 OS << " ErrorInfo = ~0U;\n";
1852 // Emit code to search the table.
1853 OS << " // Search the table.\n";
1854 OS << " std::pair<const MatchEntry*, const MatchEntry*> MnemonicRange =\n";
1855 OS << " std::equal_range(MatchTable, MatchTable+"
1856 << Info.Matchables.size() << ", Mnemonic, LessOpcode());\n\n";
1858 OS << " // Return a more specific error code if no mnemonics match.\n";
1859 OS << " if (MnemonicRange.first == MnemonicRange.second)\n";
1860 OS << " return Match_MnemonicFail;\n\n";
1862 OS << " for (const MatchEntry *it = MnemonicRange.first, "
1863 << "*ie = MnemonicRange.second;\n";
1864 OS << " it != ie; ++it) {\n";
1866 OS << " // equal_range guarantees that instruction mnemonic matches.\n";
1867 OS << " assert(Mnemonic == it->Mnemonic);\n";
1869 // Emit check that the subclasses match.
1870 OS << " bool OperandsValid = true;\n";
1871 OS << " for (unsigned i = 0; i != " << MaxNumOperands << "; ++i) {\n";
1872 OS << " if (IsSubclass(Classes[i], it->Classes[i]))\n";
1873 OS << " continue;\n";
1874 OS << " // If this operand is broken for all of the instances of this\n";
1875 OS << " // mnemonic, keep track of it so we can report loc info.\n";
1876 OS << " if (it == MnemonicRange.first || ErrorInfo == i+1)\n";
1877 OS << " ErrorInfo = i+1;\n";
1879 OS << " ErrorInfo = ~0U;";
1880 OS << " // Otherwise, just reject this instance of the mnemonic.\n";
1881 OS << " OperandsValid = false;\n";
1885 OS << " if (!OperandsValid) continue;\n";
1887 // Emit check that the required features are available.
1888 OS << " if ((AvailableFeatures & it->RequiredFeatures) "
1889 << "!= it->RequiredFeatures) {\n";
1890 OS << " HadMatchOtherThanFeatures = true;\n";
1891 OS << " continue;\n";
1895 OS << " ConvertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands);\n";
1897 // Call the post-processing function, if used.
1898 std::string InsnCleanupFn =
1899 AsmParser->getValueAsString("AsmParserInstCleanup");
1900 if (!InsnCleanupFn.empty())
1901 OS << " " << InsnCleanupFn << "(Inst);\n";
1903 OS << " return Match_Success;\n";
1906 OS << " // Okay, we had no match. Try to return a useful error code.\n";
1907 OS << " if (HadMatchOtherThanFeatures) return Match_MissingFeature;\n";
1908 OS << " return Match_InvalidOperand;\n";
1911 OS << "#endif // GET_MATCHER_IMPLEMENTATION\n\n";