1 //===- AsmMatcherEmitter.cpp - Generate an assembly matcher ---------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This tablegen backend emits a target specifier matcher for converting parsed
11 // assembly operands in the MCInst structures.
13 // The input to the target specific matcher is a list of literal tokens and
14 // operands. The target specific parser should generally eliminate any syntax
15 // which is not relevant for matching; for example, comma tokens should have
16 // already been consumed and eliminated by the parser. Most instructions will
17 // end up with a single literal token (the instruction name) and some number of
20 // Some example inputs, for X86:
21 // 'addl' (immediate ...) (register ...)
22 // 'add' (immediate ...) (memory ...)
25 // The assembly matcher is responsible for converting this input into a precise
26 // machine instruction (i.e., an instruction with a well defined encoding). This
27 // mapping has several properties which complicate matching:
29 // - It may be ambiguous; many architectures can legally encode particular
30 // variants of an instruction in different ways (for example, using a smaller
31 // encoding for small immediates). Such ambiguities should never be
32 // arbitrarily resolved by the assembler, the assembler is always responsible
33 // for choosing the "best" available instruction.
35 // - It may depend on the subtarget or the assembler context. Instructions
36 // which are invalid for the current mode, but otherwise unambiguous (e.g.,
37 // an SSE instruction in a file being assembled for i486) should be accepted
38 // and rejected by the assembler front end. However, if the proper encoding
39 // for an instruction is dependent on the assembler context then the matcher
40 // is responsible for selecting the correct machine instruction for the
43 // The core matching algorithm attempts to exploit the regularity in most
44 // instruction sets to quickly determine the set of possibly matching
45 // instructions, and the simplify the generated code. Additionally, this helps
46 // to ensure that the ambiguities are intentionally resolved by the user.
48 // The matching is divided into two distinct phases:
50 // 1. Classification: Each operand is mapped to the unique set which (a)
51 // contains it, and (b) is the largest such subset for which a single
52 // instruction could match all members.
54 // For register classes, we can generate these subgroups automatically. For
55 // arbitrary operands, we expect the user to define the classes and their
56 // relations to one another (for example, 8-bit signed immediates as a
57 // subset of 32-bit immediates).
59 // By partitioning the operands in this way, we guarantee that for any
60 // tuple of classes, any single instruction must match either all or none
61 // of the sets of operands which could classify to that tuple.
63 // In addition, the subset relation amongst classes induces a partial order
64 // on such tuples, which we use to resolve ambiguities.
66 // FIXME: What do we do if a crazy case shows up where this is the wrong
69 // 2. The input can now be treated as a tuple of classes (static tokens are
70 // simple singleton sets). Each such tuple should generally map to a single
71 // instruction (we currently ignore cases where this isn't true, whee!!!),
72 // which we can emit a simple matcher for.
74 //===----------------------------------------------------------------------===//
76 #include "AsmMatcherEmitter.h"
77 #include "CodeGenTarget.h"
79 #include "StringMatcher.h"
80 #include "llvm/ADT/OwningPtr.h"
81 #include "llvm/ADT/SmallVector.h"
82 #include "llvm/ADT/STLExtras.h"
83 #include "llvm/ADT/StringExtras.h"
84 #include "llvm/Support/CommandLine.h"
85 #include "llvm/Support/Debug.h"
91 static cl::opt<std::string>
92 MatchPrefix("match-prefix", cl::init(""),
93 cl::desc("Only match instructions with the given prefix"));
95 /// FlattenVariants - Flatten an .td file assembly string by selecting the
96 /// variant at index \arg N.
97 static std::string FlattenVariants(const std::string &AsmString,
99 StringRef Cur = AsmString;
100 std::string Res = "";
103 // Find the start of the next variant string.
104 size_t VariantsStart = 0;
105 for (size_t e = Cur.size(); VariantsStart != e; ++VariantsStart)
106 if (Cur[VariantsStart] == '{' &&
107 (VariantsStart == 0 || (Cur[VariantsStart-1] != '$' &&
108 Cur[VariantsStart-1] != '\\')))
111 // Add the prefix to the result.
112 Res += Cur.slice(0, VariantsStart);
113 if (VariantsStart == Cur.size())
116 ++VariantsStart; // Skip the '{'.
118 // Scan to the end of the variants string.
119 size_t VariantsEnd = VariantsStart;
120 unsigned NestedBraces = 1;
121 for (size_t e = Cur.size(); VariantsEnd != e; ++VariantsEnd) {
122 if (Cur[VariantsEnd] == '}' && Cur[VariantsEnd-1] != '\\') {
123 if (--NestedBraces == 0)
125 } else if (Cur[VariantsEnd] == '{')
129 // Select the Nth variant (or empty).
130 StringRef Selection = Cur.slice(VariantsStart, VariantsEnd);
131 for (unsigned i = 0; i != N; ++i)
132 Selection = Selection.split('|').second;
133 Res += Selection.split('|').first;
135 assert(VariantsEnd != Cur.size() &&
136 "Unterminated variants in assembly string!");
137 Cur = Cur.substr(VariantsEnd + 1);
143 /// TokenizeAsmString - Tokenize a simplified assembly string.
144 static void TokenizeAsmString(StringRef AsmString,
145 SmallVectorImpl<StringRef> &Tokens) {
148 for (unsigned i = 0, e = AsmString.size(); i != e; ++i) {
149 switch (AsmString[i]) {
158 Tokens.push_back(AsmString.slice(Prev, i));
161 if (!isspace(AsmString[i]) && AsmString[i] != ',')
162 Tokens.push_back(AsmString.substr(i, 1));
168 Tokens.push_back(AsmString.slice(Prev, i));
172 assert(i != AsmString.size() && "Invalid quoted character");
173 Tokens.push_back(AsmString.substr(i, 1));
178 // If this isn't "${", treat like a normal token.
179 if (i + 1 == AsmString.size() || AsmString[i + 1] != '{') {
181 Tokens.push_back(AsmString.slice(Prev, i));
189 Tokens.push_back(AsmString.slice(Prev, i));
193 StringRef::iterator End =
194 std::find(AsmString.begin() + i, AsmString.end(), '}');
195 assert(End != AsmString.end() && "Missing brace in operand reference!");
196 size_t EndPos = End - AsmString.begin();
197 Tokens.push_back(AsmString.slice(i, EndPos+1));
205 Tokens.push_back(AsmString.slice(Prev, i));
215 if (InTok && Prev != AsmString.size())
216 Tokens.push_back(AsmString.substr(Prev));
219 static bool IsAssemblerInstruction(StringRef Name,
220 const CodeGenInstruction &CGI,
221 const SmallVectorImpl<StringRef> &Tokens) {
222 // Ignore "codegen only" instructions.
223 if (CGI.TheDef->getValueAsBit("isCodeGenOnly"))
226 // Ignore pseudo ops.
228 // FIXME: This is a hack; can we convert these instructions to set the
229 // "codegen only" bit instead?
230 if (const RecordVal *Form = CGI.TheDef->getValue("Form"))
231 if (Form->getValue()->getAsString() == "Pseudo")
234 // Ignore "Int_*" and "*_Int" instructions, which are internal aliases.
236 // FIXME: This is a total hack.
237 if (StringRef(Name).startswith("Int_") || StringRef(Name).endswith("_Int"))
240 // Ignore instructions with no .s string.
242 // FIXME: What are these?
243 if (CGI.AsmString.empty())
246 // FIXME: Hack; ignore any instructions with a newline in them.
247 if (std::find(CGI.AsmString.begin(),
248 CGI.AsmString.end(), '\n') != CGI.AsmString.end())
251 // Ignore instructions with attributes, these are always fake instructions for
252 // simplifying codegen.
254 // FIXME: Is this true?
256 // Also, check for instructions which reference the operand multiple times;
257 // this implies a constraint we would not honor.
258 std::set<std::string> OperandNames;
259 for (unsigned i = 1, e = Tokens.size(); i < e; ++i) {
260 for (unsigned i = 1, e = Tokens.size(); i < e; ++i) {
261 if (Tokens[i][0] == '$' &&
262 Tokens[i].find(':') != StringRef::npos) {
263 PrintError(CGI.TheDef->getLoc(),
264 "instruction with operand modifier '" + Tokens[i].str() +
265 "' not supported by asm matcher. Mark isCodeGenOnly!");
266 throw std::string("ERROR: Invalid instruction");
269 if (Tokens[i][0] == '$' && !OperandNames.insert(Tokens[i]).second) {
271 errs() << "warning: '" << Name << "': "
272 << "ignoring instruction with tied operand '"
273 << Tokens[i].str() << "'\n";
285 struct SubtargetFeatureInfo;
287 /// ClassInfo - Helper class for storing the information about a particular
288 /// class of operands which can be matched.
291 /// Invalid kind, for use as a sentinel value.
294 /// The class for a particular token.
297 /// The (first) register class, subsequent register classes are
298 /// RegisterClass0+1, and so on.
301 /// The (first) user defined class, subsequent user defined classes are
302 /// UserClass0+1, and so on.
306 /// Kind - The class kind, which is either a predefined kind, or (UserClass0 +
307 /// N) for the Nth user defined class.
310 /// SuperClasses - The super classes of this class. Note that for simplicities
311 /// sake user operands only record their immediate super class, while register
312 /// operands include all superclasses.
313 std::vector<ClassInfo*> SuperClasses;
315 /// Name - The full class name, suitable for use in an enum.
318 /// ClassName - The unadorned generic name for this class (e.g., Token).
319 std::string ClassName;
321 /// ValueName - The name of the value this class represents; for a token this
322 /// is the literal token string, for an operand it is the TableGen class (or
323 /// empty if this is a derived class).
324 std::string ValueName;
326 /// PredicateMethod - The name of the operand method to test whether the
327 /// operand matches this class; this is not valid for Token or register kinds.
328 std::string PredicateMethod;
330 /// RenderMethod - The name of the operand method to add this operand to an
331 /// MCInst; this is not valid for Token or register kinds.
332 std::string RenderMethod;
334 /// For register classes, the records for all the registers in this class.
335 std::set<Record*> Registers;
338 /// isRegisterClass() - Check if this is a register class.
339 bool isRegisterClass() const {
340 return Kind >= RegisterClass0 && Kind < UserClass0;
343 /// isUserClass() - Check if this is a user defined class.
344 bool isUserClass() const {
345 return Kind >= UserClass0;
348 /// isRelatedTo - Check whether this class is "related" to \arg RHS. Classes
349 /// are related if they are in the same class hierarchy.
350 bool isRelatedTo(const ClassInfo &RHS) const {
351 // Tokens are only related to tokens.
352 if (Kind == Token || RHS.Kind == Token)
353 return Kind == Token && RHS.Kind == Token;
355 // Registers classes are only related to registers classes, and only if
356 // their intersection is non-empty.
357 if (isRegisterClass() || RHS.isRegisterClass()) {
358 if (!isRegisterClass() || !RHS.isRegisterClass())
361 std::set<Record*> Tmp;
362 std::insert_iterator< std::set<Record*> > II(Tmp, Tmp.begin());
363 std::set_intersection(Registers.begin(), Registers.end(),
364 RHS.Registers.begin(), RHS.Registers.end(),
370 // Otherwise we have two users operands; they are related if they are in the
371 // same class hierarchy.
373 // FIXME: This is an oversimplification, they should only be related if they
374 // intersect, however we don't have that information.
375 assert(isUserClass() && RHS.isUserClass() && "Unexpected class!");
376 const ClassInfo *Root = this;
377 while (!Root->SuperClasses.empty())
378 Root = Root->SuperClasses.front();
380 const ClassInfo *RHSRoot = &RHS;
381 while (!RHSRoot->SuperClasses.empty())
382 RHSRoot = RHSRoot->SuperClasses.front();
384 return Root == RHSRoot;
387 /// isSubsetOf - Test whether this class is a subset of \arg RHS;
388 bool isSubsetOf(const ClassInfo &RHS) const {
389 // This is a subset of RHS if it is the same class...
393 // ... or if any of its super classes are a subset of RHS.
394 for (std::vector<ClassInfo*>::const_iterator it = SuperClasses.begin(),
395 ie = SuperClasses.end(); it != ie; ++it)
396 if ((*it)->isSubsetOf(RHS))
402 /// operator< - Compare two classes.
403 bool operator<(const ClassInfo &RHS) const {
407 // Unrelated classes can be ordered by kind.
408 if (!isRelatedTo(RHS))
409 return Kind < RHS.Kind;
413 assert(0 && "Invalid kind!");
415 // Tokens are comparable by value.
417 // FIXME: Compare by enum value.
418 return ValueName < RHS.ValueName;
421 // This class preceeds the RHS if it is a proper subset of the RHS.
424 if (RHS.isSubsetOf(*this))
427 // Otherwise, order by name to ensure we have a total ordering.
428 return ValueName < RHS.ValueName;
433 /// InstructionInfo - Helper class for storing the necessary information for an
434 /// instruction which is capable of being matched.
435 struct InstructionInfo {
437 /// The unique class instance this operand should match.
440 /// The original operand this corresponds to, if any.
441 const CodeGenInstruction::OperandInfo *OperandInfo;
444 /// InstrName - The target name for this instruction.
445 std::string InstrName;
447 /// Instr - The instruction this matches.
448 const CodeGenInstruction *Instr;
450 /// AsmString - The assembly string for this instruction (with variants
452 std::string AsmString;
454 /// Tokens - The tokenized assembly pattern that this instruction matches.
455 SmallVector<StringRef, 4> Tokens;
457 /// Operands - The operands that this instruction matches.
458 SmallVector<Operand, 4> Operands;
460 /// Predicates - The required subtarget features to match this instruction.
461 SmallVector<SubtargetFeatureInfo*, 4> RequiredFeatures;
463 /// ConversionFnKind - The enum value which is passed to the generated
464 /// ConvertToMCInst to convert parsed operands into an MCInst for this
466 std::string ConversionFnKind;
468 /// operator< - Compare two instructions.
469 bool operator<(const InstructionInfo &RHS) const {
470 // The primary comparator is the instruction mnemonic.
471 if (Tokens[0] != RHS.Tokens[0])
472 return Tokens[0] < RHS.Tokens[0];
474 if (Operands.size() != RHS.Operands.size())
475 return Operands.size() < RHS.Operands.size();
477 // Compare lexicographically by operand. The matcher validates that other
478 // orderings wouldn't be ambiguous using \see CouldMatchAmiguouslyWith().
479 for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
480 if (*Operands[i].Class < *RHS.Operands[i].Class)
482 if (*RHS.Operands[i].Class < *Operands[i].Class)
489 /// CouldMatchAmiguouslyWith - Check whether this instruction could
490 /// ambiguously match the same set of operands as \arg RHS (without being a
491 /// strictly superior match).
492 bool CouldMatchAmiguouslyWith(const InstructionInfo &RHS) {
493 // The number of operands is unambiguous.
494 if (Operands.size() != RHS.Operands.size())
497 // Otherwise, make sure the ordering of the two instructions is unambiguous
498 // by checking that either (a) a token or operand kind discriminates them,
499 // or (b) the ordering among equivalent kinds is consistent.
501 // Tokens and operand kinds are unambiguous (assuming a correct target
503 for (unsigned i = 0, e = Operands.size(); i != e; ++i)
504 if (Operands[i].Class->Kind != RHS.Operands[i].Class->Kind ||
505 Operands[i].Class->Kind == ClassInfo::Token)
506 if (*Operands[i].Class < *RHS.Operands[i].Class ||
507 *RHS.Operands[i].Class < *Operands[i].Class)
510 // Otherwise, this operand could commute if all operands are equivalent, or
511 // there is a pair of operands that compare less than and a pair that
512 // compare greater than.
513 bool HasLT = false, HasGT = false;
514 for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
515 if (*Operands[i].Class < *RHS.Operands[i].Class)
517 if (*RHS.Operands[i].Class < *Operands[i].Class)
521 return !(HasLT ^ HasGT);
528 /// SubtargetFeatureInfo - Helper class for storing information on a subtarget
529 /// feature which participates in instruction matching.
530 struct SubtargetFeatureInfo {
531 /// \brief The predicate record for this feature.
534 /// \brief An unique index assigned to represent this feature.
537 SubtargetFeatureInfo(Record *D, unsigned Idx) : TheDef(D), Index(Idx) {}
539 /// \brief The name of the enumerated constant identifying this feature.
540 std::string getEnumName() const {
541 return "Feature_" + TheDef->getName();
545 class AsmMatcherInfo {
547 /// The tablegen AsmParser record.
550 /// The AsmParser "CommentDelimiter" value.
551 std::string CommentDelimiter;
553 /// The AsmParser "RegisterPrefix" value.
554 std::string RegisterPrefix;
556 /// The classes which are needed for matching.
557 std::vector<ClassInfo*> Classes;
559 /// The information on the instruction to match.
560 std::vector<InstructionInfo*> Instructions;
562 /// Map of Register records to their class information.
563 std::map<Record*, ClassInfo*> RegisterClasses;
565 /// Map of Predicate records to their subtarget information.
566 std::map<Record*, SubtargetFeatureInfo*> SubtargetFeatures;
569 /// Map of token to class information which has already been constructed.
570 std::map<std::string, ClassInfo*> TokenClasses;
572 /// Map of RegisterClass records to their class information.
573 std::map<Record*, ClassInfo*> RegisterClassClasses;
575 /// Map of AsmOperandClass records to their class information.
576 std::map<Record*, ClassInfo*> AsmOperandClasses;
579 /// getTokenClass - Lookup or create the class for the given token.
580 ClassInfo *getTokenClass(StringRef Token);
582 /// getOperandClass - Lookup or create the class for the given operand.
583 ClassInfo *getOperandClass(StringRef Token,
584 const CodeGenInstruction::OperandInfo &OI);
586 /// BuildRegisterClasses - Build the ClassInfo* instances for register
588 void BuildRegisterClasses(CodeGenTarget &Target,
589 std::set<std::string> &SingletonRegisterNames);
591 /// BuildOperandClasses - Build the ClassInfo* instances for user defined
593 void BuildOperandClasses(CodeGenTarget &Target);
596 AsmMatcherInfo(Record *_AsmParser);
598 /// BuildInfo - Construct the various tables used during matching.
599 void BuildInfo(CodeGenTarget &Target);
601 /// getSubtargetFeature - Lookup or create the subtarget feature info for the
603 SubtargetFeatureInfo *getSubtargetFeature(Record *Def) const {
604 assert(Def->isSubClassOf("Predicate") && "Invalid predicate type!");
605 std::map<Record*, SubtargetFeatureInfo*>::const_iterator I =
606 SubtargetFeatures.find(Def);
607 return I == SubtargetFeatures.end() ? 0 : I->second;
613 void InstructionInfo::dump() {
614 errs() << InstrName << " -- " << "flattened:\"" << AsmString << '\"'
616 for (unsigned i = 0, e = Tokens.size(); i != e; ++i) {
623 for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
624 Operand &Op = Operands[i];
625 errs() << " op[" << i << "] = " << Op.Class->ClassName << " - ";
626 if (Op.Class->Kind == ClassInfo::Token) {
627 errs() << '\"' << Tokens[i] << "\"\n";
631 if (!Op.OperandInfo) {
632 errs() << "(singleton register)\n";
636 const CodeGenInstruction::OperandInfo &OI = *Op.OperandInfo;
637 errs() << OI.Name << " " << OI.Rec->getName()
638 << " (" << OI.MIOperandNo << ", " << OI.MINumOperands << ")\n";
642 static std::string getEnumNameForToken(StringRef Str) {
645 for (StringRef::iterator it = Str.begin(), ie = Str.end(); it != ie; ++it) {
647 case '*': Res += "_STAR_"; break;
648 case '%': Res += "_PCT_"; break;
649 case ':': Res += "_COLON_"; break;
654 Res += "_" + utostr((unsigned) *it) + "_";
661 /// getRegisterRecord - Get the register record for \arg name, or 0.
662 static Record *getRegisterRecord(CodeGenTarget &Target, StringRef Name) {
663 for (unsigned i = 0, e = Target.getRegisters().size(); i != e; ++i) {
664 const CodeGenRegister &Reg = Target.getRegisters()[i];
665 if (Name == Reg.TheDef->getValueAsString("AsmName"))
672 ClassInfo *AsmMatcherInfo::getTokenClass(StringRef Token) {
673 ClassInfo *&Entry = TokenClasses[Token];
676 Entry = new ClassInfo();
677 Entry->Kind = ClassInfo::Token;
678 Entry->ClassName = "Token";
679 Entry->Name = "MCK_" + getEnumNameForToken(Token);
680 Entry->ValueName = Token;
681 Entry->PredicateMethod = "<invalid>";
682 Entry->RenderMethod = "<invalid>";
683 Classes.push_back(Entry);
690 AsmMatcherInfo::getOperandClass(StringRef Token,
691 const CodeGenInstruction::OperandInfo &OI) {
692 if (OI.Rec->isSubClassOf("RegisterClass")) {
693 ClassInfo *CI = RegisterClassClasses[OI.Rec];
696 PrintError(OI.Rec->getLoc(), "register class has no class info!");
697 throw std::string("ERROR: Missing register class!");
703 assert(OI.Rec->isSubClassOf("Operand") && "Unexpected operand!");
704 Record *MatchClass = OI.Rec->getValueAsDef("ParserMatchClass");
705 ClassInfo *CI = AsmOperandClasses[MatchClass];
708 PrintError(OI.Rec->getLoc(), "operand has no match class!");
709 throw std::string("ERROR: Missing match class!");
715 void AsmMatcherInfo::BuildRegisterClasses(CodeGenTarget &Target,
716 std::set<std::string>
717 &SingletonRegisterNames) {
718 std::vector<CodeGenRegisterClass> RegisterClasses;
719 std::vector<CodeGenRegister> Registers;
721 RegisterClasses = Target.getRegisterClasses();
722 Registers = Target.getRegisters();
724 // The register sets used for matching.
725 std::set< std::set<Record*> > RegisterSets;
727 // Gather the defined sets.
728 for (std::vector<CodeGenRegisterClass>::iterator it = RegisterClasses.begin(),
729 ie = RegisterClasses.end(); it != ie; ++it)
730 RegisterSets.insert(std::set<Record*>(it->Elements.begin(),
731 it->Elements.end()));
733 // Add any required singleton sets.
734 for (std::set<std::string>::iterator it = SingletonRegisterNames.begin(),
735 ie = SingletonRegisterNames.end(); it != ie; ++it)
736 if (Record *Rec = getRegisterRecord(Target, *it))
737 RegisterSets.insert(std::set<Record*>(&Rec, &Rec + 1));
739 // Introduce derived sets where necessary (when a register does not determine
740 // a unique register set class), and build the mapping of registers to the set
741 // they should classify to.
742 std::map<Record*, std::set<Record*> > RegisterMap;
743 for (std::vector<CodeGenRegister>::iterator it = Registers.begin(),
744 ie = Registers.end(); it != ie; ++it) {
745 CodeGenRegister &CGR = *it;
746 // Compute the intersection of all sets containing this register.
747 std::set<Record*> ContainingSet;
749 for (std::set< std::set<Record*> >::iterator it = RegisterSets.begin(),
750 ie = RegisterSets.end(); it != ie; ++it) {
751 if (!it->count(CGR.TheDef))
754 if (ContainingSet.empty()) {
757 std::set<Record*> Tmp;
758 std::swap(Tmp, ContainingSet);
759 std::insert_iterator< std::set<Record*> > II(ContainingSet,
760 ContainingSet.begin());
761 std::set_intersection(Tmp.begin(), Tmp.end(), it->begin(), it->end(),
766 if (!ContainingSet.empty()) {
767 RegisterSets.insert(ContainingSet);
768 RegisterMap.insert(std::make_pair(CGR.TheDef, ContainingSet));
772 // Construct the register classes.
773 std::map<std::set<Record*>, ClassInfo*> RegisterSetClasses;
775 for (std::set< std::set<Record*> >::iterator it = RegisterSets.begin(),
776 ie = RegisterSets.end(); it != ie; ++it, ++Index) {
777 ClassInfo *CI = new ClassInfo();
778 CI->Kind = ClassInfo::RegisterClass0 + Index;
779 CI->ClassName = "Reg" + utostr(Index);
780 CI->Name = "MCK_Reg" + utostr(Index);
782 CI->PredicateMethod = ""; // unused
783 CI->RenderMethod = "addRegOperands";
785 Classes.push_back(CI);
786 RegisterSetClasses.insert(std::make_pair(*it, CI));
789 // Find the superclasses; we could compute only the subgroup lattice edges,
790 // but there isn't really a point.
791 for (std::set< std::set<Record*> >::iterator it = RegisterSets.begin(),
792 ie = RegisterSets.end(); it != ie; ++it) {
793 ClassInfo *CI = RegisterSetClasses[*it];
794 for (std::set< std::set<Record*> >::iterator it2 = RegisterSets.begin(),
795 ie2 = RegisterSets.end(); it2 != ie2; ++it2)
797 std::includes(it2->begin(), it2->end(), it->begin(), it->end()))
798 CI->SuperClasses.push_back(RegisterSetClasses[*it2]);
801 // Name the register classes which correspond to a user defined RegisterClass.
802 for (std::vector<CodeGenRegisterClass>::iterator it = RegisterClasses.begin(),
803 ie = RegisterClasses.end(); it != ie; ++it) {
804 ClassInfo *CI = RegisterSetClasses[std::set<Record*>(it->Elements.begin(),
805 it->Elements.end())];
806 if (CI->ValueName.empty()) {
807 CI->ClassName = it->getName();
808 CI->Name = "MCK_" + it->getName();
809 CI->ValueName = it->getName();
811 CI->ValueName = CI->ValueName + "," + it->getName();
813 RegisterClassClasses.insert(std::make_pair(it->TheDef, CI));
816 // Populate the map for individual registers.
817 for (std::map<Record*, std::set<Record*> >::iterator it = RegisterMap.begin(),
818 ie = RegisterMap.end(); it != ie; ++it)
819 this->RegisterClasses[it->first] = RegisterSetClasses[it->second];
821 // Name the register classes which correspond to singleton registers.
822 for (std::set<std::string>::iterator it = SingletonRegisterNames.begin(),
823 ie = SingletonRegisterNames.end(); it != ie; ++it) {
824 if (Record *Rec = getRegisterRecord(Target, *it)) {
825 ClassInfo *CI = this->RegisterClasses[Rec];
826 assert(CI && "Missing singleton register class info!");
828 if (CI->ValueName.empty()) {
829 CI->ClassName = Rec->getName();
830 CI->Name = "MCK_" + Rec->getName();
831 CI->ValueName = Rec->getName();
833 CI->ValueName = CI->ValueName + "," + Rec->getName();
838 void AsmMatcherInfo::BuildOperandClasses(CodeGenTarget &Target) {
839 std::vector<Record*> AsmOperands;
840 AsmOperands = Records.getAllDerivedDefinitions("AsmOperandClass");
842 // Pre-populate AsmOperandClasses map.
843 for (std::vector<Record*>::iterator it = AsmOperands.begin(),
844 ie = AsmOperands.end(); it != ie; ++it)
845 AsmOperandClasses[*it] = new ClassInfo();
848 for (std::vector<Record*>::iterator it = AsmOperands.begin(),
849 ie = AsmOperands.end(); it != ie; ++it, ++Index) {
850 ClassInfo *CI = AsmOperandClasses[*it];
851 CI->Kind = ClassInfo::UserClass0 + Index;
853 ListInit *Supers = (*it)->getValueAsListInit("SuperClasses");
854 for (unsigned i = 0, e = Supers->getSize(); i != e; ++i) {
855 DefInit *DI = dynamic_cast<DefInit*>(Supers->getElement(i));
857 PrintError((*it)->getLoc(), "Invalid super class reference!");
861 ClassInfo *SC = AsmOperandClasses[DI->getDef()];
863 PrintError((*it)->getLoc(), "Invalid super class reference!");
865 CI->SuperClasses.push_back(SC);
867 CI->ClassName = (*it)->getValueAsString("Name");
868 CI->Name = "MCK_" + CI->ClassName;
869 CI->ValueName = (*it)->getName();
871 // Get or construct the predicate method name.
872 Init *PMName = (*it)->getValueInit("PredicateMethod");
873 if (StringInit *SI = dynamic_cast<StringInit*>(PMName)) {
874 CI->PredicateMethod = SI->getValue();
876 assert(dynamic_cast<UnsetInit*>(PMName) &&
877 "Unexpected PredicateMethod field!");
878 CI->PredicateMethod = "is" + CI->ClassName;
881 // Get or construct the render method name.
882 Init *RMName = (*it)->getValueInit("RenderMethod");
883 if (StringInit *SI = dynamic_cast<StringInit*>(RMName)) {
884 CI->RenderMethod = SI->getValue();
886 assert(dynamic_cast<UnsetInit*>(RMName) &&
887 "Unexpected RenderMethod field!");
888 CI->RenderMethod = "add" + CI->ClassName + "Operands";
891 AsmOperandClasses[*it] = CI;
892 Classes.push_back(CI);
896 AsmMatcherInfo::AsmMatcherInfo(Record *asmParser)
897 : AsmParser(asmParser),
898 CommentDelimiter(AsmParser->getValueAsString("CommentDelimiter")),
899 RegisterPrefix(AsmParser->getValueAsString("RegisterPrefix"))
903 void AsmMatcherInfo::BuildInfo(CodeGenTarget &Target) {
904 // Build information about all of the AssemblerPredicates.
905 std::vector<Record*> AllPredicates =
906 Records.getAllDerivedDefinitions("Predicate");
907 for (unsigned i = 0, e = AllPredicates.size(); i != e; ++i) {
908 Record *Pred = AllPredicates[i];
909 // Ignore predicates that are not intended for the assembler.
910 if (!Pred->getValueAsBit("AssemblerMatcherPredicate"))
913 if (Pred->getName().empty()) {
914 PrintError(Pred->getLoc(), "Predicate has no name!");
915 throw std::string("ERROR: Predicate defs must be named");
918 unsigned FeatureNo = SubtargetFeatures.size();
919 SubtargetFeatures[Pred] = new SubtargetFeatureInfo(Pred, FeatureNo);
920 assert(FeatureNo < 32 && "Too many subtarget features!");
923 // Parse the instructions; we need to do this first so that we can gather the
924 // singleton register classes.
925 std::set<std::string> SingletonRegisterNames;
926 const std::vector<const CodeGenInstruction*> &InstrList =
927 Target.getInstructionsByEnumValue();
928 for (unsigned i = 0, e = InstrList.size(); i != e; ++i) {
929 const CodeGenInstruction &CGI = *InstrList[i];
931 // If the tblgen -match-prefix option is specified (for tblgen hackers),
932 // filter the set of instructions we consider.
933 if (!StringRef(CGI.TheDef->getName()).startswith(MatchPrefix))
936 OwningPtr<InstructionInfo> II(new InstructionInfo());
938 II->InstrName = CGI.TheDef->getName();
940 II->AsmString = FlattenVariants(CGI.AsmString, 0);
942 // Remove comments from the asm string. We know that the asmstring only
944 if (!CommentDelimiter.empty()) {
945 size_t Idx = StringRef(II->AsmString).find(CommentDelimiter);
946 if (Idx != StringRef::npos)
947 II->AsmString = II->AsmString.substr(0, Idx);
950 TokenizeAsmString(II->AsmString, II->Tokens);
952 // Ignore instructions which shouldn't be matched.
953 if (!IsAssemblerInstruction(CGI.TheDef->getName(), CGI, II->Tokens))
956 // Collect singleton registers, if used.
957 for (unsigned i = 0, e = II->Tokens.size(); i != e; ++i) {
958 if (!II->Tokens[i].startswith(RegisterPrefix))
961 StringRef RegName = II->Tokens[i].substr(RegisterPrefix.size());
962 Record *Rec = getRegisterRecord(Target, RegName);
965 // If there is no register prefix (i.e. "%" in "%eax"), then this may
966 // be some random non-register token, just ignore it.
967 if (RegisterPrefix.empty())
970 std::string Err = "unable to find register for '" + RegName.str() +
971 "' (which matches register prefix)";
972 throw TGError(CGI.TheDef->getLoc(), Err);
975 SingletonRegisterNames.insert(RegName);
978 // Compute the require features.
979 std::vector<Record*> Predicates =
980 CGI.TheDef->getValueAsListOfDefs("Predicates");
981 for (unsigned i = 0, e = Predicates.size(); i != e; ++i)
982 if (SubtargetFeatureInfo *Feature = getSubtargetFeature(Predicates[i]))
983 II->RequiredFeatures.push_back(Feature);
985 Instructions.push_back(II.take());
988 // Build info for the register classes.
989 BuildRegisterClasses(Target, SingletonRegisterNames);
991 // Build info for the user defined assembly operand classes.
992 BuildOperandClasses(Target);
994 // Build the instruction information.
995 for (std::vector<InstructionInfo*>::iterator it = Instructions.begin(),
996 ie = Instructions.end(); it != ie; ++it) {
997 InstructionInfo *II = *it;
999 // The first token of the instruction is the mnemonic, which must be a
1001 assert(!II->Tokens.empty() && "Instruction has no tokens?");
1002 StringRef Mnemonic = II->Tokens[0];
1003 assert(Mnemonic[0] != '$' &&
1004 (RegisterPrefix.empty() || !Mnemonic.startswith(RegisterPrefix)));
1006 // Parse the tokens after the mnemonic.
1007 for (unsigned i = 1, e = II->Tokens.size(); i != e; ++i) {
1008 StringRef Token = II->Tokens[i];
1010 // Check for singleton registers.
1011 if (Token.startswith(RegisterPrefix)) {
1012 StringRef RegName = II->Tokens[i].substr(RegisterPrefix.size());
1013 if (Record *RegRecord = getRegisterRecord(Target, RegName)) {
1014 InstructionInfo::Operand Op;
1015 Op.Class = RegisterClasses[RegRecord];
1017 assert(Op.Class && Op.Class->Registers.size() == 1 &&
1018 "Unexpected class for singleton register");
1019 II->Operands.push_back(Op);
1023 if (!RegisterPrefix.empty()) {
1024 std::string Err = "unable to find register for '" + RegName.str() +
1025 "' (which matches register prefix)";
1026 throw TGError(II->Instr->TheDef->getLoc(), Err);
1030 // Check for simple tokens.
1031 if (Token[0] != '$') {
1032 InstructionInfo::Operand Op;
1033 Op.Class = getTokenClass(Token);
1035 II->Operands.push_back(Op);
1039 // Otherwise this is an operand reference.
1040 StringRef OperandName;
1041 if (Token[1] == '{')
1042 OperandName = Token.substr(2, Token.size() - 3);
1044 OperandName = Token.substr(1);
1046 // Map this token to an operand. FIXME: Move elsewhere.
1049 Idx = II->Instr->getOperandNamed(OperandName);
1051 throw std::string("error: unable to find operand: '" +
1052 OperandName.str() + "'");
1055 // FIXME: This is annoying, the named operand may be tied (e.g.,
1056 // XCHG8rm). What we want is the untied operand, which we now have to
1057 // grovel for. Only worry about this for single entry operands, we have to
1058 // clean this up anyway.
1059 const CodeGenInstruction::OperandInfo *OI = &II->Instr->OperandList[Idx];
1060 if (OI->Constraints[0].isTied()) {
1061 unsigned TiedOp = OI->Constraints[0].getTiedOperand();
1063 // The tied operand index is an MIOperand index, find the operand that
1065 for (unsigned i = 0, e = II->Instr->OperandList.size(); i != e; ++i) {
1066 if (II->Instr->OperandList[i].MIOperandNo == TiedOp) {
1067 OI = &II->Instr->OperandList[i];
1072 assert(OI && "Unable to find tied operand target!");
1075 InstructionInfo::Operand Op;
1076 Op.Class = getOperandClass(Token, *OI);
1077 Op.OperandInfo = OI;
1078 II->Operands.push_back(Op);
1082 // Reorder classes so that classes preceed super classes.
1083 std::sort(Classes.begin(), Classes.end(), less_ptr<ClassInfo>());
1086 static std::pair<unsigned, unsigned> *
1087 GetTiedOperandAtIndex(SmallVectorImpl<std::pair<unsigned, unsigned> > &List,
1089 for (unsigned i = 0, e = List.size(); i != e; ++i)
1090 if (Index == List[i].first)
1096 static void EmitConvertToMCInst(CodeGenTarget &Target,
1097 std::vector<InstructionInfo*> &Infos,
1099 // Write the convert function to a separate stream, so we can drop it after
1101 std::string ConvertFnBody;
1102 raw_string_ostream CvtOS(ConvertFnBody);
1104 // Function we have already generated.
1105 std::set<std::string> GeneratedFns;
1107 // Start the unified conversion function.
1109 CvtOS << "static void ConvertToMCInst(ConversionKind Kind, MCInst &Inst, "
1110 << "unsigned Opcode,\n"
1111 << " const SmallVectorImpl<MCParsedAsmOperand*"
1112 << "> &Operands) {\n";
1113 CvtOS << " Inst.setOpcode(Opcode);\n";
1114 CvtOS << " switch (Kind) {\n";
1115 CvtOS << " default:\n";
1117 // Start the enum, which we will generate inline.
1119 OS << "// Unified function for converting operants to MCInst instances.\n\n";
1120 OS << "enum ConversionKind {\n";
1122 // TargetOperandClass - This is the target's operand class, like X86Operand.
1123 std::string TargetOperandClass = Target.getName() + "Operand";
1125 for (std::vector<InstructionInfo*>::const_iterator it = Infos.begin(),
1126 ie = Infos.end(); it != ie; ++it) {
1127 InstructionInfo &II = **it;
1129 // Order the (class) operands by the order to convert them into an MCInst.
1130 SmallVector<std::pair<unsigned, unsigned>, 4> MIOperandList;
1131 for (unsigned i = 0, e = II.Operands.size(); i != e; ++i) {
1132 InstructionInfo::Operand &Op = II.Operands[i];
1134 MIOperandList.push_back(std::make_pair(Op.OperandInfo->MIOperandNo, i));
1137 // Find any tied operands.
1138 SmallVector<std::pair<unsigned, unsigned>, 4> TiedOperands;
1139 for (unsigned i = 0, e = II.Instr->OperandList.size(); i != e; ++i) {
1140 const CodeGenInstruction::OperandInfo &OpInfo = II.Instr->OperandList[i];
1141 for (unsigned j = 0, e = OpInfo.Constraints.size(); j != e; ++j) {
1142 const CodeGenInstruction::ConstraintInfo &CI = OpInfo.Constraints[j];
1144 TiedOperands.push_back(std::make_pair(OpInfo.MIOperandNo + j,
1145 CI.getTiedOperand()));
1149 std::sort(MIOperandList.begin(), MIOperandList.end());
1151 // Compute the total number of operands.
1152 unsigned NumMIOperands = 0;
1153 for (unsigned i = 0, e = II.Instr->OperandList.size(); i != e; ++i) {
1154 const CodeGenInstruction::OperandInfo &OI = II.Instr->OperandList[i];
1155 NumMIOperands = std::max(NumMIOperands,
1156 OI.MIOperandNo + OI.MINumOperands);
1159 // Build the conversion function signature.
1160 std::string Signature = "Convert";
1161 unsigned CurIndex = 0;
1162 for (unsigned i = 0, e = MIOperandList.size(); i != e; ++i) {
1163 InstructionInfo::Operand &Op = II.Operands[MIOperandList[i].second];
1164 assert(CurIndex <= Op.OperandInfo->MIOperandNo &&
1165 "Duplicate match for instruction operand!");
1167 // Skip operands which weren't matched by anything, this occurs when the
1168 // .td file encodes "implicit" operands as explicit ones.
1170 // FIXME: This should be removed from the MCInst structure.
1171 for (; CurIndex != Op.OperandInfo->MIOperandNo; ++CurIndex) {
1172 std::pair<unsigned, unsigned> *Tie = GetTiedOperandAtIndex(TiedOperands,
1175 Signature += "__Imp";
1177 Signature += "__Tie" + utostr(Tie->second);
1182 // Registers are always converted the same, don't duplicate the conversion
1183 // function based on them.
1185 // FIXME: We could generalize this based on the render method, if it
1187 if (Op.Class->isRegisterClass())
1190 Signature += Op.Class->ClassName;
1191 Signature += utostr(Op.OperandInfo->MINumOperands);
1192 Signature += "_" + utostr(MIOperandList[i].second);
1194 CurIndex += Op.OperandInfo->MINumOperands;
1197 // Add any trailing implicit operands.
1198 for (; CurIndex != NumMIOperands; ++CurIndex) {
1199 std::pair<unsigned, unsigned> *Tie = GetTiedOperandAtIndex(TiedOperands,
1202 Signature += "__Imp";
1204 Signature += "__Tie" + utostr(Tie->second);
1207 II.ConversionFnKind = Signature;
1209 // Check if we have already generated this signature.
1210 if (!GeneratedFns.insert(Signature).second)
1213 // If not, emit it now.
1215 // Add to the enum list.
1216 OS << " " << Signature << ",\n";
1218 // And to the convert function.
1219 CvtOS << " case " << Signature << ":\n";
1221 for (unsigned i = 0, e = MIOperandList.size(); i != e; ++i) {
1222 InstructionInfo::Operand &Op = II.Operands[MIOperandList[i].second];
1224 // Add the implicit operands.
1225 for (; CurIndex != Op.OperandInfo->MIOperandNo; ++CurIndex) {
1226 // See if this is a tied operand.
1227 std::pair<unsigned, unsigned> *Tie = GetTiedOperandAtIndex(TiedOperands,
1231 // If not, this is some implicit operand. Just assume it is a register
1233 CvtOS << " Inst.addOperand(MCOperand::CreateReg(0));\n";
1235 // Copy the tied operand.
1236 assert(Tie->first>Tie->second && "Tied operand preceeds its target!");
1237 CvtOS << " Inst.addOperand(Inst.getOperand("
1238 << Tie->second << "));\n";
1242 CvtOS << " ((" << TargetOperandClass << "*)Operands["
1243 << MIOperandList[i].second
1244 << "+1])->" << Op.Class->RenderMethod
1245 << "(Inst, " << Op.OperandInfo->MINumOperands << ");\n";
1246 CurIndex += Op.OperandInfo->MINumOperands;
1249 // And add trailing implicit operands.
1250 for (; CurIndex != NumMIOperands; ++CurIndex) {
1251 std::pair<unsigned, unsigned> *Tie = GetTiedOperandAtIndex(TiedOperands,
1255 // If not, this is some implicit operand. Just assume it is a register
1257 CvtOS << " Inst.addOperand(MCOperand::CreateReg(0));\n";
1259 // Copy the tied operand.
1260 assert(Tie->first>Tie->second && "Tied operand preceeds its target!");
1261 CvtOS << " Inst.addOperand(Inst.getOperand("
1262 << Tie->second << "));\n";
1266 CvtOS << " return;\n";
1269 // Finish the convert function.
1274 // Finish the enum, and drop the convert function after it.
1276 OS << " NumConversionVariants\n";
1282 /// EmitMatchClassEnumeration - Emit the enumeration for match class kinds.
1283 static void EmitMatchClassEnumeration(CodeGenTarget &Target,
1284 std::vector<ClassInfo*> &Infos,
1286 OS << "namespace {\n\n";
1288 OS << "/// MatchClassKind - The kinds of classes which participate in\n"
1289 << "/// instruction matching.\n";
1290 OS << "enum MatchClassKind {\n";
1291 OS << " InvalidMatchClass = 0,\n";
1292 for (std::vector<ClassInfo*>::iterator it = Infos.begin(),
1293 ie = Infos.end(); it != ie; ++it) {
1294 ClassInfo &CI = **it;
1295 OS << " " << CI.Name << ", // ";
1296 if (CI.Kind == ClassInfo::Token) {
1297 OS << "'" << CI.ValueName << "'\n";
1298 } else if (CI.isRegisterClass()) {
1299 if (!CI.ValueName.empty())
1300 OS << "register class '" << CI.ValueName << "'\n";
1302 OS << "derived register class\n";
1304 OS << "user defined class '" << CI.ValueName << "'\n";
1307 OS << " NumMatchClassKinds\n";
1313 /// EmitClassifyOperand - Emit the function to classify an operand.
1314 static void EmitClassifyOperand(CodeGenTarget &Target,
1315 AsmMatcherInfo &Info,
1317 OS << "static MatchClassKind ClassifyOperand(MCParsedAsmOperand *GOp) {\n"
1318 << " " << Target.getName() << "Operand &Operand = *("
1319 << Target.getName() << "Operand*)GOp;\n";
1322 OS << " if (Operand.isToken())\n";
1323 OS << " return MatchTokenString(Operand.getToken());\n\n";
1325 // Classify registers.
1327 // FIXME: Don't hardcode isReg, getReg.
1328 OS << " if (Operand.isReg()) {\n";
1329 OS << " switch (Operand.getReg()) {\n";
1330 OS << " default: return InvalidMatchClass;\n";
1331 for (std::map<Record*, ClassInfo*>::iterator
1332 it = Info.RegisterClasses.begin(), ie = Info.RegisterClasses.end();
1334 OS << " case " << Target.getName() << "::"
1335 << it->first->getName() << ": return " << it->second->Name << ";\n";
1339 // Classify user defined operands.
1340 for (std::vector<ClassInfo*>::iterator it = Info.Classes.begin(),
1341 ie = Info.Classes.end(); it != ie; ++it) {
1342 ClassInfo &CI = **it;
1344 if (!CI.isUserClass())
1347 OS << " // '" << CI.ClassName << "' class";
1348 if (!CI.SuperClasses.empty()) {
1349 OS << ", subclass of ";
1350 for (unsigned i = 0, e = CI.SuperClasses.size(); i != e; ++i) {
1352 OS << "'" << CI.SuperClasses[i]->ClassName << "'";
1353 assert(CI < *CI.SuperClasses[i] && "Invalid class relation!");
1358 OS << " if (Operand." << CI.PredicateMethod << "()) {\n";
1360 // Validate subclass relationships.
1361 if (!CI.SuperClasses.empty()) {
1362 for (unsigned i = 0, e = CI.SuperClasses.size(); i != e; ++i)
1363 OS << " assert(Operand." << CI.SuperClasses[i]->PredicateMethod
1364 << "() && \"Invalid class relationship!\");\n";
1367 OS << " return " << CI.Name << ";\n";
1370 OS << " return InvalidMatchClass;\n";
1374 /// EmitIsSubclass - Emit the subclass predicate function.
1375 static void EmitIsSubclass(CodeGenTarget &Target,
1376 std::vector<ClassInfo*> &Infos,
1378 OS << "/// IsSubclass - Compute whether \\arg A is a subclass of \\arg B.\n";
1379 OS << "static bool IsSubclass(MatchClassKind A, MatchClassKind B) {\n";
1380 OS << " if (A == B)\n";
1381 OS << " return true;\n\n";
1383 OS << " switch (A) {\n";
1384 OS << " default:\n";
1385 OS << " return false;\n";
1386 for (std::vector<ClassInfo*>::iterator it = Infos.begin(),
1387 ie = Infos.end(); it != ie; ++it) {
1388 ClassInfo &A = **it;
1390 if (A.Kind != ClassInfo::Token) {
1391 std::vector<StringRef> SuperClasses;
1392 for (std::vector<ClassInfo*>::iterator it = Infos.begin(),
1393 ie = Infos.end(); it != ie; ++it) {
1394 ClassInfo &B = **it;
1396 if (&A != &B && A.isSubsetOf(B))
1397 SuperClasses.push_back(B.Name);
1400 if (SuperClasses.empty())
1403 OS << "\n case " << A.Name << ":\n";
1405 if (SuperClasses.size() == 1) {
1406 OS << " return B == " << SuperClasses.back() << ";\n";
1410 OS << " switch (B) {\n";
1411 OS << " default: return false;\n";
1412 for (unsigned i = 0, e = SuperClasses.size(); i != e; ++i)
1413 OS << " case " << SuperClasses[i] << ": return true;\n";
1423 /// EmitMatchTokenString - Emit the function to match a token string to the
1424 /// appropriate match class value.
1425 static void EmitMatchTokenString(CodeGenTarget &Target,
1426 std::vector<ClassInfo*> &Infos,
1428 // Construct the match list.
1429 std::vector<StringMatcher::StringPair> Matches;
1430 for (std::vector<ClassInfo*>::iterator it = Infos.begin(),
1431 ie = Infos.end(); it != ie; ++it) {
1432 ClassInfo &CI = **it;
1434 if (CI.Kind == ClassInfo::Token)
1435 Matches.push_back(StringMatcher::StringPair(CI.ValueName,
1436 "return " + CI.Name + ";"));
1439 OS << "static MatchClassKind MatchTokenString(StringRef Name) {\n";
1441 StringMatcher("Name", Matches, OS).Emit();
1443 OS << " return InvalidMatchClass;\n";
1447 /// EmitMatchRegisterName - Emit the function to match a string to the target
1448 /// specific register enum.
1449 static void EmitMatchRegisterName(CodeGenTarget &Target, Record *AsmParser,
1451 // Construct the match list.
1452 std::vector<StringMatcher::StringPair> Matches;
1453 for (unsigned i = 0, e = Target.getRegisters().size(); i != e; ++i) {
1454 const CodeGenRegister &Reg = Target.getRegisters()[i];
1455 if (Reg.TheDef->getValueAsString("AsmName").empty())
1458 Matches.push_back(StringMatcher::StringPair(
1459 Reg.TheDef->getValueAsString("AsmName"),
1460 "return " + utostr(i + 1) + ";"));
1463 OS << "static unsigned MatchRegisterName(StringRef Name) {\n";
1465 StringMatcher("Name", Matches, OS).Emit();
1467 OS << " return 0;\n";
1471 /// EmitSubtargetFeatureFlagEnumeration - Emit the subtarget feature flag
1473 static void EmitSubtargetFeatureFlagEnumeration(CodeGenTarget &Target,
1474 AsmMatcherInfo &Info,
1476 OS << "// Flags for subtarget features that participate in "
1477 << "instruction matching.\n";
1478 OS << "enum SubtargetFeatureFlag {\n";
1479 for (std::map<Record*, SubtargetFeatureInfo*>::const_iterator
1480 it = Info.SubtargetFeatures.begin(),
1481 ie = Info.SubtargetFeatures.end(); it != ie; ++it) {
1482 SubtargetFeatureInfo &SFI = *it->second;
1483 OS << " " << SFI.getEnumName() << " = (1 << " << SFI.Index << "),\n";
1485 OS << " Feature_None = 0\n";
1489 /// EmitComputeAvailableFeatures - Emit the function to compute the list of
1490 /// available features given a subtarget.
1491 static void EmitComputeAvailableFeatures(CodeGenTarget &Target,
1492 AsmMatcherInfo &Info,
1494 std::string ClassName =
1495 Info.AsmParser->getValueAsString("AsmParserClassName");
1497 OS << "unsigned " << Target.getName() << ClassName << "::\n"
1498 << "ComputeAvailableFeatures(const " << Target.getName()
1499 << "Subtarget *Subtarget) const {\n";
1500 OS << " unsigned Features = 0;\n";
1501 for (std::map<Record*, SubtargetFeatureInfo*>::const_iterator
1502 it = Info.SubtargetFeatures.begin(),
1503 ie = Info.SubtargetFeatures.end(); it != ie; ++it) {
1504 SubtargetFeatureInfo &SFI = *it->second;
1505 OS << " if (" << SFI.TheDef->getValueAsString("CondString")
1507 OS << " Features |= " << SFI.getEnumName() << ";\n";
1509 OS << " return Features;\n";
1513 static std::string GetAliasRequiredFeatures(Record *R,
1514 const AsmMatcherInfo &Info) {
1515 std::vector<Record*> ReqFeatures = R->getValueAsListOfDefs("Predicates");
1517 unsigned NumFeatures = 0;
1518 for (unsigned i = 0, e = ReqFeatures.size(); i != e; ++i) {
1519 if (SubtargetFeatureInfo *F = Info.getSubtargetFeature(ReqFeatures[i])) {
1523 Result += F->getEnumName();
1528 if (NumFeatures > 1)
1529 Result = '(' + Result + ')';
1533 /// EmitMnemonicAliases - If the target has any MnemonicAlias<> definitions,
1534 /// emit a function for them and return true, otherwise return false.
1535 static bool EmitMnemonicAliases(raw_ostream &OS, const AsmMatcherInfo &Info) {
1536 std::vector<Record*> Aliases =
1537 Records.getAllDerivedDefinitions("MnemonicAlias");
1538 if (Aliases.empty()) return false;
1540 OS << "static void ApplyMnemonicAliases(StringRef &Mnemonic, "
1541 "unsigned Features) {\n";
1543 // Keep track of all the aliases from a mnemonic. Use an std::map so that the
1544 // iteration order of the map is stable.
1545 std::map<std::string, std::vector<Record*> > AliasesFromMnemonic;
1547 for (unsigned i = 0, e = Aliases.size(); i != e; ++i) {
1548 Record *R = Aliases[i];
1549 AliasesFromMnemonic[R->getValueAsString("FromMnemonic")].push_back(R);
1552 // Process each alias a "from" mnemonic at a time, building the code executed
1553 // by the string remapper.
1554 std::vector<StringMatcher::StringPair> Cases;
1555 for (std::map<std::string, std::vector<Record*> >::iterator
1556 I = AliasesFromMnemonic.begin(), E = AliasesFromMnemonic.end();
1558 const std::vector<Record*> &ToVec = I->second;
1560 // Loop through each alias and emit code that handles each case. If there
1561 // are two instructions without predicates, emit an error. If there is one,
1563 std::string MatchCode;
1564 int AliasWithNoPredicate = -1;
1566 for (unsigned i = 0, e = ToVec.size(); i != e; ++i) {
1567 Record *R = ToVec[i];
1568 std::string FeatureMask = GetAliasRequiredFeatures(R, Info);
1570 // If this unconditionally matches, remember it for later and diagnose
1572 if (FeatureMask.empty()) {
1573 if (AliasWithNoPredicate != -1) {
1574 // We can't have two aliases from the same mnemonic with no predicate.
1575 PrintError(ToVec[AliasWithNoPredicate]->getLoc(),
1576 "two MnemonicAliases with the same 'from' mnemonic!");
1577 PrintError(R->getLoc(), "this is the other MnemonicAlias.");
1578 throw std::string("ERROR: Invalid MnemonicAlias definitions!");
1581 AliasWithNoPredicate = i;
1585 if (!MatchCode.empty())
1586 MatchCode += "else ";
1587 MatchCode += "if ((Features & " + FeatureMask + ") == "+FeatureMask+")\n";
1588 MatchCode += " Mnemonic = \"" +R->getValueAsString("ToMnemonic")+"\";\n";
1591 if (AliasWithNoPredicate != -1) {
1592 Record *R = ToVec[AliasWithNoPredicate];
1593 if (!MatchCode.empty())
1594 MatchCode += "else\n ";
1595 MatchCode += "Mnemonic = \"" + R->getValueAsString("ToMnemonic")+"\";\n";
1598 MatchCode += "return;";
1600 Cases.push_back(std::make_pair(I->first, MatchCode));
1604 StringMatcher("Mnemonic", Cases, OS).Emit();
1610 void AsmMatcherEmitter::run(raw_ostream &OS) {
1611 CodeGenTarget Target;
1612 Record *AsmParser = Target.getAsmParser();
1613 std::string ClassName = AsmParser->getValueAsString("AsmParserClassName");
1615 // Compute the information on the instructions to match.
1616 AsmMatcherInfo Info(AsmParser);
1617 Info.BuildInfo(Target);
1619 // Sort the instruction table using the partial order on classes. We use
1620 // stable_sort to ensure that ambiguous instructions are still
1621 // deterministically ordered.
1622 std::stable_sort(Info.Instructions.begin(), Info.Instructions.end(),
1623 less_ptr<InstructionInfo>());
1625 DEBUG_WITH_TYPE("instruction_info", {
1626 for (std::vector<InstructionInfo*>::iterator
1627 it = Info.Instructions.begin(), ie = Info.Instructions.end();
1632 // Check for ambiguous instructions.
1633 DEBUG_WITH_TYPE("ambiguous_instrs", {
1634 unsigned NumAmbiguous = 0;
1635 for (unsigned i = 0, e = Info.Instructions.size(); i != e; ++i) {
1636 for (unsigned j = i + 1; j != e; ++j) {
1637 InstructionInfo &A = *Info.Instructions[i];
1638 InstructionInfo &B = *Info.Instructions[j];
1640 if (A.CouldMatchAmiguouslyWith(B)) {
1641 errs() << "warning: ambiguous instruction match:\n";
1643 errs() << "\nis incomparable with:\n";
1651 errs() << "warning: " << NumAmbiguous
1652 << " ambiguous instructions!\n";
1655 // Write the output.
1657 EmitSourceFileHeader("Assembly Matcher Source Fragment", OS);
1659 // Information for the class declaration.
1660 OS << "\n#ifdef GET_ASSEMBLER_HEADER\n";
1661 OS << "#undef GET_ASSEMBLER_HEADER\n";
1662 OS << " // This should be included into the middle of the declaration of \n";
1663 OS << " // your subclasses implementation of TargetAsmParser.\n";
1664 OS << " unsigned ComputeAvailableFeatures(const " <<
1665 Target.getName() << "Subtarget *Subtarget) const;\n";
1666 OS << " enum MatchResultTy {\n";
1667 OS << " Match_Success, Match_MnemonicFail, Match_InvalidOperand,\n";
1668 OS << " Match_MissingFeature\n";
1670 OS << " MatchResultTy MatchInstructionImpl(const "
1671 << "SmallVectorImpl<MCParsedAsmOperand*>"
1672 << " &Operands, MCInst &Inst, unsigned &ErrorInfo);\n\n";
1673 OS << "#endif // GET_ASSEMBLER_HEADER_INFO\n\n";
1678 OS << "\n#ifdef GET_REGISTER_MATCHER\n";
1679 OS << "#undef GET_REGISTER_MATCHER\n\n";
1681 // Emit the subtarget feature enumeration.
1682 EmitSubtargetFeatureFlagEnumeration(Target, Info, OS);
1684 // Emit the function to match a register name to number.
1685 EmitMatchRegisterName(Target, AsmParser, OS);
1687 OS << "#endif // GET_REGISTER_MATCHER\n\n";
1690 OS << "\n#ifdef GET_MATCHER_IMPLEMENTATION\n";
1691 OS << "#undef GET_MATCHER_IMPLEMENTATION\n\n";
1693 // Generate the function that remaps for mnemonic aliases.
1694 bool HasMnemonicAliases = EmitMnemonicAliases(OS, Info);
1696 // Generate the unified function to convert operands into an MCInst.
1697 EmitConvertToMCInst(Target, Info.Instructions, OS);
1699 // Emit the enumeration for classes which participate in matching.
1700 EmitMatchClassEnumeration(Target, Info.Classes, OS);
1702 // Emit the routine to match token strings to their match class.
1703 EmitMatchTokenString(Target, Info.Classes, OS);
1705 // Emit the routine to classify an operand.
1706 EmitClassifyOperand(Target, Info, OS);
1708 // Emit the subclass predicate routine.
1709 EmitIsSubclass(Target, Info.Classes, OS);
1711 // Emit the available features compute function.
1712 EmitComputeAvailableFeatures(Target, Info, OS);
1715 size_t MaxNumOperands = 0;
1716 for (std::vector<InstructionInfo*>::const_iterator it =
1717 Info.Instructions.begin(), ie = Info.Instructions.end();
1719 MaxNumOperands = std::max(MaxNumOperands, (*it)->Operands.size());
1722 // Emit the static match table; unused classes get initalized to 0 which is
1723 // guaranteed to be InvalidMatchClass.
1725 // FIXME: We can reduce the size of this table very easily. First, we change
1726 // it so that store the kinds in separate bit-fields for each index, which
1727 // only needs to be the max width used for classes at that index (we also need
1728 // to reject based on this during classification). If we then make sure to
1729 // order the match kinds appropriately (putting mnemonics last), then we
1730 // should only end up using a few bits for each class, especially the ones
1731 // following the mnemonic.
1732 OS << "namespace {\n";
1733 OS << " struct MatchEntry {\n";
1734 OS << " unsigned Opcode;\n";
1735 OS << " const char *Mnemonic;\n";
1736 OS << " ConversionKind ConvertFn;\n";
1737 OS << " MatchClassKind Classes[" << MaxNumOperands << "];\n";
1738 OS << " unsigned RequiredFeatures;\n";
1741 OS << "// Predicate for searching for an opcode.\n";
1742 OS << " struct LessOpcode {\n";
1743 OS << " bool operator()(const MatchEntry &LHS, StringRef RHS) {\n";
1744 OS << " return StringRef(LHS.Mnemonic) < RHS;\n";
1746 OS << " bool operator()(StringRef LHS, const MatchEntry &RHS) {\n";
1747 OS << " return LHS < StringRef(RHS.Mnemonic);\n";
1749 OS << " bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) {\n";
1750 OS << " return StringRef(LHS.Mnemonic) < StringRef(RHS.Mnemonic);\n";
1754 OS << "} // end anonymous namespace.\n\n";
1756 OS << "static const MatchEntry MatchTable["
1757 << Info.Instructions.size() << "] = {\n";
1759 for (std::vector<InstructionInfo*>::const_iterator it =
1760 Info.Instructions.begin(), ie = Info.Instructions.end();
1762 InstructionInfo &II = **it;
1764 OS << " { " << Target.getName() << "::" << II.InstrName
1765 << ", \"" << II.Tokens[0] << "\""
1766 << ", " << II.ConversionFnKind << ", { ";
1767 for (unsigned i = 0, e = II.Operands.size(); i != e; ++i) {
1768 InstructionInfo::Operand &Op = II.Operands[i];
1771 OS << Op.Class->Name;
1775 // Write the required features mask.
1776 if (!II.RequiredFeatures.empty()) {
1777 for (unsigned i = 0, e = II.RequiredFeatures.size(); i != e; ++i) {
1779 OS << II.RequiredFeatures[i]->getEnumName();
1789 // Finally, build the match function.
1790 OS << Target.getName() << ClassName << "::MatchResultTy "
1791 << Target.getName() << ClassName << "::\n"
1792 << "MatchInstructionImpl(const SmallVectorImpl<MCParsedAsmOperand*>"
1794 OS << " MCInst &Inst, unsigned &ErrorInfo) {\n";
1796 // Emit code to get the available features.
1797 OS << " // Get the current feature set.\n";
1798 OS << " unsigned AvailableFeatures = getAvailableFeatures();\n\n";
1800 OS << " // Get the instruction mnemonic, which is the first token.\n";
1801 OS << " StringRef Mnemonic = ((" << Target.getName()
1802 << "Operand*)Operands[0])->getToken();\n\n";
1804 if (HasMnemonicAliases) {
1805 OS << " // Process all MnemonicAliases to remap the mnemonic.\n";
1806 OS << " ApplyMnemonicAliases(Mnemonic, AvailableFeatures);\n\n";
1809 // Emit code to compute the class list for this operand vector.
1810 OS << " // Eliminate obvious mismatches.\n";
1811 OS << " if (Operands.size() > " << (MaxNumOperands+1) << ") {\n";
1812 OS << " ErrorInfo = " << (MaxNumOperands+1) << ";\n";
1813 OS << " return Match_InvalidOperand;\n";
1816 OS << " // Compute the class list for this operand vector.\n";
1817 OS << " MatchClassKind Classes[" << MaxNumOperands << "];\n";
1818 OS << " for (unsigned i = 1, e = Operands.size(); i != e; ++i) {\n";
1819 OS << " Classes[i-1] = ClassifyOperand(Operands[i]);\n\n";
1821 OS << " // Check for invalid operands before matching.\n";
1822 OS << " if (Classes[i-1] == InvalidMatchClass) {\n";
1823 OS << " ErrorInfo = i;\n";
1824 OS << " return Match_InvalidOperand;\n";
1828 OS << " // Mark unused classes.\n";
1829 OS << " for (unsigned i = Operands.size()-1, e = " << MaxNumOperands << "; "
1830 << "i != e; ++i)\n";
1831 OS << " Classes[i] = InvalidMatchClass;\n\n";
1833 OS << " // Some state to try to produce better error messages.\n";
1834 OS << " bool HadMatchOtherThanFeatures = false;\n\n";
1835 OS << " // Set ErrorInfo to the operand that mismatches if it is \n";
1836 OS << " // wrong for all instances of the instruction.\n";
1837 OS << " ErrorInfo = ~0U;\n";
1839 // Emit code to search the table.
1840 OS << " // Search the table.\n";
1841 OS << " std::pair<const MatchEntry*, const MatchEntry*> MnemonicRange =\n";
1842 OS << " std::equal_range(MatchTable, MatchTable+"
1843 << Info.Instructions.size() << ", Mnemonic, LessOpcode());\n\n";
1845 OS << " // Return a more specific error code if no mnemonics match.\n";
1846 OS << " if (MnemonicRange.first == MnemonicRange.second)\n";
1847 OS << " return Match_MnemonicFail;\n\n";
1849 OS << " for (const MatchEntry *it = MnemonicRange.first, "
1850 << "*ie = MnemonicRange.second;\n";
1851 OS << " it != ie; ++it) {\n";
1853 OS << " // equal_range guarantees that instruction mnemonic matches.\n";
1854 OS << " assert(Mnemonic == it->Mnemonic);\n";
1856 // Emit check that the subclasses match.
1857 OS << " bool OperandsValid = true;\n";
1858 OS << " for (unsigned i = 0; i != " << MaxNumOperands << "; ++i) {\n";
1859 OS << " if (IsSubclass(Classes[i], it->Classes[i]))\n";
1860 OS << " continue;\n";
1861 OS << " // If this operand is broken for all of the instances of this\n";
1862 OS << " // mnemonic, keep track of it so we can report loc info.\n";
1863 OS << " if (it == MnemonicRange.first || ErrorInfo == i+1)\n";
1864 OS << " ErrorInfo = i+1;\n";
1866 OS << " ErrorInfo = ~0U;";
1867 OS << " // Otherwise, just reject this instance of the mnemonic.\n";
1868 OS << " OperandsValid = false;\n";
1872 OS << " if (!OperandsValid) continue;\n";
1874 // Emit check that the required features are available.
1875 OS << " if ((AvailableFeatures & it->RequiredFeatures) "
1876 << "!= it->RequiredFeatures) {\n";
1877 OS << " HadMatchOtherThanFeatures = true;\n";
1878 OS << " continue;\n";
1882 OS << " ConvertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands);\n";
1884 // Call the post-processing function, if used.
1885 std::string InsnCleanupFn =
1886 AsmParser->getValueAsString("AsmParserInstCleanup");
1887 if (!InsnCleanupFn.empty())
1888 OS << " " << InsnCleanupFn << "(Inst);\n";
1890 OS << " return Match_Success;\n";
1893 OS << " // Okay, we had no match. Try to return a useful error code.\n";
1894 OS << " if (HadMatchOtherThanFeatures) return Match_MissingFeature;\n";
1895 OS << " return Match_InvalidOperand;\n";
1898 OS << "#endif // GET_MATCHER_IMPLEMENTATION\n\n";