1 //===- AsmMatcherEmitter.cpp - Generate an assembly matcher ---------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This tablegen backend emits a target specifier matcher for converting parsed
11 // assembly operands in the MCInst structures.
13 // The input to the target specific matcher is a list of literal tokens and
14 // operands. The target specific parser should generally eliminate any syntax
15 // which is not relevant for matching; for example, comma tokens should have
16 // already been consumed and eliminated by the parser. Most instructions will
17 // end up with a single literal token (the instruction name) and some number of
20 // Some example inputs, for X86:
21 // 'addl' (immediate ...) (register ...)
22 // 'add' (immediate ...) (memory ...)
25 // The assembly matcher is responsible for converting this input into a precise
26 // machine instruction (i.e., an instruction with a well defined encoding). This
27 // mapping has several properties which complicate matching:
29 // - It may be ambiguous; many architectures can legally encode particular
30 // variants of an instruction in different ways (for example, using a smaller
31 // encoding for small immediates). Such ambiguities should never be
32 // arbitrarily resolved by the assembler, the assembler is always responsible
33 // for choosing the "best" available instruction.
35 // - It may depend on the subtarget or the assembler context. Instructions
36 // which are invalid for the current mode, but otherwise unambiguous (e.g.,
37 // an SSE instruction in a file being assembled for i486) should be accepted
38 // and rejected by the assembler front end. However, if the proper encoding
39 // for an instruction is dependent on the assembler context then the matcher
40 // is responsible for selecting the correct machine instruction for the
43 // The core matching algorithm attempts to exploit the regularity in most
44 // instruction sets to quickly determine the set of possibly matching
45 // instructions, and the simplify the generated code. Additionally, this helps
46 // to ensure that the ambiguities are intentionally resolved by the user.
48 // The matching is divided into two distinct phases:
50 // 1. Classification: Each operand is mapped to the unique set which (a)
51 // contains it, and (b) is the largest such subset for which a single
52 // instruction could match all members.
54 // For register classes, we can generate these subgroups automatically. For
55 // arbitrary operands, we expect the user to define the classes and their
56 // relations to one another (for example, 8-bit signed immediates as a
57 // subset of 32-bit immediates).
59 // By partitioning the operands in this way, we guarantee that for any
60 // tuple of classes, any single instruction must match either all or none
61 // of the sets of operands which could classify to that tuple.
63 // In addition, the subset relation amongst classes induces a partial order
64 // on such tuples, which we use to resolve ambiguities.
66 // FIXME: What do we do if a crazy case shows up where this is the wrong
69 // 2. The input can now be treated as a tuple of classes (static tokens are
70 // simple singleton sets). Each such tuple should generally map to a single
71 // instruction (we currently ignore cases where this isn't true, whee!!!),
72 // which we can emit a simple matcher for.
74 //===----------------------------------------------------------------------===//
76 #include "AsmMatcherEmitter.h"
77 #include "CodeGenTarget.h"
79 #include "llvm/ADT/OwningPtr.h"
80 #include "llvm/ADT/SmallVector.h"
81 #include "llvm/ADT/STLExtras.h"
82 #include "llvm/ADT/StringExtras.h"
83 #include "llvm/Support/CommandLine.h"
84 #include "llvm/Support/Debug.h"
90 static cl::opt<std::string>
91 MatchPrefix("match-prefix", cl::init(""),
92 cl::desc("Only match instructions with the given prefix"));
94 /// FlattenVariants - Flatten an .td file assembly string by selecting the
95 /// variant at index \arg N.
96 static std::string FlattenVariants(const std::string &AsmString,
98 StringRef Cur = AsmString;
102 // Find the start of the next variant string.
103 size_t VariantsStart = 0;
104 for (size_t e = Cur.size(); VariantsStart != e; ++VariantsStart)
105 if (Cur[VariantsStart] == '{' &&
106 (VariantsStart == 0 || (Cur[VariantsStart-1] != '$' &&
107 Cur[VariantsStart-1] != '\\')))
110 // Add the prefix to the result.
111 Res += Cur.slice(0, VariantsStart);
112 if (VariantsStart == Cur.size())
115 ++VariantsStart; // Skip the '{'.
117 // Scan to the end of the variants string.
118 size_t VariantsEnd = VariantsStart;
119 unsigned NestedBraces = 1;
120 for (size_t e = Cur.size(); VariantsEnd != e; ++VariantsEnd) {
121 if (Cur[VariantsEnd] == '}' && Cur[VariantsEnd-1] != '\\') {
122 if (--NestedBraces == 0)
124 } else if (Cur[VariantsEnd] == '{')
128 // Select the Nth variant (or empty).
129 StringRef Selection = Cur.slice(VariantsStart, VariantsEnd);
130 for (unsigned i = 0; i != N; ++i)
131 Selection = Selection.split('|').second;
132 Res += Selection.split('|').first;
134 assert(VariantsEnd != Cur.size() &&
135 "Unterminated variants in assembly string!");
136 Cur = Cur.substr(VariantsEnd + 1);
142 /// TokenizeAsmString - Tokenize a simplified assembly string.
143 static void TokenizeAsmString(StringRef AsmString,
144 SmallVectorImpl<StringRef> &Tokens) {
147 for (unsigned i = 0, e = AsmString.size(); i != e; ++i) {
148 switch (AsmString[i]) {
157 Tokens.push_back(AsmString.slice(Prev, i));
160 if (!isspace(AsmString[i]) && AsmString[i] != ',')
161 Tokens.push_back(AsmString.substr(i, 1));
167 Tokens.push_back(AsmString.slice(Prev, i));
171 assert(i != AsmString.size() && "Invalid quoted character");
172 Tokens.push_back(AsmString.substr(i, 1));
177 // If this isn't "${", treat like a normal token.
178 if (i + 1 == AsmString.size() || AsmString[i + 1] != '{') {
180 Tokens.push_back(AsmString.slice(Prev, i));
188 Tokens.push_back(AsmString.slice(Prev, i));
192 StringRef::iterator End =
193 std::find(AsmString.begin() + i, AsmString.end(), '}');
194 assert(End != AsmString.end() && "Missing brace in operand reference!");
195 size_t EndPos = End - AsmString.begin();
196 Tokens.push_back(AsmString.slice(i, EndPos+1));
206 if (InTok && Prev != AsmString.size())
207 Tokens.push_back(AsmString.substr(Prev));
210 static bool IsAssemblerInstruction(StringRef Name,
211 const CodeGenInstruction &CGI,
212 const SmallVectorImpl<StringRef> &Tokens) {
213 // Ignore "codegen only" instructions.
214 if (CGI.TheDef->getValueAsBit("isCodeGenOnly"))
217 // Ignore pseudo ops.
219 // FIXME: This is a hack; can we convert these instructions to set the
220 // "codegen only" bit instead?
221 if (const RecordVal *Form = CGI.TheDef->getValue("Form"))
222 if (Form->getValue()->getAsString() == "Pseudo")
225 // Ignore "Int_*" and "*_Int" instructions, which are internal aliases.
227 // FIXME: This is a total hack.
228 if (StringRef(Name).startswith("Int_") || StringRef(Name).endswith("_Int"))
231 // Ignore instructions with no .s string.
233 // FIXME: What are these?
234 if (CGI.AsmString.empty())
237 // FIXME: Hack; ignore any instructions with a newline in them.
238 if (std::find(CGI.AsmString.begin(),
239 CGI.AsmString.end(), '\n') != CGI.AsmString.end())
242 // Ignore instructions with attributes, these are always fake instructions for
243 // simplifying codegen.
245 // FIXME: Is this true?
247 // Also, check for instructions which reference the operand multiple times;
248 // this implies a constraint we would not honor.
249 std::set<std::string> OperandNames;
250 for (unsigned i = 1, e = Tokens.size(); i < e; ++i) {
251 if (Tokens[i][0] == '$' &&
252 std::find(Tokens[i].begin(),
253 Tokens[i].end(), ':') != Tokens[i].end()) {
255 errs() << "warning: '" << Name << "': "
256 << "ignoring instruction; operand with attribute '"
257 << Tokens[i] << "'\n";
262 if (Tokens[i][0] == '$' && !OperandNames.insert(Tokens[i]).second) {
263 std::string Err = "'" + Name.str() + "': " +
264 "invalid assembler instruction; tied operand '" + Tokens[i].str() + "'";
265 throw TGError(CGI.TheDef->getLoc(), Err);
274 struct SubtargetFeatureInfo;
276 /// ClassInfo - Helper class for storing the information about a particular
277 /// class of operands which can be matched.
280 /// Invalid kind, for use as a sentinel value.
283 /// The class for a particular token.
286 /// The (first) register class, subsequent register classes are
287 /// RegisterClass0+1, and so on.
290 /// The (first) user defined class, subsequent user defined classes are
291 /// UserClass0+1, and so on.
295 /// Kind - The class kind, which is either a predefined kind, or (UserClass0 +
296 /// N) for the Nth user defined class.
299 /// SuperClasses - The super classes of this class. Note that for simplicities
300 /// sake user operands only record their immediate super class, while register
301 /// operands include all superclasses.
302 std::vector<ClassInfo*> SuperClasses;
304 /// Name - The full class name, suitable for use in an enum.
307 /// ClassName - The unadorned generic name for this class (e.g., Token).
308 std::string ClassName;
310 /// ValueName - The name of the value this class represents; for a token this
311 /// is the literal token string, for an operand it is the TableGen class (or
312 /// empty if this is a derived class).
313 std::string ValueName;
315 /// PredicateMethod - The name of the operand method to test whether the
316 /// operand matches this class; this is not valid for Token or register kinds.
317 std::string PredicateMethod;
319 /// RenderMethod - The name of the operand method to add this operand to an
320 /// MCInst; this is not valid for Token or register kinds.
321 std::string RenderMethod;
323 /// For register classes, the records for all the registers in this class.
324 std::set<Record*> Registers;
327 /// isRegisterClass() - Check if this is a register class.
328 bool isRegisterClass() const {
329 return Kind >= RegisterClass0 && Kind < UserClass0;
332 /// isUserClass() - Check if this is a user defined class.
333 bool isUserClass() const {
334 return Kind >= UserClass0;
337 /// isRelatedTo - Check whether this class is "related" to \arg RHS. Classes
338 /// are related if they are in the same class hierarchy.
339 bool isRelatedTo(const ClassInfo &RHS) const {
340 // Tokens are only related to tokens.
341 if (Kind == Token || RHS.Kind == Token)
342 return Kind == Token && RHS.Kind == Token;
344 // Registers classes are only related to registers classes, and only if
345 // their intersection is non-empty.
346 if (isRegisterClass() || RHS.isRegisterClass()) {
347 if (!isRegisterClass() || !RHS.isRegisterClass())
350 std::set<Record*> Tmp;
351 std::insert_iterator< std::set<Record*> > II(Tmp, Tmp.begin());
352 std::set_intersection(Registers.begin(), Registers.end(),
353 RHS.Registers.begin(), RHS.Registers.end(),
359 // Otherwise we have two users operands; they are related if they are in the
360 // same class hierarchy.
362 // FIXME: This is an oversimplification, they should only be related if they
363 // intersect, however we don't have that information.
364 assert(isUserClass() && RHS.isUserClass() && "Unexpected class!");
365 const ClassInfo *Root = this;
366 while (!Root->SuperClasses.empty())
367 Root = Root->SuperClasses.front();
369 const ClassInfo *RHSRoot = &RHS;
370 while (!RHSRoot->SuperClasses.empty())
371 RHSRoot = RHSRoot->SuperClasses.front();
373 return Root == RHSRoot;
376 /// isSubsetOf - Test whether this class is a subset of \arg RHS;
377 bool isSubsetOf(const ClassInfo &RHS) const {
378 // This is a subset of RHS if it is the same class...
382 // ... or if any of its super classes are a subset of RHS.
383 for (std::vector<ClassInfo*>::const_iterator it = SuperClasses.begin(),
384 ie = SuperClasses.end(); it != ie; ++it)
385 if ((*it)->isSubsetOf(RHS))
391 /// operator< - Compare two classes.
392 bool operator<(const ClassInfo &RHS) const {
396 // Unrelated classes can be ordered by kind.
397 if (!isRelatedTo(RHS))
398 return Kind < RHS.Kind;
402 assert(0 && "Invalid kind!");
404 // Tokens are comparable by value.
406 // FIXME: Compare by enum value.
407 return ValueName < RHS.ValueName;
410 // This class preceeds the RHS if it is a proper subset of the RHS.
413 if (RHS.isSubsetOf(*this))
416 // Otherwise, order by name to ensure we have a total ordering.
417 return ValueName < RHS.ValueName;
422 /// InstructionInfo - Helper class for storing the necessary information for an
423 /// instruction which is capable of being matched.
424 struct InstructionInfo {
426 /// The unique class instance this operand should match.
429 /// The original operand this corresponds to, if any.
430 const CodeGenInstruction::OperandInfo *OperandInfo;
433 /// InstrName - The target name for this instruction.
434 std::string InstrName;
436 /// Instr - The instruction this matches.
437 const CodeGenInstruction *Instr;
439 /// AsmString - The assembly string for this instruction (with variants
441 std::string AsmString;
443 /// Tokens - The tokenized assembly pattern that this instruction matches.
444 SmallVector<StringRef, 4> Tokens;
446 /// Operands - The operands that this instruction matches.
447 SmallVector<Operand, 4> Operands;
449 /// Predicates - The required subtarget features to match this instruction.
450 SmallVector<SubtargetFeatureInfo*, 4> RequiredFeatures;
452 /// ConversionFnKind - The enum value which is passed to the generated
453 /// ConvertToMCInst to convert parsed operands into an MCInst for this
455 std::string ConversionFnKind;
457 /// operator< - Compare two instructions.
458 bool operator<(const InstructionInfo &RHS) const {
459 if (Operands.size() != RHS.Operands.size())
460 return Operands.size() < RHS.Operands.size();
462 // Compare lexicographically by operand. The matcher validates that other
463 // orderings wouldn't be ambiguous using \see CouldMatchAmiguouslyWith().
464 for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
465 if (*Operands[i].Class < *RHS.Operands[i].Class)
467 if (*RHS.Operands[i].Class < *Operands[i].Class)
474 /// CouldMatchAmiguouslyWith - Check whether this instruction could
475 /// ambiguously match the same set of operands as \arg RHS (without being a
476 /// strictly superior match).
477 bool CouldMatchAmiguouslyWith(const InstructionInfo &RHS) {
478 // The number of operands is unambiguous.
479 if (Operands.size() != RHS.Operands.size())
482 // Otherwise, make sure the ordering of the two instructions is unambiguous
483 // by checking that either (a) a token or operand kind discriminates them,
484 // or (b) the ordering among equivalent kinds is consistent.
486 // Tokens and operand kinds are unambiguous (assuming a correct target
488 for (unsigned i = 0, e = Operands.size(); i != e; ++i)
489 if (Operands[i].Class->Kind != RHS.Operands[i].Class->Kind ||
490 Operands[i].Class->Kind == ClassInfo::Token)
491 if (*Operands[i].Class < *RHS.Operands[i].Class ||
492 *RHS.Operands[i].Class < *Operands[i].Class)
495 // Otherwise, this operand could commute if all operands are equivalent, or
496 // there is a pair of operands that compare less than and a pair that
497 // compare greater than.
498 bool HasLT = false, HasGT = false;
499 for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
500 if (*Operands[i].Class < *RHS.Operands[i].Class)
502 if (*RHS.Operands[i].Class < *Operands[i].Class)
506 return !(HasLT ^ HasGT);
513 /// SubtargetFeatureInfo - Helper class for storing information on a subtarget
514 /// feature which participates in instruction matching.
515 struct SubtargetFeatureInfo {
516 /// \brief The predicate record for this feature.
519 /// \brief An unique index assigned to represent this feature.
522 /// \brief The name of the enumerated constant identifying this feature.
523 std::string EnumName;
526 class AsmMatcherInfo {
528 /// The tablegen AsmParser record.
531 /// The AsmParser "CommentDelimiter" value.
532 std::string CommentDelimiter;
534 /// The AsmParser "RegisterPrefix" value.
535 std::string RegisterPrefix;
537 /// The classes which are needed for matching.
538 std::vector<ClassInfo*> Classes;
540 /// The information on the instruction to match.
541 std::vector<InstructionInfo*> Instructions;
543 /// Map of Register records to their class information.
544 std::map<Record*, ClassInfo*> RegisterClasses;
546 /// Map of Predicate records to their subtarget information.
547 std::map<Record*, SubtargetFeatureInfo*> SubtargetFeatures;
550 /// Map of token to class information which has already been constructed.
551 std::map<std::string, ClassInfo*> TokenClasses;
553 /// Map of RegisterClass records to their class information.
554 std::map<Record*, ClassInfo*> RegisterClassClasses;
556 /// Map of AsmOperandClass records to their class information.
557 std::map<Record*, ClassInfo*> AsmOperandClasses;
560 /// getTokenClass - Lookup or create the class for the given token.
561 ClassInfo *getTokenClass(StringRef Token);
563 /// getOperandClass - Lookup or create the class for the given operand.
564 ClassInfo *getOperandClass(StringRef Token,
565 const CodeGenInstruction::OperandInfo &OI);
567 /// getSubtargetFeature - Lookup or create the subtarget feature info for the
569 SubtargetFeatureInfo *getSubtargetFeature(Record *Def) {
570 assert(Def->isSubClassOf("Predicate") && "Invalid predicate type!");
572 SubtargetFeatureInfo *&Entry = SubtargetFeatures[Def];
574 Entry = new SubtargetFeatureInfo;
576 Entry->Index = SubtargetFeatures.size() - 1;
577 Entry->EnumName = "Feature_" + Def->getName();
578 assert(Entry->Index < 32 && "Too many subtarget features!");
584 /// BuildRegisterClasses - Build the ClassInfo* instances for register
586 void BuildRegisterClasses(CodeGenTarget &Target,
587 std::set<std::string> &SingletonRegisterNames);
589 /// BuildOperandClasses - Build the ClassInfo* instances for user defined
591 void BuildOperandClasses(CodeGenTarget &Target);
594 AsmMatcherInfo(Record *_AsmParser);
596 /// BuildInfo - Construct the various tables used during matching.
597 void BuildInfo(CodeGenTarget &Target);
602 void InstructionInfo::dump() {
603 errs() << InstrName << " -- " << "flattened:\"" << AsmString << '\"'
605 for (unsigned i = 0, e = Tokens.size(); i != e; ++i) {
612 for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
613 Operand &Op = Operands[i];
614 errs() << " op[" << i << "] = " << Op.Class->ClassName << " - ";
615 if (Op.Class->Kind == ClassInfo::Token) {
616 errs() << '\"' << Tokens[i] << "\"\n";
620 if (!Op.OperandInfo) {
621 errs() << "(singleton register)\n";
625 const CodeGenInstruction::OperandInfo &OI = *Op.OperandInfo;
626 errs() << OI.Name << " " << OI.Rec->getName()
627 << " (" << OI.MIOperandNo << ", " << OI.MINumOperands << ")\n";
631 static std::string getEnumNameForToken(StringRef Str) {
634 for (StringRef::iterator it = Str.begin(), ie = Str.end(); it != ie; ++it) {
636 case '*': Res += "_STAR_"; break;
637 case '%': Res += "_PCT_"; break;
638 case ':': Res += "_COLON_"; break;
644 Res += "_" + utostr((unsigned) *it) + "_";
652 /// getRegisterRecord - Get the register record for \arg name, or 0.
653 static Record *getRegisterRecord(CodeGenTarget &Target, StringRef Name) {
654 for (unsigned i = 0, e = Target.getRegisters().size(); i != e; ++i) {
655 const CodeGenRegister &Reg = Target.getRegisters()[i];
656 if (Name == Reg.TheDef->getValueAsString("AsmName"))
663 ClassInfo *AsmMatcherInfo::getTokenClass(StringRef Token) {
664 ClassInfo *&Entry = TokenClasses[Token];
667 Entry = new ClassInfo();
668 Entry->Kind = ClassInfo::Token;
669 Entry->ClassName = "Token";
670 Entry->Name = "MCK_" + getEnumNameForToken(Token);
671 Entry->ValueName = Token;
672 Entry->PredicateMethod = "<invalid>";
673 Entry->RenderMethod = "<invalid>";
674 Classes.push_back(Entry);
681 AsmMatcherInfo::getOperandClass(StringRef Token,
682 const CodeGenInstruction::OperandInfo &OI) {
683 if (OI.Rec->isSubClassOf("RegisterClass")) {
684 ClassInfo *CI = RegisterClassClasses[OI.Rec];
687 PrintError(OI.Rec->getLoc(), "register class has no class info!");
688 throw std::string("ERROR: Missing register class!");
694 assert(OI.Rec->isSubClassOf("Operand") && "Unexpected operand!");
695 Record *MatchClass = OI.Rec->getValueAsDef("ParserMatchClass");
696 ClassInfo *CI = AsmOperandClasses[MatchClass];
699 PrintError(OI.Rec->getLoc(), "operand has no match class!");
700 throw std::string("ERROR: Missing match class!");
706 void AsmMatcherInfo::BuildRegisterClasses(CodeGenTarget &Target,
707 std::set<std::string>
708 &SingletonRegisterNames) {
709 std::vector<CodeGenRegisterClass> RegisterClasses;
710 std::vector<CodeGenRegister> Registers;
712 RegisterClasses = Target.getRegisterClasses();
713 Registers = Target.getRegisters();
715 // The register sets used for matching.
716 std::set< std::set<Record*> > RegisterSets;
718 // Gather the defined sets.
719 for (std::vector<CodeGenRegisterClass>::iterator it = RegisterClasses.begin(),
720 ie = RegisterClasses.end(); it != ie; ++it)
721 RegisterSets.insert(std::set<Record*>(it->Elements.begin(),
722 it->Elements.end()));
724 // Add any required singleton sets.
725 for (std::set<std::string>::iterator it = SingletonRegisterNames.begin(),
726 ie = SingletonRegisterNames.end(); it != ie; ++it)
727 if (Record *Rec = getRegisterRecord(Target, *it))
728 RegisterSets.insert(std::set<Record*>(&Rec, &Rec + 1));
730 // Introduce derived sets where necessary (when a register does not determine
731 // a unique register set class), and build the mapping of registers to the set
732 // they should classify to.
733 std::map<Record*, std::set<Record*> > RegisterMap;
734 for (std::vector<CodeGenRegister>::iterator it = Registers.begin(),
735 ie = Registers.end(); it != ie; ++it) {
736 CodeGenRegister &CGR = *it;
737 // Compute the intersection of all sets containing this register.
738 std::set<Record*> ContainingSet;
740 for (std::set< std::set<Record*> >::iterator it = RegisterSets.begin(),
741 ie = RegisterSets.end(); it != ie; ++it) {
742 if (!it->count(CGR.TheDef))
745 if (ContainingSet.empty()) {
748 std::set<Record*> Tmp;
749 std::swap(Tmp, ContainingSet);
750 std::insert_iterator< std::set<Record*> > II(ContainingSet,
751 ContainingSet.begin());
752 std::set_intersection(Tmp.begin(), Tmp.end(), it->begin(), it->end(),
757 if (!ContainingSet.empty()) {
758 RegisterSets.insert(ContainingSet);
759 RegisterMap.insert(std::make_pair(CGR.TheDef, ContainingSet));
763 // Construct the register classes.
764 std::map<std::set<Record*>, ClassInfo*> RegisterSetClasses;
766 for (std::set< std::set<Record*> >::iterator it = RegisterSets.begin(),
767 ie = RegisterSets.end(); it != ie; ++it, ++Index) {
768 ClassInfo *CI = new ClassInfo();
769 CI->Kind = ClassInfo::RegisterClass0 + Index;
770 CI->ClassName = "Reg" + utostr(Index);
771 CI->Name = "MCK_Reg" + utostr(Index);
773 CI->PredicateMethod = ""; // unused
774 CI->RenderMethod = "addRegOperands";
776 Classes.push_back(CI);
777 RegisterSetClasses.insert(std::make_pair(*it, CI));
780 // Find the superclasses; we could compute only the subgroup lattice edges,
781 // but there isn't really a point.
782 for (std::set< std::set<Record*> >::iterator it = RegisterSets.begin(),
783 ie = RegisterSets.end(); it != ie; ++it) {
784 ClassInfo *CI = RegisterSetClasses[*it];
785 for (std::set< std::set<Record*> >::iterator it2 = RegisterSets.begin(),
786 ie2 = RegisterSets.end(); it2 != ie2; ++it2)
788 std::includes(it2->begin(), it2->end(), it->begin(), it->end()))
789 CI->SuperClasses.push_back(RegisterSetClasses[*it2]);
792 // Name the register classes which correspond to a user defined RegisterClass.
793 for (std::vector<CodeGenRegisterClass>::iterator it = RegisterClasses.begin(),
794 ie = RegisterClasses.end(); it != ie; ++it) {
795 ClassInfo *CI = RegisterSetClasses[std::set<Record*>(it->Elements.begin(),
796 it->Elements.end())];
797 if (CI->ValueName.empty()) {
798 CI->ClassName = it->getName();
799 CI->Name = "MCK_" + it->getName();
800 CI->ValueName = it->getName();
802 CI->ValueName = CI->ValueName + "," + it->getName();
804 RegisterClassClasses.insert(std::make_pair(it->TheDef, CI));
807 // Populate the map for individual registers.
808 for (std::map<Record*, std::set<Record*> >::iterator it = RegisterMap.begin(),
809 ie = RegisterMap.end(); it != ie; ++it)
810 this->RegisterClasses[it->first] = RegisterSetClasses[it->second];
812 // Name the register classes which correspond to singleton registers.
813 for (std::set<std::string>::iterator it = SingletonRegisterNames.begin(),
814 ie = SingletonRegisterNames.end(); it != ie; ++it) {
815 if (Record *Rec = getRegisterRecord(Target, *it)) {
816 ClassInfo *CI = this->RegisterClasses[Rec];
817 assert(CI && "Missing singleton register class info!");
819 if (CI->ValueName.empty()) {
820 CI->ClassName = Rec->getName();
821 CI->Name = "MCK_" + Rec->getName();
822 CI->ValueName = Rec->getName();
824 CI->ValueName = CI->ValueName + "," + Rec->getName();
829 void AsmMatcherInfo::BuildOperandClasses(CodeGenTarget &Target) {
830 std::vector<Record*> AsmOperands;
831 AsmOperands = Records.getAllDerivedDefinitions("AsmOperandClass");
833 // Pre-populate AsmOperandClasses map.
834 for (std::vector<Record*>::iterator it = AsmOperands.begin(),
835 ie = AsmOperands.end(); it != ie; ++it)
836 AsmOperandClasses[*it] = new ClassInfo();
839 for (std::vector<Record*>::iterator it = AsmOperands.begin(),
840 ie = AsmOperands.end(); it != ie; ++it, ++Index) {
841 ClassInfo *CI = AsmOperandClasses[*it];
842 CI->Kind = ClassInfo::UserClass0 + Index;
844 ListInit *Supers = (*it)->getValueAsListInit("SuperClasses");
845 for (unsigned i = 0, e = Supers->getSize(); i != e; ++i) {
846 DefInit *DI = dynamic_cast<DefInit*>(Supers->getElement(i));
848 PrintError((*it)->getLoc(), "Invalid super class reference!");
852 ClassInfo *SC = AsmOperandClasses[DI->getDef()];
854 PrintError((*it)->getLoc(), "Invalid super class reference!");
856 CI->SuperClasses.push_back(SC);
858 CI->ClassName = (*it)->getValueAsString("Name");
859 CI->Name = "MCK_" + CI->ClassName;
860 CI->ValueName = (*it)->getName();
862 // Get or construct the predicate method name.
863 Init *PMName = (*it)->getValueInit("PredicateMethod");
864 if (StringInit *SI = dynamic_cast<StringInit*>(PMName)) {
865 CI->PredicateMethod = SI->getValue();
867 assert(dynamic_cast<UnsetInit*>(PMName) &&
868 "Unexpected PredicateMethod field!");
869 CI->PredicateMethod = "is" + CI->ClassName;
872 // Get or construct the render method name.
873 Init *RMName = (*it)->getValueInit("RenderMethod");
874 if (StringInit *SI = dynamic_cast<StringInit*>(RMName)) {
875 CI->RenderMethod = SI->getValue();
877 assert(dynamic_cast<UnsetInit*>(RMName) &&
878 "Unexpected RenderMethod field!");
879 CI->RenderMethod = "add" + CI->ClassName + "Operands";
882 AsmOperandClasses[*it] = CI;
883 Classes.push_back(CI);
887 AsmMatcherInfo::AsmMatcherInfo(Record *_AsmParser)
888 : AsmParser(_AsmParser),
889 CommentDelimiter(AsmParser->getValueAsString("CommentDelimiter")),
890 RegisterPrefix(AsmParser->getValueAsString("RegisterPrefix"))
894 void AsmMatcherInfo::BuildInfo(CodeGenTarget &Target) {
895 // Parse the instructions; we need to do this first so that we can gather the
896 // singleton register classes.
897 std::set<std::string> SingletonRegisterNames;
899 const std::vector<const CodeGenInstruction*> &InstrList =
900 Target.getInstructionsByEnumValue();
902 for (unsigned i = 0, e = InstrList.size(); i != e; ++i) {
903 const CodeGenInstruction &CGI = *InstrList[i];
905 if (!StringRef(CGI.TheDef->getName()).startswith(MatchPrefix))
908 OwningPtr<InstructionInfo> II(new InstructionInfo());
910 II->InstrName = CGI.TheDef->getName();
912 II->AsmString = FlattenVariants(CGI.AsmString, 0);
914 // Remove comments from the asm string.
915 if (!CommentDelimiter.empty()) {
916 size_t Idx = StringRef(II->AsmString).find(CommentDelimiter);
917 if (Idx != StringRef::npos)
918 II->AsmString = II->AsmString.substr(0, Idx);
921 TokenizeAsmString(II->AsmString, II->Tokens);
923 // Ignore instructions which shouldn't be matched.
924 if (!IsAssemblerInstruction(CGI.TheDef->getName(), CGI, II->Tokens))
927 // Collect singleton registers, if used.
928 if (!RegisterPrefix.empty()) {
929 for (unsigned i = 0, e = II->Tokens.size(); i != e; ++i) {
930 if (II->Tokens[i].startswith(RegisterPrefix)) {
931 StringRef RegName = II->Tokens[i].substr(RegisterPrefix.size());
932 Record *Rec = getRegisterRecord(Target, RegName);
935 std::string Err = "unable to find register for '" + RegName.str() +
936 "' (which matches register prefix)";
937 throw TGError(CGI.TheDef->getLoc(), Err);
940 SingletonRegisterNames.insert(RegName);
945 // Compute the require features.
946 ListInit *Predicates = CGI.TheDef->getValueAsListInit("Predicates");
947 for (unsigned i = 0, e = Predicates->getSize(); i != e; ++i) {
948 if (DefInit *Pred = dynamic_cast<DefInit*>(Predicates->getElement(i))) {
949 // Ignore OptForSize and OptForSpeed, they aren't really requirements,
950 // rather they are hints to isel.
952 // FIXME: Find better way to model this.
953 if (Pred->getDef()->getName() == "OptForSize" ||
954 Pred->getDef()->getName() == "OptForSpeed")
957 // FIXME: Total hack; for now, we just limit ourselves to In32BitMode
958 // and In64BitMode, because we aren't going to have the right feature
959 // masks for SSE and friends. We need to decide what we are going to do
960 // about CPU subtypes to implement this the right way.
961 if (Pred->getDef()->getName() != "In32BitMode" &&
962 Pred->getDef()->getName() != "In64BitMode")
965 II->RequiredFeatures.push_back(getSubtargetFeature(Pred->getDef()));
969 Instructions.push_back(II.take());
972 // Build info for the register classes.
973 BuildRegisterClasses(Target, SingletonRegisterNames);
975 // Build info for the user defined assembly operand classes.
976 BuildOperandClasses(Target);
978 // Build the instruction information.
979 for (std::vector<InstructionInfo*>::iterator it = Instructions.begin(),
980 ie = Instructions.end(); it != ie; ++it) {
981 InstructionInfo *II = *it;
983 for (unsigned i = 0, e = II->Tokens.size(); i != e; ++i) {
984 StringRef Token = II->Tokens[i];
986 // Check for singleton registers.
987 if (!RegisterPrefix.empty() && Token.startswith(RegisterPrefix)) {
988 StringRef RegName = II->Tokens[i].substr(RegisterPrefix.size());
989 InstructionInfo::Operand Op;
990 Op.Class = RegisterClasses[getRegisterRecord(Target, RegName)];
992 assert(Op.Class && Op.Class->Registers.size() == 1 &&
993 "Unexpected class for singleton register");
994 II->Operands.push_back(Op);
998 // Check for simple tokens.
999 if (Token[0] != '$') {
1000 InstructionInfo::Operand Op;
1001 Op.Class = getTokenClass(Token);
1003 II->Operands.push_back(Op);
1007 // Otherwise this is an operand reference.
1008 StringRef OperandName;
1009 if (Token[1] == '{')
1010 OperandName = Token.substr(2, Token.size() - 3);
1012 OperandName = Token.substr(1);
1014 // Map this token to an operand. FIXME: Move elsewhere.
1017 Idx = II->Instr->getOperandNamed(OperandName);
1019 throw std::string("error: unable to find operand: '" +
1020 OperandName.str() + "'");
1023 // FIXME: This is annoying, the named operand may be tied (e.g.,
1024 // XCHG8rm). What we want is the untied operand, which we now have to
1025 // grovel for. Only worry about this for single entry operands, we have to
1026 // clean this up anyway.
1027 const CodeGenInstruction::OperandInfo *OI = &II->Instr->OperandList[Idx];
1028 if (OI->Constraints[0].isTied()) {
1029 unsigned TiedOp = OI->Constraints[0].getTiedOperand();
1031 // The tied operand index is an MIOperand index, find the operand that
1033 for (unsigned i = 0, e = II->Instr->OperandList.size(); i != e; ++i) {
1034 if (II->Instr->OperandList[i].MIOperandNo == TiedOp) {
1035 OI = &II->Instr->OperandList[i];
1040 assert(OI && "Unable to find tied operand target!");
1043 InstructionInfo::Operand Op;
1044 Op.Class = getOperandClass(Token, *OI);
1045 Op.OperandInfo = OI;
1046 II->Operands.push_back(Op);
1050 // Reorder classes so that classes preceed super classes.
1051 std::sort(Classes.begin(), Classes.end(), less_ptr<ClassInfo>());
1054 static std::pair<unsigned, unsigned> *
1055 GetTiedOperandAtIndex(SmallVectorImpl<std::pair<unsigned, unsigned> > &List,
1057 for (unsigned i = 0, e = List.size(); i != e; ++i)
1058 if (Index == List[i].first)
1064 static void EmitConvertToMCInst(CodeGenTarget &Target,
1065 std::vector<InstructionInfo*> &Infos,
1067 // Write the convert function to a separate stream, so we can drop it after
1069 std::string ConvertFnBody;
1070 raw_string_ostream CvtOS(ConvertFnBody);
1072 // Function we have already generated.
1073 std::set<std::string> GeneratedFns;
1075 // Start the unified conversion function.
1077 CvtOS << "static void ConvertToMCInst(ConversionKind Kind, MCInst &Inst, "
1078 << "unsigned Opcode,\n"
1079 << " const SmallVectorImpl<MCParsedAsmOperand*"
1080 << "> &Operands) {\n";
1081 CvtOS << " Inst.setOpcode(Opcode);\n";
1082 CvtOS << " switch (Kind) {\n";
1083 CvtOS << " default:\n";
1085 // Start the enum, which we will generate inline.
1087 OS << "// Unified function for converting operants to MCInst instances.\n\n";
1088 OS << "enum ConversionKind {\n";
1090 // TargetOperandClass - This is the target's operand class, like X86Operand.
1091 std::string TargetOperandClass = Target.getName() + "Operand";
1093 for (std::vector<InstructionInfo*>::const_iterator it = Infos.begin(),
1094 ie = Infos.end(); it != ie; ++it) {
1095 InstructionInfo &II = **it;
1097 // Order the (class) operands by the order to convert them into an MCInst.
1098 SmallVector<std::pair<unsigned, unsigned>, 4> MIOperandList;
1099 for (unsigned i = 0, e = II.Operands.size(); i != e; ++i) {
1100 InstructionInfo::Operand &Op = II.Operands[i];
1102 MIOperandList.push_back(std::make_pair(Op.OperandInfo->MIOperandNo, i));
1105 // Find any tied operands.
1106 SmallVector<std::pair<unsigned, unsigned>, 4> TiedOperands;
1107 for (unsigned i = 0, e = II.Instr->OperandList.size(); i != e; ++i) {
1108 const CodeGenInstruction::OperandInfo &OpInfo = II.Instr->OperandList[i];
1109 for (unsigned j = 0, e = OpInfo.Constraints.size(); j != e; ++j) {
1110 const CodeGenInstruction::ConstraintInfo &CI = OpInfo.Constraints[j];
1112 TiedOperands.push_back(std::make_pair(OpInfo.MIOperandNo + j,
1113 CI.getTiedOperand()));
1117 std::sort(MIOperandList.begin(), MIOperandList.end());
1119 // Compute the total number of operands.
1120 unsigned NumMIOperands = 0;
1121 for (unsigned i = 0, e = II.Instr->OperandList.size(); i != e; ++i) {
1122 const CodeGenInstruction::OperandInfo &OI = II.Instr->OperandList[i];
1123 NumMIOperands = std::max(NumMIOperands,
1124 OI.MIOperandNo + OI.MINumOperands);
1127 // Build the conversion function signature.
1128 std::string Signature = "Convert";
1129 unsigned CurIndex = 0;
1130 for (unsigned i = 0, e = MIOperandList.size(); i != e; ++i) {
1131 InstructionInfo::Operand &Op = II.Operands[MIOperandList[i].second];
1132 assert(CurIndex <= Op.OperandInfo->MIOperandNo &&
1133 "Duplicate match for instruction operand!");
1135 // Skip operands which weren't matched by anything, this occurs when the
1136 // .td file encodes "implicit" operands as explicit ones.
1138 // FIXME: This should be removed from the MCInst structure.
1139 for (; CurIndex != Op.OperandInfo->MIOperandNo; ++CurIndex) {
1140 std::pair<unsigned, unsigned> *Tie = GetTiedOperandAtIndex(TiedOperands,
1143 Signature += "__Imp";
1145 Signature += "__Tie" + utostr(Tie->second);
1150 // Registers are always converted the same, don't duplicate the conversion
1151 // function based on them.
1153 // FIXME: We could generalize this based on the render method, if it
1155 if (Op.Class->isRegisterClass())
1158 Signature += Op.Class->ClassName;
1159 Signature += utostr(Op.OperandInfo->MINumOperands);
1160 Signature += "_" + utostr(MIOperandList[i].second);
1162 CurIndex += Op.OperandInfo->MINumOperands;
1165 // Add any trailing implicit operands.
1166 for (; CurIndex != NumMIOperands; ++CurIndex) {
1167 std::pair<unsigned, unsigned> *Tie = GetTiedOperandAtIndex(TiedOperands,
1170 Signature += "__Imp";
1172 Signature += "__Tie" + utostr(Tie->second);
1175 II.ConversionFnKind = Signature;
1177 // Check if we have already generated this signature.
1178 if (!GeneratedFns.insert(Signature).second)
1181 // If not, emit it now.
1183 // Add to the enum list.
1184 OS << " " << Signature << ",\n";
1186 // And to the convert function.
1187 CvtOS << " case " << Signature << ":\n";
1189 for (unsigned i = 0, e = MIOperandList.size(); i != e; ++i) {
1190 InstructionInfo::Operand &Op = II.Operands[MIOperandList[i].second];
1192 // Add the implicit operands.
1193 for (; CurIndex != Op.OperandInfo->MIOperandNo; ++CurIndex) {
1194 // See if this is a tied operand.
1195 std::pair<unsigned, unsigned> *Tie = GetTiedOperandAtIndex(TiedOperands,
1199 // If not, this is some implicit operand. Just assume it is a register
1201 CvtOS << " Inst.addOperand(MCOperand::CreateReg(0));\n";
1203 // Copy the tied operand.
1204 assert(Tie->first>Tie->second && "Tied operand preceeds its target!");
1205 CvtOS << " Inst.addOperand(Inst.getOperand("
1206 << Tie->second << "));\n";
1210 CvtOS << " ((" << TargetOperandClass << "*)Operands["
1211 << MIOperandList[i].second
1212 << "])->" << Op.Class->RenderMethod
1213 << "(Inst, " << Op.OperandInfo->MINumOperands << ");\n";
1214 CurIndex += Op.OperandInfo->MINumOperands;
1217 // And add trailing implicit operands.
1218 for (; CurIndex != NumMIOperands; ++CurIndex) {
1219 std::pair<unsigned, unsigned> *Tie = GetTiedOperandAtIndex(TiedOperands,
1223 // If not, this is some implicit operand. Just assume it is a register
1225 CvtOS << " Inst.addOperand(MCOperand::CreateReg(0));\n";
1227 // Copy the tied operand.
1228 assert(Tie->first>Tie->second && "Tied operand preceeds its target!");
1229 CvtOS << " Inst.addOperand(Inst.getOperand("
1230 << Tie->second << "));\n";
1234 CvtOS << " return;\n";
1237 // Finish the convert function.
1242 // Finish the enum, and drop the convert function after it.
1244 OS << " NumConversionVariants\n";
1250 /// EmitMatchClassEnumeration - Emit the enumeration for match class kinds.
1251 static void EmitMatchClassEnumeration(CodeGenTarget &Target,
1252 std::vector<ClassInfo*> &Infos,
1254 OS << "namespace {\n\n";
1256 OS << "/// MatchClassKind - The kinds of classes which participate in\n"
1257 << "/// instruction matching.\n";
1258 OS << "enum MatchClassKind {\n";
1259 OS << " InvalidMatchClass = 0,\n";
1260 for (std::vector<ClassInfo*>::iterator it = Infos.begin(),
1261 ie = Infos.end(); it != ie; ++it) {
1262 ClassInfo &CI = **it;
1263 OS << " " << CI.Name << ", // ";
1264 if (CI.Kind == ClassInfo::Token) {
1265 OS << "'" << CI.ValueName << "'\n";
1266 } else if (CI.isRegisterClass()) {
1267 if (!CI.ValueName.empty())
1268 OS << "register class '" << CI.ValueName << "'\n";
1270 OS << "derived register class\n";
1272 OS << "user defined class '" << CI.ValueName << "'\n";
1275 OS << " NumMatchClassKinds\n";
1281 /// EmitClassifyOperand - Emit the function to classify an operand.
1282 static void EmitClassifyOperand(CodeGenTarget &Target,
1283 AsmMatcherInfo &Info,
1285 OS << "static MatchClassKind ClassifyOperand(MCParsedAsmOperand *GOp) {\n"
1286 << " " << Target.getName() << "Operand &Operand = *("
1287 << Target.getName() << "Operand*)GOp;\n";
1290 OS << " if (Operand.isToken())\n";
1291 OS << " return MatchTokenString(Operand.getToken());\n\n";
1293 // Classify registers.
1295 // FIXME: Don't hardcode isReg, getReg.
1296 OS << " if (Operand.isReg()) {\n";
1297 OS << " switch (Operand.getReg()) {\n";
1298 OS << " default: return InvalidMatchClass;\n";
1299 for (std::map<Record*, ClassInfo*>::iterator
1300 it = Info.RegisterClasses.begin(), ie = Info.RegisterClasses.end();
1302 OS << " case " << Target.getName() << "::"
1303 << it->first->getName() << ": return " << it->second->Name << ";\n";
1307 // Classify user defined operands.
1308 for (std::vector<ClassInfo*>::iterator it = Info.Classes.begin(),
1309 ie = Info.Classes.end(); it != ie; ++it) {
1310 ClassInfo &CI = **it;
1312 if (!CI.isUserClass())
1315 OS << " // '" << CI.ClassName << "' class";
1316 if (!CI.SuperClasses.empty()) {
1317 OS << ", subclass of ";
1318 for (unsigned i = 0, e = CI.SuperClasses.size(); i != e; ++i) {
1320 OS << "'" << CI.SuperClasses[i]->ClassName << "'";
1321 assert(CI < *CI.SuperClasses[i] && "Invalid class relation!");
1326 OS << " if (Operand." << CI.PredicateMethod << "()) {\n";
1328 // Validate subclass relationships.
1329 if (!CI.SuperClasses.empty()) {
1330 for (unsigned i = 0, e = CI.SuperClasses.size(); i != e; ++i)
1331 OS << " assert(Operand." << CI.SuperClasses[i]->PredicateMethod
1332 << "() && \"Invalid class relationship!\");\n";
1335 OS << " return " << CI.Name << ";\n";
1338 OS << " return InvalidMatchClass;\n";
1342 /// EmitIsSubclass - Emit the subclass predicate function.
1343 static void EmitIsSubclass(CodeGenTarget &Target,
1344 std::vector<ClassInfo*> &Infos,
1346 OS << "/// IsSubclass - Compute whether \\arg A is a subclass of \\arg B.\n";
1347 OS << "static bool IsSubclass(MatchClassKind A, MatchClassKind B) {\n";
1348 OS << " if (A == B)\n";
1349 OS << " return true;\n\n";
1351 OS << " switch (A) {\n";
1352 OS << " default:\n";
1353 OS << " return false;\n";
1354 for (std::vector<ClassInfo*>::iterator it = Infos.begin(),
1355 ie = Infos.end(); it != ie; ++it) {
1356 ClassInfo &A = **it;
1358 if (A.Kind != ClassInfo::Token) {
1359 std::vector<StringRef> SuperClasses;
1360 for (std::vector<ClassInfo*>::iterator it = Infos.begin(),
1361 ie = Infos.end(); it != ie; ++it) {
1362 ClassInfo &B = **it;
1364 if (&A != &B && A.isSubsetOf(B))
1365 SuperClasses.push_back(B.Name);
1368 if (SuperClasses.empty())
1371 OS << "\n case " << A.Name << ":\n";
1373 if (SuperClasses.size() == 1) {
1374 OS << " return B == " << SuperClasses.back() << ";\n";
1378 OS << " switch (B) {\n";
1379 OS << " default: return false;\n";
1380 for (unsigned i = 0, e = SuperClasses.size(); i != e; ++i)
1381 OS << " case " << SuperClasses[i] << ": return true;\n";
1389 typedef std::pair<std::string, std::string> StringPair;
1391 /// FindFirstNonCommonLetter - Find the first character in the keys of the
1392 /// string pairs that is not shared across the whole set of strings. All
1393 /// strings are assumed to have the same length.
1395 FindFirstNonCommonLetter(const std::vector<const StringPair*> &Matches) {
1396 assert(!Matches.empty());
1397 for (unsigned i = 0, e = Matches[0]->first.size(); i != e; ++i) {
1398 // Check to see if letter i is the same across the set.
1399 char Letter = Matches[0]->first[i];
1401 for (unsigned str = 0, e = Matches.size(); str != e; ++str)
1402 if (Matches[str]->first[i] != Letter)
1406 return Matches[0]->first.size();
1409 /// EmitStringMatcherForChar - Given a set of strings that are known to be the
1410 /// same length and whose characters leading up to CharNo are the same, emit
1411 /// code to verify that CharNo and later are the same.
1413 /// \return - True if control can leave the emitted code fragment.
1414 static bool EmitStringMatcherForChar(const std::string &StrVariableName,
1415 const std::vector<const StringPair*> &Matches,
1416 unsigned CharNo, unsigned IndentCount,
1418 assert(!Matches.empty() && "Must have at least one string to match!");
1419 std::string Indent(IndentCount*2+4, ' ');
1421 // If we have verified that the entire string matches, we're done: output the
1423 if (CharNo == Matches[0]->first.size()) {
1424 assert(Matches.size() == 1 && "Had duplicate keys to match on");
1426 // FIXME: If Matches[0].first has embeded \n, this will be bad.
1427 OS << Indent << Matches[0]->second << "\t // \"" << Matches[0]->first
1432 // Bucket the matches by the character we are comparing.
1433 std::map<char, std::vector<const StringPair*> > MatchesByLetter;
1435 for (unsigned i = 0, e = Matches.size(); i != e; ++i)
1436 MatchesByLetter[Matches[i]->first[CharNo]].push_back(Matches[i]);
1439 // If we have exactly one bucket to match, see how many characters are common
1440 // across the whole set and match all of them at once.
1441 if (MatchesByLetter.size() == 1) {
1442 unsigned FirstNonCommonLetter = FindFirstNonCommonLetter(Matches);
1443 unsigned NumChars = FirstNonCommonLetter-CharNo;
1445 // Emit code to break out if the prefix doesn't match.
1446 if (NumChars == 1) {
1447 // Do the comparison with if (Str[1] != 'f')
1448 // FIXME: Need to escape general characters.
1449 OS << Indent << "if (" << StrVariableName << "[" << CharNo << "] != '"
1450 << Matches[0]->first[CharNo] << "')\n";
1451 OS << Indent << " break;\n";
1453 // Do the comparison with if (Str.substr(1,3) != "foo").
1454 // FIXME: Need to escape general strings.
1455 OS << Indent << "if (" << StrVariableName << ".substr(" << CharNo << ","
1456 << NumChars << ") != \"";
1457 OS << Matches[0]->first.substr(CharNo, NumChars) << "\")\n";
1458 OS << Indent << " break;\n";
1461 return EmitStringMatcherForChar(StrVariableName, Matches,
1462 FirstNonCommonLetter, IndentCount, OS);
1465 // Otherwise, we have multiple possible things, emit a switch on the
1467 OS << Indent << "switch (" << StrVariableName << "[" << CharNo << "]) {\n";
1468 OS << Indent << "default: break;\n";
1470 for (std::map<char, std::vector<const StringPair*> >::iterator LI =
1471 MatchesByLetter.begin(), E = MatchesByLetter.end(); LI != E; ++LI) {
1472 // TODO: escape hard stuff (like \n) if we ever care about it.
1473 OS << Indent << "case '" << LI->first << "':\t // "
1474 << LI->second.size() << " strings to match.\n";
1475 if (EmitStringMatcherForChar(StrVariableName, LI->second, CharNo+1,
1477 OS << Indent << " break;\n";
1480 OS << Indent << "}\n";
1485 /// EmitStringMatcher - Given a list of strings and code to execute when they
1486 /// match, output a simple switch tree to classify the input string.
1488 /// If a match is found, the code in Vals[i].second is executed; control must
1489 /// not exit this code fragment. If nothing matches, execution falls through.
1491 /// \param StrVariableName - The name of the variable to test.
1492 static void EmitStringMatcher(const std::string &StrVariableName,
1493 const std::vector<StringPair> &Matches,
1495 // First level categorization: group strings by length.
1496 std::map<unsigned, std::vector<const StringPair*> > MatchesByLength;
1498 for (unsigned i = 0, e = Matches.size(); i != e; ++i)
1499 MatchesByLength[Matches[i].first.size()].push_back(&Matches[i]);
1501 // Output a switch statement on length and categorize the elements within each
1503 OS << " switch (" << StrVariableName << ".size()) {\n";
1504 OS << " default: break;\n";
1506 for (std::map<unsigned, std::vector<const StringPair*> >::iterator LI =
1507 MatchesByLength.begin(), E = MatchesByLength.end(); LI != E; ++LI) {
1508 OS << " case " << LI->first << ":\t // " << LI->second.size()
1509 << " strings to match.\n";
1510 if (EmitStringMatcherForChar(StrVariableName, LI->second, 0, 0, OS))
1518 /// EmitMatchTokenString - Emit the function to match a token string to the
1519 /// appropriate match class value.
1520 static void EmitMatchTokenString(CodeGenTarget &Target,
1521 std::vector<ClassInfo*> &Infos,
1523 // Construct the match list.
1524 std::vector<StringPair> Matches;
1525 for (std::vector<ClassInfo*>::iterator it = Infos.begin(),
1526 ie = Infos.end(); it != ie; ++it) {
1527 ClassInfo &CI = **it;
1529 if (CI.Kind == ClassInfo::Token)
1530 Matches.push_back(StringPair(CI.ValueName, "return " + CI.Name + ";"));
1533 OS << "static MatchClassKind MatchTokenString(StringRef Name) {\n";
1535 EmitStringMatcher("Name", Matches, OS);
1537 OS << " return InvalidMatchClass;\n";
1541 /// EmitMatchRegisterName - Emit the function to match a string to the target
1542 /// specific register enum.
1543 static void EmitMatchRegisterName(CodeGenTarget &Target, Record *AsmParser,
1545 // Construct the match list.
1546 std::vector<StringPair> Matches;
1547 for (unsigned i = 0, e = Target.getRegisters().size(); i != e; ++i) {
1548 const CodeGenRegister &Reg = Target.getRegisters()[i];
1549 if (Reg.TheDef->getValueAsString("AsmName").empty())
1552 Matches.push_back(StringPair(Reg.TheDef->getValueAsString("AsmName"),
1553 "return " + utostr(i + 1) + ";"));
1556 OS << "static unsigned MatchRegisterName(StringRef Name) {\n";
1558 EmitStringMatcher("Name", Matches, OS);
1560 OS << " return 0;\n";
1564 /// EmitSubtargetFeatureFlagEnumeration - Emit the subtarget feature flag
1566 static void EmitSubtargetFeatureFlagEnumeration(CodeGenTarget &Target,
1567 AsmMatcherInfo &Info,
1569 OS << "// Flags for subtarget features that participate in "
1570 << "instruction matching.\n";
1571 OS << "enum SubtargetFeatureFlag {\n";
1572 for (std::map<Record*, SubtargetFeatureInfo*>::const_iterator
1573 it = Info.SubtargetFeatures.begin(),
1574 ie = Info.SubtargetFeatures.end(); it != ie; ++it) {
1575 SubtargetFeatureInfo &SFI = *it->second;
1576 OS << " " << SFI.EnumName << " = (1 << " << SFI.Index << "),\n";
1578 OS << " Feature_None = 0\n";
1582 /// EmitComputeAvailableFeatures - Emit the function to compute the list of
1583 /// available features given a subtarget.
1584 static void EmitComputeAvailableFeatures(CodeGenTarget &Target,
1585 AsmMatcherInfo &Info,
1587 std::string ClassName =
1588 Info.AsmParser->getValueAsString("AsmParserClassName");
1590 OS << "unsigned " << Target.getName() << ClassName << "::\n"
1591 << "ComputeAvailableFeatures(const " << Target.getName()
1592 << "Subtarget *Subtarget) const {\n";
1593 OS << " unsigned Features = 0;\n";
1594 for (std::map<Record*, SubtargetFeatureInfo*>::const_iterator
1595 it = Info.SubtargetFeatures.begin(),
1596 ie = Info.SubtargetFeatures.end(); it != ie; ++it) {
1597 SubtargetFeatureInfo &SFI = *it->second;
1598 OS << " if (" << SFI.TheDef->getValueAsString("CondString")
1600 OS << " Features |= " << SFI.EnumName << ";\n";
1602 OS << " return Features;\n";
1606 void AsmMatcherEmitter::run(raw_ostream &OS) {
1607 CodeGenTarget Target;
1608 Record *AsmParser = Target.getAsmParser();
1609 std::string ClassName = AsmParser->getValueAsString("AsmParserClassName");
1611 // Compute the information on the instructions to match.
1612 AsmMatcherInfo Info(AsmParser);
1613 Info.BuildInfo(Target);
1615 // Sort the instruction table using the partial order on classes. We use
1616 // stable_sort to ensure that ambiguous instructions are still
1617 // deterministically ordered.
1618 std::stable_sort(Info.Instructions.begin(), Info.Instructions.end(),
1619 less_ptr<InstructionInfo>());
1621 DEBUG_WITH_TYPE("instruction_info", {
1622 for (std::vector<InstructionInfo*>::iterator
1623 it = Info.Instructions.begin(), ie = Info.Instructions.end();
1628 // Check for ambiguous instructions.
1629 unsigned NumAmbiguous = 0;
1630 for (unsigned i = 0, e = Info.Instructions.size(); i != e; ++i) {
1631 for (unsigned j = i + 1; j != e; ++j) {
1632 InstructionInfo &A = *Info.Instructions[i];
1633 InstructionInfo &B = *Info.Instructions[j];
1635 if (A.CouldMatchAmiguouslyWith(B)) {
1636 DEBUG_WITH_TYPE("ambiguous_instrs", {
1637 errs() << "warning: ambiguous instruction match:\n";
1639 errs() << "\nis incomparable with:\n";
1648 DEBUG_WITH_TYPE("ambiguous_instrs", {
1649 errs() << "warning: " << NumAmbiguous
1650 << " ambiguous instructions!\n";
1653 // Write the output.
1655 EmitSourceFileHeader("Assembly Matcher Source Fragment", OS);
1657 // Emit the subtarget feature enumeration.
1658 EmitSubtargetFeatureFlagEnumeration(Target, Info, OS);
1660 // Emit the function to match a register name to number.
1661 EmitMatchRegisterName(Target, AsmParser, OS);
1663 OS << "#ifndef REGISTERS_ONLY\n\n";
1665 // Generate the unified function to convert operands into an MCInst.
1666 EmitConvertToMCInst(Target, Info.Instructions, OS);
1668 // Emit the enumeration for classes which participate in matching.
1669 EmitMatchClassEnumeration(Target, Info.Classes, OS);
1671 // Emit the routine to match token strings to their match class.
1672 EmitMatchTokenString(Target, Info.Classes, OS);
1674 // Emit the routine to classify an operand.
1675 EmitClassifyOperand(Target, Info, OS);
1677 // Emit the subclass predicate routine.
1678 EmitIsSubclass(Target, Info.Classes, OS);
1680 // Emit the available features compute function.
1681 EmitComputeAvailableFeatures(Target, Info, OS);
1683 // Finally, build the match function.
1685 size_t MaxNumOperands = 0;
1686 for (std::vector<InstructionInfo*>::const_iterator it =
1687 Info.Instructions.begin(), ie = Info.Instructions.end();
1689 MaxNumOperands = std::max(MaxNumOperands, (*it)->Operands.size());
1691 const std::string &MatchName =
1692 AsmParser->getValueAsString("MatchInstructionName");
1693 OS << "bool " << Target.getName() << ClassName << "::\n"
1695 << "(const SmallVectorImpl<MCParsedAsmOperand*> &Operands,\n";
1696 OS.indent(MatchName.size() + 1);
1697 OS << "MCInst &Inst) {\n";
1699 // Emit the static match table; unused classes get initalized to 0 which is
1700 // guaranteed to be InvalidMatchClass.
1702 // FIXME: We can reduce the size of this table very easily. First, we change
1703 // it so that store the kinds in separate bit-fields for each index, which
1704 // only needs to be the max width used for classes at that index (we also need
1705 // to reject based on this during classification). If we then make sure to
1706 // order the match kinds appropriately (putting mnemonics last), then we
1707 // should only end up using a few bits for each class, especially the ones
1708 // following the mnemonic.
1709 OS << " static const struct MatchEntry {\n";
1710 OS << " unsigned Opcode;\n";
1711 OS << " ConversionKind ConvertFn;\n";
1712 OS << " MatchClassKind Classes[" << MaxNumOperands << "];\n";
1713 OS << " unsigned RequiredFeatures;\n";
1714 OS << " } MatchTable[" << Info.Instructions.size() << "] = {\n";
1716 for (std::vector<InstructionInfo*>::const_iterator it =
1717 Info.Instructions.begin(), ie = Info.Instructions.end();
1719 InstructionInfo &II = **it;
1721 OS << " { " << Target.getName() << "::" << II.InstrName
1722 << ", " << II.ConversionFnKind << ", { ";
1723 for (unsigned i = 0, e = II.Operands.size(); i != e; ++i) {
1724 InstructionInfo::Operand &Op = II.Operands[i];
1727 OS << Op.Class->Name;
1731 // Write the required features mask.
1732 if (!II.RequiredFeatures.empty()) {
1733 for (unsigned i = 0, e = II.RequiredFeatures.size(); i != e; ++i) {
1735 OS << II.RequiredFeatures[i]->EnumName;
1746 // Emit code to get the available features.
1747 OS << " // Get the current feature set.\n";
1748 OS << " unsigned AvailableFeatures = getAvailableFeatures();\n\n";
1750 // Emit code to compute the class list for this operand vector.
1751 OS << " // Eliminate obvious mismatches.\n";
1752 OS << " if (Operands.size() > " << MaxNumOperands << ")\n";
1753 OS << " return true;\n\n";
1755 OS << " // Compute the class list for this operand vector.\n";
1756 OS << " MatchClassKind Classes[" << MaxNumOperands << "];\n";
1757 OS << " for (unsigned i = 0, e = Operands.size(); i != e; ++i) {\n";
1758 OS << " Classes[i] = ClassifyOperand(Operands[i]);\n\n";
1760 OS << " // Check for invalid operands before matching.\n";
1761 OS << " if (Classes[i] == InvalidMatchClass)\n";
1762 OS << " return true;\n";
1765 OS << " // Mark unused classes.\n";
1766 OS << " for (unsigned i = Operands.size(), e = " << MaxNumOperands << "; "
1767 << "i != e; ++i)\n";
1768 OS << " Classes[i] = InvalidMatchClass;\n\n";
1770 // Emit code to search the table.
1771 OS << " // Search the table.\n";
1772 OS << " for (const MatchEntry *it = MatchTable, "
1773 << "*ie = MatchTable + " << Info.Instructions.size()
1774 << "; it != ie; ++it) {\n";
1776 // Emit check that the required features are available.
1777 OS << " if ((AvailableFeatures & it->RequiredFeatures) "
1778 << "!= it->RequiredFeatures)\n";
1779 OS << " continue;\n";
1781 // Emit check that the subclasses match.
1782 for (unsigned i = 0; i != MaxNumOperands; ++i) {
1783 OS << " if (!IsSubclass(Classes["
1784 << i << "], it->Classes[" << i << "]))\n";
1785 OS << " continue;\n";
1788 OS << " ConvertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands);\n";
1790 // Call the post-processing function, if used.
1791 std::string InsnCleanupFn =
1792 AsmParser->getValueAsString("AsmParserInstCleanup");
1793 if (!InsnCleanupFn.empty())
1794 OS << " " << InsnCleanupFn << "(Inst);\n";
1796 OS << " return false;\n";
1799 OS << " return true;\n";
1802 OS << "#endif // REGISTERS_ONLY\n";