1 ; RUN: opt < %s -instcombine -S | FileCheck %s
2 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
4 define i16 @test1(float %f) {
8 ; CHECK-NOT: insertelement {{.*}} 0.00
9 ; CHECK-NOT: call {{.*}} @llvm.x86.sse.mul
10 ; CHECK-NOT: call {{.*}} @llvm.x86.sse.sub
12 %tmp = insertelement <4 x float> undef, float %f, i32 0 ; <<4 x float>> [#uses=1]
13 %tmp10 = insertelement <4 x float> %tmp, float 0.000000e+00, i32 1 ; <<4 x float>> [#uses=1]
14 %tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 2 ; <<4 x float>> [#uses=1]
15 %tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, i32 3 ; <<4 x float>> [#uses=1]
16 %tmp28 = tail call <4 x float> @llvm.x86.sse.sub.ss( <4 x float> %tmp12, <4 x float> < float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
17 %tmp37 = tail call <4 x float> @llvm.x86.sse.mul.ss( <4 x float> %tmp28, <4 x float> < float 5.000000e-01, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
18 %tmp48 = tail call <4 x float> @llvm.x86.sse.min.ss( <4 x float> %tmp37, <4 x float> < float 6.553500e+04, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
19 %tmp59 = tail call <4 x float> @llvm.x86.sse.max.ss( <4 x float> %tmp48, <4 x float> zeroinitializer ) ; <<4 x float>> [#uses=1]
20 %tmp.upgrd.1 = tail call i32 @llvm.x86.sse.cvttss2si( <4 x float> %tmp59 ) ; <i32> [#uses=1]
21 %tmp69 = trunc i32 %tmp.upgrd.1 to i16 ; <i16> [#uses=1]
25 define i32 @test2(float %f) {
26 ; CHECK-LABEL: @test2(
27 ; CHECK-NOT: insertelement
28 ; CHECK-NOT: extractelement
30 %tmp5 = fmul float %f, %f
31 %tmp9 = insertelement <4 x float> undef, float %tmp5, i32 0
32 %tmp10 = insertelement <4 x float> %tmp9, float 0.000000e+00, i32 1
33 %tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 2
34 %tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, i32 3
35 %tmp19 = bitcast <4 x float> %tmp12 to <4 x i32>
36 %tmp21 = extractelement <4 x i32> %tmp19, i32 0
40 define i64 @test3(float %f, double %d) {
41 ; CHECK-LABEL: @test3(
42 ; CHECK-NOT: insertelement {{.*}} 0.00
45 %v00 = insertelement <4 x float> undef, float %f, i32 0
46 %v01 = insertelement <4 x float> %v00, float 0.000000e+00, i32 1
47 %v02 = insertelement <4 x float> %v01, float 0.000000e+00, i32 2
48 %v03 = insertelement <4 x float> %v02, float 0.000000e+00, i32 3
49 %tmp0 = tail call i32 @llvm.x86.sse.cvtss2si(<4 x float> %v03)
50 %v10 = insertelement <4 x float> undef, float %f, i32 0
51 %v11 = insertelement <4 x float> %v10, float 0.000000e+00, i32 1
52 %v12 = insertelement <4 x float> %v11, float 0.000000e+00, i32 2
53 %v13 = insertelement <4 x float> %v12, float 0.000000e+00, i32 3
54 %tmp1 = tail call i64 @llvm.x86.sse.cvtss2si64(<4 x float> %v13)
55 %v20 = insertelement <4 x float> undef, float %f, i32 0
56 %v21 = insertelement <4 x float> %v20, float 0.000000e+00, i32 1
57 %v22 = insertelement <4 x float> %v21, float 0.000000e+00, i32 2
58 %v23 = insertelement <4 x float> %v22, float 0.000000e+00, i32 3
59 %tmp2 = tail call i32 @llvm.x86.sse.cvttss2si(<4 x float> %v23)
60 %v30 = insertelement <4 x float> undef, float %f, i32 0
61 %v31 = insertelement <4 x float> %v30, float 0.000000e+00, i32 1
62 %v32 = insertelement <4 x float> %v31, float 0.000000e+00, i32 2
63 %v33 = insertelement <4 x float> %v32, float 0.000000e+00, i32 3
64 %tmp3 = tail call i64 @llvm.x86.sse.cvttss2si64(<4 x float> %v33)
65 %v40 = insertelement <2 x double> undef, double %d, i32 0
66 %v41 = insertelement <2 x double> %v40, double 0.000000e+00, i32 1
67 %tmp4 = tail call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> %v41)
68 %v50 = insertelement <2 x double> undef, double %d, i32 0
69 %v51 = insertelement <2 x double> %v50, double 0.000000e+00, i32 1
70 %tmp5 = tail call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %v51)
71 %v60 = insertelement <2 x double> undef, double %d, i32 0
72 %v61 = insertelement <2 x double> %v60, double 0.000000e+00, i32 1
73 %tmp6 = tail call i32 @llvm.x86.sse2.cvttsd2si(<2 x double> %v61)
74 %v70 = insertelement <2 x double> undef, double %d, i32 0
75 %v71 = insertelement <2 x double> %v70, double 0.000000e+00, i32 1
76 %tmp7 = tail call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> %v71)
77 %tmp8 = add i32 %tmp0, %tmp2
78 %tmp9 = add i32 %tmp4, %tmp6
79 %tmp10 = add i32 %tmp8, %tmp9
80 %tmp11 = sext i32 %tmp10 to i64
81 %tmp12 = add i64 %tmp1, %tmp3
82 %tmp13 = add i64 %tmp5, %tmp7
83 %tmp14 = add i64 %tmp12, %tmp13
84 %tmp15 = add i64 %tmp11, %tmp14
88 define void @get_image() nounwind {
89 ; CHECK-LABEL: @get_image(
90 ; CHECK-NOT: extractelement
93 %0 = call i32 @fgetc(i8* null) nounwind ; <i32> [#uses=1]
94 %1 = trunc i32 %0 to i8 ; <i8> [#uses=1]
95 %tmp2 = insertelement <100 x i8> zeroinitializer, i8 %1, i32 1 ; <<100 x i8>> [#uses=1]
96 %tmp1 = extractelement <100 x i8> %tmp2, i32 0 ; <i8> [#uses=1]
97 %2 = icmp eq i8 %tmp1, 80 ; <i1> [#uses=1]
98 br i1 %2, label %bb2, label %bb3
100 bb2: ; preds = %entry
103 bb3: ; preds = %bb2, %entry
108 define void @vac(<4 x float>* nocapture %a) nounwind {
113 %tmp1 = load <4 x float>, <4 x float>* %a ; <<4 x float>> [#uses=1]
114 %vecins = insertelement <4 x float> %tmp1, float 0.000000e+00, i32 0 ; <<4 x float>> [#uses=1]
115 %vecins4 = insertelement <4 x float> %vecins, float 0.000000e+00, i32 1; <<4 x float>> [#uses=1]
116 %vecins6 = insertelement <4 x float> %vecins4, float 0.000000e+00, i32 2; <<4 x float>> [#uses=1]
117 %vecins8 = insertelement <4 x float> %vecins6, float 0.000000e+00, i32 3; <<4 x float>> [#uses=1]
118 store <4 x float> %vecins8, <4 x float>* %a
122 declare i32 @fgetc(i8*)
124 declare <4 x float> @llvm.x86.sse.sub.ss(<4 x float>, <4 x float>)
126 declare <4 x float> @llvm.x86.sse.mul.ss(<4 x float>, <4 x float>)
128 declare <4 x float> @llvm.x86.sse.min.ss(<4 x float>, <4 x float>)
130 declare <4 x float> @llvm.x86.sse.max.ss(<4 x float>, <4 x float>)
132 declare i32 @llvm.x86.sse.cvtss2si(<4 x float>)
133 declare i64 @llvm.x86.sse.cvtss2si64(<4 x float>)
134 declare i32 @llvm.x86.sse.cvttss2si(<4 x float>)
135 declare i64 @llvm.x86.sse.cvttss2si64(<4 x float>)
136 declare i32 @llvm.x86.sse2.cvtsd2si(<2 x double>)
137 declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>)
138 declare i32 @llvm.x86.sse2.cvttsd2si(<2 x double>)
139 declare i64 @llvm.x86.sse2.cvttsd2si64(<2 x double>)
141 define <4 x float> @dead_shuffle_elt(<4 x float> %x, <2 x float> %y) nounwind {
143 ; CHECK-LABEL: define <4 x float> @dead_shuffle_elt(
144 ; CHECK: shufflevector <2 x float> %y, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
145 %shuffle.i = shufflevector <2 x float> %y, <2 x float> %y, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
146 %shuffle9.i = shufflevector <4 x float> %x, <4 x float> %shuffle.i, <4 x i32> <i32 4, i32 5, i32 2, i32 3>
147 ret <4 x float> %shuffle9.i
150 define <2 x float> @test_fptrunc(double %f) {
151 ; CHECK-LABEL: @test_fptrunc(
152 ; CHECK: insertelement
153 ; CHECK: insertelement
154 ; CHECK-NOT: insertelement
155 %tmp9 = insertelement <4 x double> undef, double %f, i32 0
156 %tmp10 = insertelement <4 x double> %tmp9, double 0.000000e+00, i32 1
157 %tmp11 = insertelement <4 x double> %tmp10, double 0.000000e+00, i32 2
158 %tmp12 = insertelement <4 x double> %tmp11, double 0.000000e+00, i32 3
159 %tmp5 = fptrunc <4 x double> %tmp12 to <4 x float>
160 %ret = shufflevector <4 x float> %tmp5, <4 x float> undef, <2 x i32> <i32 0, i32 1>
164 define <2 x double> @test_fpext(float %f) {
165 ; CHECK-LABEL: @test_fpext(
166 ; CHECK: insertelement
167 ; CHECK: insertelement
168 ; CHECK-NOT: insertelement
169 %tmp9 = insertelement <4 x float> undef, float %f, i32 0
170 %tmp10 = insertelement <4 x float> %tmp9, float 0.000000e+00, i32 1
171 %tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 2
172 %tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, i32 3
173 %tmp5 = fpext <4 x float> %tmp12 to <4 x double>
174 %ret = shufflevector <4 x double> %tmp5, <4 x double> undef, <2 x i32> <i32 0, i32 1>
175 ret <2 x double> %ret
178 define <4 x float> @test_select(float %f, float %g) {
179 ; CHECK-LABEL: @test_select(
180 ; CHECK: %a0 = insertelement <4 x float> undef, float %f, i32 0
181 ; CHECK-NOT: insertelement
182 ; CHECK: %a3 = insertelement <4 x float> %a0, float 3.000000e+00, i32 3
183 ; CHECK-NOT: insertelement
184 ; CHECK: %ret = select <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x float> %a3, <4 x float> <float undef, float 4.000000e+00, float 5.000000e+00, float undef>
185 %a0 = insertelement <4 x float> undef, float %f, i32 0
186 %a1 = insertelement <4 x float> %a0, float 1.000000e+00, i32 1
187 %a2 = insertelement <4 x float> %a1, float 2.000000e+00, i32 2
188 %a3 = insertelement <4 x float> %a2, float 3.000000e+00, i32 3
189 %b0 = insertelement <4 x float> undef, float %g, i32 0
190 %b1 = insertelement <4 x float> %b0, float 4.000000e+00, i32 1
191 %b2 = insertelement <4 x float> %b1, float 5.000000e+00, i32 2
192 %b3 = insertelement <4 x float> %b2, float 6.000000e+00, i32 3
193 %ret = select <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x float> %a3, <4 x float> %b3
197 declare <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float>, <4 x i32>)
198 define <4 x float> @test_vpermilvar_ps(<4 x float> %v) {
199 ; CHECK-LABEL: @test_vpermilvar_ps(
200 ; CHECK: shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
201 %a = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %v, <4 x i32> <i32 3, i32 2, i32 1, i32 0>)
205 declare <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float>, <8 x i32>)
206 define <8 x float> @test_vpermilvar_ps_256(<8 x float> %v) {
207 ; CHECK-LABEL: @test_vpermilvar_ps_256(
208 ; CHECK: shufflevector <8 x float> %v, <8 x float> undef, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4>
209 %a = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %v, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>)
213 declare <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double>, <2 x i64>)
214 define <2 x double> @test_vpermilvar_pd(<2 x double> %v) {
215 ; CHECK-LABEL: @test_vpermilvar_pd(
216 ; CHECK: shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> <i32 1, i32 0>
217 %a = tail call <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double> %v, <2 x i64> <i64 2, i64 0>)
221 declare <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double>, <4 x i64>)
222 define <4 x double> @test_vpermilvar_pd_256(<4 x double> %v) {
223 ; CHECK-LABEL: @test_vpermilvar_pd_256(
224 ; CHECK: shufflevector <4 x double> %v, <4 x double> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
225 %a = tail call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> %v, <4 x i64> <i64 3, i64 1, i64 2, i64 0>)
229 define <4 x float> @test_vpermilvar_ps_zero(<4 x float> %v) {
230 ; CHECK-LABEL: @test_vpermilvar_ps_zero(
231 ; CHECK: shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> zeroinitializer
232 %a = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %v, <4 x i32> zeroinitializer)
236 define <8 x float> @test_vpermilvar_ps_256_zero(<8 x float> %v) {
237 ; CHECK-LABEL: @test_vpermilvar_ps_256_zero(
238 ; CHECK: shufflevector <8 x float> %v, <8 x float> undef, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4>
239 %a = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %v, <8 x i32> zeroinitializer)
243 define <2 x double> @test_vpermilvar_pd_zero(<2 x double> %v) {
244 ; CHECK-LABEL: @test_vpermilvar_pd_zero(
245 ; CHECK: shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> zeroinitializer
246 %a = tail call <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double> %v, <2 x i64> zeroinitializer)
250 define <4 x double> @test_vpermilvar_pd_256_zero(<4 x double> %v) {
251 ; CHECK-LABEL: @test_vpermilvar_pd_256_zero(
252 ; CHECK: shufflevector <4 x double> %v, <4 x double> undef, <4 x i32> <i32 0, i32 0, i32 2, i32 2>
253 %a = tail call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> %v, <4 x i64> zeroinitializer)
257 define <2 x i64> @test_sse2_1() nounwind readnone uwtable {
258 %S = bitcast i32 1 to i32
259 %1 = zext i32 %S to i64
260 %2 = insertelement <2 x i64> undef, i64 %1, i32 0
261 %3 = insertelement <2 x i64> %2, i64 0, i32 1
262 %4 = bitcast <2 x i64> %3 to <8 x i16>
263 %5 = tail call <8 x i16> @llvm.x86.sse2.psll.w(<8 x i16> <i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, <8 x i16> %4)
264 %6 = bitcast <8 x i16> %5 to <4 x i32>
265 %7 = bitcast <2 x i64> %3 to <4 x i32>
266 %8 = tail call <4 x i32> @llvm.x86.sse2.psll.d(<4 x i32> %6, <4 x i32> %7)
267 %9 = bitcast <4 x i32> %8 to <2 x i64>
268 %10 = tail call <2 x i64> @llvm.x86.sse2.psll.q(<2 x i64> %9, <2 x i64> %3)
269 %11 = bitcast <2 x i64> %10 to <8 x i16>
270 %12 = tail call <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16> %11, i32 %S)
271 %13 = bitcast <8 x i16> %12 to <4 x i32>
272 %14 = tail call <4 x i32> @llvm.x86.sse2.pslli.d(<4 x i32> %13, i32 %S)
273 %15 = bitcast <4 x i32> %14 to <2 x i64>
274 %16 = tail call <2 x i64> @llvm.x86.sse2.pslli.q(<2 x i64> %15, i32 %S)
277 ; CHECK: ret <2 x i64> <i64 72058418680037440, i64 144117112246370624>
280 define <4 x i64> @test_avx2_1() nounwind readnone uwtable {
281 %S = bitcast i32 1 to i32
282 %1 = zext i32 %S to i64
283 %2 = insertelement <2 x i64> undef, i64 %1, i32 0
284 %3 = insertelement <2 x i64> %2, i64 0, i32 1
285 %4 = bitcast <2 x i64> %3 to <8 x i16>
286 %5 = tail call <16 x i16> @llvm.x86.avx2.psll.w(<16 x i16> <i16 1, i16 0, i16 0, i16 0, i16 2, i16 0, i16 0, i16 0, i16 3, i16 0, i16 0, i16 0, i16 4, i16 0, i16 0, i16 0>, <8 x i16> %4)
287 %6 = bitcast <16 x i16> %5 to <8 x i32>
288 %7 = bitcast <2 x i64> %3 to <4 x i32>
289 %8 = tail call <8 x i32> @llvm.x86.avx2.psll.d(<8 x i32> %6, <4 x i32> %7)
290 %9 = bitcast <8 x i32> %8 to <4 x i64>
291 %10 = tail call <4 x i64> @llvm.x86.avx2.psll.q(<4 x i64> %9, <2 x i64> %3)
292 %11 = bitcast <4 x i64> %10 to <16 x i16>
293 %12 = tail call <16 x i16> @llvm.x86.avx2.pslli.w(<16 x i16> %11, i32 %S)
294 %13 = bitcast <16 x i16> %12 to <8 x i32>
295 %14 = tail call <8 x i32> @llvm.x86.avx2.pslli.d(<8 x i32> %13, i32 %S)
296 %15 = bitcast <8 x i32> %14 to <4 x i64>
297 %16 = tail call <4 x i64> @llvm.x86.avx2.pslli.q(<4 x i64> %15, i32 %S)
300 ; CHECK: ret <4 x i64> <i64 64, i64 128, i64 192, i64 256>
303 define <2 x i64> @test_sse2_0() nounwind readnone uwtable {
304 %S = bitcast i32 128 to i32
305 %1 = zext i32 %S to i64
306 %2 = insertelement <2 x i64> undef, i64 %1, i32 0
307 %3 = insertelement <2 x i64> %2, i64 0, i32 1
308 %4 = bitcast <2 x i64> %3 to <8 x i16>
309 %5 = tail call <8 x i16> @llvm.x86.sse2.psll.w(<8 x i16> <i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, <8 x i16> %4)
310 %6 = bitcast <8 x i16> %5 to <4 x i32>
311 %7 = bitcast <2 x i64> %3 to <4 x i32>
312 %8 = tail call <4 x i32> @llvm.x86.sse2.psll.d(<4 x i32> %6, <4 x i32> %7)
313 %9 = bitcast <4 x i32> %8 to <2 x i64>
314 %10 = tail call <2 x i64> @llvm.x86.sse2.psll.q(<2 x i64> %9, <2 x i64> %3)
315 %11 = bitcast <2 x i64> %10 to <8 x i16>
316 %12 = tail call <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16> %11, i32 %S)
317 %13 = bitcast <8 x i16> %12 to <4 x i32>
318 %14 = tail call <4 x i32> @llvm.x86.sse2.pslli.d(<4 x i32> %13, i32 %S)
319 %15 = bitcast <4 x i32> %14 to <2 x i64>
320 %16 = tail call <2 x i64> @llvm.x86.sse2.pslli.q(<2 x i64> %15, i32 %S)
323 ; CHECK: ret <2 x i64> zeroinitializer
326 define <4 x i64> @test_avx2_0() nounwind readnone uwtable {
327 %S = bitcast i32 128 to i32
328 %1 = zext i32 %S to i64
329 %2 = insertelement <2 x i64> undef, i64 %1, i32 0
330 %3 = insertelement <2 x i64> %2, i64 0, i32 1
331 %4 = bitcast <2 x i64> %3 to <8 x i16>
332 %5 = tail call <16 x i16> @llvm.x86.avx2.psll.w(<16 x i16> <i16 1, i16 0, i16 0, i16 0, i16 2, i16 0, i16 0, i16 0, i16 3, i16 0, i16 0, i16 0, i16 4, i16 0, i16 0, i16 0>, <8 x i16> %4)
333 %6 = bitcast <16 x i16> %5 to <8 x i32>
334 %7 = bitcast <2 x i64> %3 to <4 x i32>
335 %8 = tail call <8 x i32> @llvm.x86.avx2.psll.d(<8 x i32> %6, <4 x i32> %7)
336 %9 = bitcast <8 x i32> %8 to <4 x i64>
337 %10 = tail call <4 x i64> @llvm.x86.avx2.psll.q(<4 x i64> %9, <2 x i64> %3)
338 %11 = bitcast <4 x i64> %10 to <16 x i16>
339 %12 = tail call <16 x i16> @llvm.x86.avx2.pslli.w(<16 x i16> %11, i32 %S)
340 %13 = bitcast <16 x i16> %12 to <8 x i32>
341 %14 = tail call <8 x i32> @llvm.x86.avx2.pslli.d(<8 x i32> %13, i32 %S)
342 %15 = bitcast <8 x i32> %14 to <4 x i64>
343 %16 = tail call <4 x i64> @llvm.x86.avx2.pslli.q(<4 x i64> %15, i32 %S)
346 ; CHECK: ret <4 x i64> zeroinitializer
348 define <2 x i64> @test_sse2_psrl_1() nounwind readnone uwtable {
349 %S = bitcast i32 1 to i32
350 %1 = zext i32 %S to i64
351 %2 = insertelement <2 x i64> undef, i64 %1, i32 0
352 %3 = insertelement <2 x i64> %2, i64 0, i32 1
353 %4 = bitcast <2 x i64> %3 to <8 x i16>
354 %5 = tail call <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16> <i16 16, i16 32, i16 64, i16 128, i16 256, i16 512, i16 1024, i16 2048>, <8 x i16> %4)
355 %6 = bitcast <8 x i16> %5 to <4 x i32>
356 %7 = bitcast <2 x i64> %3 to <4 x i32>
357 %8 = tail call <4 x i32> @llvm.x86.sse2.psrl.d(<4 x i32> %6, <4 x i32> %7)
358 %9 = bitcast <4 x i32> %8 to <2 x i64>
359 %10 = tail call <2 x i64> @llvm.x86.sse2.psrl.q(<2 x i64> %9, <2 x i64> %3)
360 %11 = bitcast <2 x i64> %10 to <8 x i16>
361 %12 = tail call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> %11, i32 %S)
362 %13 = bitcast <8 x i16> %12 to <4 x i32>
363 %14 = tail call <4 x i32> @llvm.x86.sse2.psrli.d(<4 x i32> %13, i32 %S)
364 %15 = bitcast <4 x i32> %14 to <2 x i64>
365 %16 = tail call <2 x i64> @llvm.x86.sse2.psrli.q(<2 x i64> %15, i32 %S)
367 ; CHECK: test_sse2_psrl_1
368 ; CHECK: ret <2 x i64> <i64 562954248421376, i64 9007267974742020>
371 define <4 x i64> @test_avx2_psrl_1() nounwind readnone uwtable {
372 %S = bitcast i32 1 to i32
373 %1 = zext i32 %S to i64
374 %2 = insertelement <2 x i64> undef, i64 %1, i32 0
375 %3 = insertelement <2 x i64> %2, i64 0, i32 1
376 %4 = bitcast <2 x i64> %3 to <8 x i16>
377 %5 = tail call <16 x i16> @llvm.x86.avx2.psrl.w(<16 x i16> <i16 1024, i16 0, i16 0, i16 0, i16 2048, i16 0, i16 0, i16 0, i16 4096, i16 0, i16 0, i16 0, i16 8192, i16 0, i16 0, i16 0>, <8 x i16> %4)
378 %6 = bitcast <16 x i16> %5 to <8 x i32>
379 %7 = bitcast <2 x i64> %3 to <4 x i32>
380 %8 = tail call <8 x i32> @llvm.x86.avx2.psrl.d(<8 x i32> %6, <4 x i32> %7)
381 %9 = bitcast <8 x i32> %8 to <4 x i64>
382 %10 = tail call <4 x i64> @llvm.x86.avx2.psrl.q(<4 x i64> %9, <2 x i64> %3)
383 %11 = bitcast <4 x i64> %10 to <16 x i16>
384 %12 = tail call <16 x i16> @llvm.x86.avx2.psrli.w(<16 x i16> %11, i32 %S)
385 %13 = bitcast <16 x i16> %12 to <8 x i32>
386 %14 = tail call <8 x i32> @llvm.x86.avx2.psrli.d(<8 x i32> %13, i32 %S)
387 %15 = bitcast <8 x i32> %14 to <4 x i64>
388 %16 = tail call <4 x i64> @llvm.x86.avx2.psrli.q(<4 x i64> %15, i32 %S)
390 ; CHECK: test_avx2_psrl_1
391 ; CHECK: ret <4 x i64> <i64 16, i64 32, i64 64, i64 128>
394 define <2 x i64> @test_sse2_psrl_0() nounwind readnone uwtable {
395 %S = bitcast i32 128 to i32
396 %1 = zext i32 %S to i64
397 %2 = insertelement <2 x i64> undef, i64 %1, i32 0
398 %3 = insertelement <2 x i64> %2, i64 0, i32 1
399 %4 = bitcast <2 x i64> %3 to <8 x i16>
400 %5 = tail call <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16> <i16 32, i16 64, i16 128, i16 256, i16 512, i16 1024, i16 2048, i16 4096>, <8 x i16> %4)
401 %6 = bitcast <8 x i16> %5 to <4 x i32>
402 %7 = bitcast <2 x i64> %3 to <4 x i32>
403 %8 = tail call <4 x i32> @llvm.x86.sse2.psrl.d(<4 x i32> %6, <4 x i32> %7)
404 %9 = bitcast <4 x i32> %8 to <2 x i64>
405 %10 = tail call <2 x i64> @llvm.x86.sse2.psrl.q(<2 x i64> %9, <2 x i64> %3)
406 %11 = bitcast <2 x i64> %10 to <8 x i16>
407 %12 = tail call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> %11, i32 %S)
408 %13 = bitcast <8 x i16> %12 to <4 x i32>
409 %14 = tail call <4 x i32> @llvm.x86.sse2.psrli.d(<4 x i32> %13, i32 %S)
410 %15 = bitcast <4 x i32> %14 to <2 x i64>
411 %16 = tail call <2 x i64> @llvm.x86.sse2.psrli.q(<2 x i64> %15, i32 %S)
413 ; CHECK: test_sse2_psrl_0
414 ; CHECK: ret <2 x i64> zeroinitializer
417 define <4 x i64> @test_avx2_psrl_0() nounwind readnone uwtable {
418 %S = bitcast i32 128 to i32
419 %1 = zext i32 %S to i64
420 %2 = insertelement <2 x i64> undef, i64 %1, i32 0
421 %3 = insertelement <2 x i64> %2, i64 0, i32 1
422 %4 = bitcast <2 x i64> %3 to <8 x i16>
423 %5 = tail call <16 x i16> @llvm.x86.avx2.psrl.w(<16 x i16> <i16 1024, i16 0, i16 0, i16 0, i16 2048, i16 0, i16 0, i16 0, i16 4096, i16 0, i16 0, i16 0, i16 8192, i16 0, i16 0, i16 0>, <8 x i16> %4)
424 %6 = bitcast <16 x i16> %5 to <8 x i32>
425 %7 = bitcast <2 x i64> %3 to <4 x i32>
426 %8 = tail call <8 x i32> @llvm.x86.avx2.psrl.d(<8 x i32> %6, <4 x i32> %7)
427 %9 = bitcast <8 x i32> %8 to <4 x i64>
428 %10 = tail call <4 x i64> @llvm.x86.avx2.psrl.q(<4 x i64> %9, <2 x i64> %3)
429 %11 = bitcast <4 x i64> %10 to <16 x i16>
430 %12 = tail call <16 x i16> @llvm.x86.avx2.psrli.w(<16 x i16> %11, i32 %S)
431 %13 = bitcast <16 x i16> %12 to <8 x i32>
432 %14 = tail call <8 x i32> @llvm.x86.avx2.psrli.d(<8 x i32> %13, i32 %S)
433 %15 = bitcast <8 x i32> %14 to <4 x i64>
434 %16 = tail call <4 x i64> @llvm.x86.avx2.psrli.q(<4 x i64> %15, i32 %S)
436 ; CHECK: test_avx2_psrl_0
437 ; CHECK: ret <4 x i64> zeroinitializer
440 declare <4 x i64> @llvm.x86.avx2.pslli.q(<4 x i64>, i32) #1
441 declare <8 x i32> @llvm.x86.avx2.pslli.d(<8 x i32>, i32) #1
442 declare <16 x i16> @llvm.x86.avx2.pslli.w(<16 x i16>, i32) #1
443 declare <4 x i64> @llvm.x86.avx2.psll.q(<4 x i64>, <2 x i64>) #1
444 declare <8 x i32> @llvm.x86.avx2.psll.d(<8 x i32>, <4 x i32>) #1
445 declare <16 x i16> @llvm.x86.avx2.psll.w(<16 x i16>, <8 x i16>) #1
446 declare <2 x i64> @llvm.x86.sse2.pslli.q(<2 x i64>, i32) #1
447 declare <4 x i32> @llvm.x86.sse2.pslli.d(<4 x i32>, i32) #1
448 declare <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16>, i32) #1
449 declare <2 x i64> @llvm.x86.sse2.psll.q(<2 x i64>, <2 x i64>) #1
450 declare <4 x i32> @llvm.x86.sse2.psll.d(<4 x i32>, <4 x i32>) #1
451 declare <8 x i16> @llvm.x86.sse2.psll.w(<8 x i16>, <8 x i16>) #1
452 declare <4 x i64> @llvm.x86.avx2.psrli.q(<4 x i64>, i32) #1
453 declare <8 x i32> @llvm.x86.avx2.psrli.d(<8 x i32>, i32) #1
454 declare <16 x i16> @llvm.x86.avx2.psrli.w(<16 x i16>, i32) #1
455 declare <4 x i64> @llvm.x86.avx2.psrl.q(<4 x i64>, <2 x i64>) #1
456 declare <8 x i32> @llvm.x86.avx2.psrl.d(<8 x i32>, <4 x i32>) #1
457 declare <16 x i16> @llvm.x86.avx2.psrl.w(<16 x i16>, <8 x i16>) #1
458 declare <2 x i64> @llvm.x86.sse2.psrli.q(<2 x i64>, i32) #1
459 declare <4 x i32> @llvm.x86.sse2.psrli.d(<4 x i32>, i32) #1
460 declare <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16>, i32) #1
461 declare <2 x i64> @llvm.x86.sse2.psrl.q(<2 x i64>, <2 x i64>) #1
462 declare <4 x i32> @llvm.x86.sse2.psrl.d(<4 x i32>, <4 x i32>) #1
463 declare <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16>, <8 x i16>) #1
465 attributes #1 = { nounwind readnone }