1 ; RUN: opt < %s -instcombine -S | FileCheck %s
3 define void @test1(i32* %P) {
4 store i32 undef, i32* %P
5 store i32 123, i32* undef
6 store i32 124, i32* null
9 ; CHECK-NEXT: store i32 123, i32* undef
10 ; CHECK-NEXT: store i32 undef, i32* null
11 ; CHECK-NEXT: ret void
14 define void @test2(i32* %P) {
15 %X = load i32, i32* %P ; <i32> [#uses=1]
16 %Y = add i32 %X, 0 ; <i32> [#uses=1]
19 ; CHECK-LABEL: @test2(
20 ; CHECK-NEXT: ret void
23 ;; Simple sinking tests
26 define i32 @test3(i1 %C) {
28 br i1 %C, label %Cond, label %Cond2
31 store i32 -987654321, i32* %A
39 %V = load i32, i32* %A
41 ; CHECK-LABEL: @test3(
44 ; CHECK-NEXT: %storemerge = phi i32 [ -987654321, %Cond ], [ 47, %Cond2 ]
45 ; CHECK-NEXT: ret i32 %storemerge
49 define i32 @test4(i1 %C) {
52 br i1 %C, label %Cond, label %Cont
55 store i32 -987654321, i32* %A
59 %V = load i32, i32* %A
61 ; CHECK-LABEL: @test4(
64 ; CHECK-NEXT: %storemerge = phi i32 [ -987654321, %Cond ], [ 47, %0 ]
65 ; CHECK-NEXT: ret i32 %storemerge
69 define void @test5(i1 %C, i32* %P) {
70 store i32 47, i32* %P, align 1
71 br i1 %C, label %Cond, label %Cont
74 store i32 -987654321, i32* %P, align 1
79 ; CHECK-LABEL: @test5(
81 ; CHECK-NEXT: %storemerge = phi i32
82 ; CHECK-NEXT: store i32 %storemerge, i32* %P, align 1
83 ; CHECK-NEXT: ret void
87 ; PR14753 - merging two stores should preserve the TBAA tag.
88 define void @test6(i32 %n, float* %a, i32* %gi) nounwind uwtable ssp {
90 store i32 42, i32* %gi, align 4, !tbaa !0
93 for.cond: ; preds = %for.body, %entry
94 %storemerge = phi i32 [ 0, %entry ], [ %inc, %for.body ]
95 %0 = load i32, i32* %gi, align 4, !tbaa !0
96 %cmp = icmp slt i32 %0, %n
97 br i1 %cmp, label %for.body, label %for.end
99 for.body: ; preds = %for.cond
100 %idxprom = sext i32 %0 to i64
101 %arrayidx = getelementptr inbounds float, float* %a, i64 %idxprom
102 store float 0.000000e+00, float* %arrayidx, align 4, !tbaa !3
103 %1 = load i32, i32* %gi, align 4, !tbaa !0
104 %inc = add nsw i32 %1, 1
105 store i32 %inc, i32* %gi, align 4, !tbaa !0
108 for.end: ; preds = %for.cond
110 ; CHECK-LABEL: @test6(
112 ; CHECK-NEXT: phi i32 [ 42
113 ; CHECK-NEXT: store i32 %storemerge, i32* %gi, align 4, !tbaa !0
116 define void @dse1(i32* %p) {
125 ; Slightly subtle: if we're mixing atomic and non-atomic access to the
126 ; same location, then the contents of the location are undefined if there's
127 ; an actual race. As such, we're free to pick either store under the
128 ; assumption that we're not racing with any other thread.
129 define void @dse2(i32* %p) {
131 ; CHECK-NEXT: store i32 0, i32* %p
133 store atomic i32 0, i32* %p unordered, align 4
138 define void @dse3(i32* %p) {
140 ; CHECK-NEXT: store atomic i32 0, i32* %p unordered, align 4
143 store atomic i32 0, i32* %p unordered, align 4
147 define void @dse4(i32* %p) {
149 ; CHECK-NEXT: store atomic i32 0, i32* %p unordered, align 4
151 store atomic i32 0, i32* %p unordered, align 4
152 store atomic i32 0, i32* %p unordered, align 4
156 ; Implementation limit - could remove unordered store here, but
158 define void @dse5(i32* %p) {
163 store atomic i32 0, i32* %p unordered, align 4
164 store atomic i32 0, i32* %p seq_cst, align 4
168 define void @write_back1(i32* %p) {
169 ; CHECK-LABEL: write_back1
171 %v = load i32, i32* %p
172 store i32 %v, i32* %p
176 define void @write_back2(i32* %p) {
177 ; CHECK-LABEL: write_back2
179 %v = load atomic i32, i32* %p unordered, align 4
180 store i32 %v, i32* %p
184 define void @write_back3(i32* %p) {
185 ; CHECK-LABEL: write_back3
187 %v = load i32, i32* %p
188 store atomic i32 %v, i32* %p unordered, align 4
192 define void @write_back4(i32* %p) {
193 ; CHECK-LABEL: write_back4
195 %v = load atomic i32, i32* %p unordered, align 4
196 store atomic i32 %v, i32* %p unordered, align 4
200 ; Can't remove store due to ordering side effect
201 define void @write_back5(i32* %p) {
202 ; CHECK-LABEL: write_back5
206 %v = load atomic i32, i32* %p unordered, align 4
207 store atomic i32 %v, i32* %p seq_cst, align 4
211 define void @write_back6(i32* %p) {
212 ; CHECK-LABEL: write_back6
215 %v = load atomic i32, i32* %p seq_cst, align 4
216 store atomic i32 %v, i32* %p unordered, align 4
220 define void @write_back7(i32* %p) {
221 ; CHECK-LABEL: write_back7
224 %v = load atomic volatile i32, i32* %p seq_cst, align 4
225 store atomic i32 %v, i32* %p unordered, align 4
229 !0 = !{!4, !4, i64 0}
230 !1 = !{!"omnipotent char", !2}
231 !2 = !{!"Simple C/C++ TBAA"}