1 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
2 target triple = "thumbv7-apple-ios0"
4 ; RUN: opt -S -instcombine < %s | FileCheck %s
6 define <4 x i32> @mulByZero(<4 x i16> %x) nounwind readnone ssp {
8 %a = tail call <4 x i32> @llvm.arm.neon.vmulls.v4i32(<4 x i16> %x, <4 x i16> zeroinitializer) nounwind
11 ; CHECK-NEXT: ret <4 x i32> zeroinitializer
14 define <4 x i32> @mulByOne(<4 x i16> %x) nounwind readnone ssp {
16 %a = tail call <4 x i32> @llvm.arm.neon.vmulls.v4i32(<4 x i16> %x, <4 x i16> <i16 1, i16 1, i16 1, i16 1>) nounwind
19 ; CHECK-NEXT: %a = sext <4 x i16> %x to <4 x i32>
20 ; CHECK-NEXT: ret <4 x i32> %a
23 define <4 x i32> @constantMul() nounwind readnone ssp {
25 %a = tail call <4 x i32> @llvm.arm.neon.vmulls.v4i32(<4 x i16> <i16 3, i16 3, i16 3, i16 3>, <4 x i16> <i16 2, i16 2, i16 2, i16 2>) nounwind
28 ; CHECK-NEXT: ret <4 x i32> <i32 6, i32 6, i32 6, i32 6>
31 define <4 x i32> @constantMulS() nounwind readnone ssp {
33 %b = tail call <4 x i32> @llvm.arm.neon.vmulls.v4i32(<4 x i16> <i16 -1, i16 -1, i16 -1, i16 -1>, <4 x i16> <i16 1, i16 1, i16 1, i16 1>) nounwind
36 ; CHECK-NEXT: ret <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>
39 define <4 x i32> @constantMulU() nounwind readnone ssp {
41 %b = tail call <4 x i32> @llvm.arm.neon.vmullu.v4i32(<4 x i16> <i16 -1, i16 -1, i16 -1, i16 -1>, <4 x i16> <i16 1, i16 1, i16 1, i16 1>) nounwind
44 ; CHECK-NEXT: ret <4 x i32> <i32 65535, i32 65535, i32 65535, i32 65535>
47 define <4 x i32> @complex1(<4 x i16> %x) nounwind readnone ssp {
49 %a = tail call <4 x i32> @llvm.arm.neon.vmulls.v4i32(<4 x i16> <i16 2, i16 2, i16 2, i16 2>, <4 x i16> %x) nounwind
50 %b = add <4 x i32> zeroinitializer, %a
53 ; CHECK-NEXT: %a = tail call <4 x i32> @llvm.arm.neon.vmulls.v4i32(<4 x i16> <i16 2, i16 2, i16 2, i16 2>, <4 x i16> %x) [[NUW:#[0-9]+]]
54 ; CHECK-NEXT: ret <4 x i32> %a
57 define <4 x i32> @complex2(<4 x i32> %x) nounwind readnone ssp {
59 %a = tail call <4 x i32> @llvm.arm.neon.vmulls.v4i32(<4 x i16> <i16 3, i16 3, i16 3, i16 3>, <4 x i16> <i16 2, i16 2, i16 2, i16 2>) nounwind
60 %b = add <4 x i32> %x, %a
63 ; CHECK-NEXT: %b = add <4 x i32> %x, <i32 6, i32 6, i32 6, i32 6>
64 ; CHECK-NEXT: ret <4 x i32> %b
67 declare <4 x i32> @llvm.arm.neon.vmulls.v4i32(<4 x i16>, <4 x i16>) nounwind readnone
68 declare <4 x i32> @llvm.arm.neon.vmullu.v4i32(<4 x i16>, <4 x i16>) nounwind readnone
70 ; CHECK: attributes #0 = { nounwind readnone ssp }
71 ; CHECK: attributes #1 = { nounwind readnone }
72 ; CHECK: attributes [[NUW]] = { nounwind }