llvm/test/CodeGen/X86/break-avx-dep.ll: Relax an expression to be matched to also...
[oota-llvm.git] / test / TableGen / UnsetBitInit.td
1 // RUN: llvm-tblgen %s
2 // XFAIL: vg_leak
3 class x {
4   field bits<32> A;
5 }
6
7 class y<bits<2> B> : x {
8   let A{21-20} = B;
9 }
10
11 def z : y<{0,?}>;