1 // RUN: llvm-tblgen -I../../include -gen-dag-isel %s | FileCheck %s
4 include "llvm/Target/Target.td"
6 // Make sure the higher complexity pattern comes first
7 // CHECK: TARGET_VAL(::ADD0)
8 // CHECK: Complexity = {{[^-]}}
9 // Make sure the ADD1 pattern has a negative complexity
10 // CHECK: TARGET_VAL(::ADD1)
11 // CHECK: Complexity = -{{[0-9]+}}
13 def TestRC : RegisterClass<"TEST", [i32], 32, (add)>;
15 def TestInstrInfo : InstrInfo;
18 let InstructionSet = TestInstrInfo;
21 def ADD0 : Instruction {
22 let OutOperandList = (outs TestRC:$dst);
23 let InOperandList = (ins TestRC:$src0, TestRC:$src1);
26 def ADD1 : Instruction {
27 let OutOperandList = (outs TestRC:$dst);
28 let InOperandList = (ins TestRC:$src0, TestRC:$src1);
32 (add i32:$src0, i32:$src1),
35 let AddedComplexity = -1000;
39 (add i32:$src0, i32:$src1),