Taints the non-acquire RMW's store address with the load part
[oota-llvm.git] / test / MC / ARM / thumb2-dsp-diag.s
1 @ RUN: not llvm-mc -triple=thumbv7m 2>&1 < %s | FileCheck --check-prefix=CHECK-ERRORS %s
2 @ RUN: llvm-mc -triple=thumbv7em -show-encoding < %s | FileCheck --check-prefix=CHECK-7EM %s
3
4 sxtab r0, r0, r0
5 sxtah r0, r0, r0
6 sxtab16 r0, r0, r0
7 sxtb16 r0, r0
8 sxtb16 r0, r0, ror #8
9 @ CHECK-ERRORS: error: instruction requires: arm-mode
10 @ CHECK-ERRORS: error: instruction requires: arm-mode
11 @ CHECK-ERRORS: error: instruction requires: arm-mode
12 @ CHECK-ERRORS: error: instruction requires: arm-mode
13 @ CHECK-ERRORS: error: invalid operand for instruction
14 @ CHECK-7EM: sxtab      r0, r0, r0              @ encoding: [0x40,0xfa,0x80,0xf0]
15 @ CHECK-7EM: sxtah      r0, r0, r0              @ encoding: [0x00,0xfa,0x80,0xf0]
16 @ CHECK-7EM: sxtab16    r0, r0, r0              @ encoding: [0x20,0xfa,0x80,0xf0]
17 @ CHECK-7EM: sxtb16     r0, r0                  @ encoding: [0x2f,0xfa,0x80,0xf0]
18 @ CHECK-7EM: sxtb16     r0, r0, ror #8          @ encoding: [0x2f,0xfa,0x90,0xf0]
19
20 uxtab r0, r0, r0
21 uxtah r0, r0, r0
22 uxtab16 r0, r0, r0
23 uxtb16 r0, r0
24 uxtb16 r0, r0, ror #8
25 @ CHECK-ERRORS: error: instruction requires: arm-mode
26 @ CHECK-ERRORS: error: instruction requires: arm-mode
27 @ CHECK-ERRORS: error: instruction requires: arm-mode
28 @ CHECK-ERRORS: error: instruction requires: arm-mode
29 @ CHECK-ERRORS: error: invalid operand for instruction
30 @ CHECK-7EM: uxtab      r0, r0, r0              @ encoding: [0x50,0xfa,0x80,0xf0]
31 @ CHECK-7EM: uxtah      r0, r0, r0              @ encoding: [0x10,0xfa,0x80,0xf0]
32 @ CHECK-7EM: uxtab16    r0, r0, r0              @ encoding: [0x30,0xfa,0x80,0xf0]
33 @ CHECK-7EM: uxtb16     r0, r0                  @ encoding: [0x3f,0xfa,0x80,0xf0]
34 @ CHECK-7EM: uxtb16     r0, r0, ror #8          @ encoding: [0x3f,0xfa,0x90,0xf0]