[Hexagon] Adding test to make sure labels and register pairs are correctly parsed.
[oota-llvm.git] / test / MC / ARM / neon-reverse-encoding.s
1 @ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s
2
3 @ CHECK: vrev64.8       d16, d16        @ encoding: [0x20,0x00,0xf0,0xf3]
4         vrev64.8        d16, d16
5 @ CHECK: vrev64.16      d16, d16        @ encoding: [0x20,0x00,0xf4,0xf3]
6         vrev64.16       d16, d16
7 @ CHECK: vrev64.32      d16, d16        @ encoding: [0x20,0x00,0xf8,0xf3]
8         vrev64.32       d16, d16
9 @ CHECK: vrev64.8       q8, q8          @ encoding: [0x60,0x00,0xf0,0xf3]
10         vrev64.8        q8, q8
11 @ CHECK: vrev64.16      q8, q8          @ encoding: [0x60,0x00,0xf4,0xf3]
12         vrev64.16       q8, q8
13 @ CHECK: vrev64.32      q8, q8          @ encoding: [0x60,0x00,0xf8,0xf3]
14         vrev64.32       q8, q8
15 @ CHECK: vrev32.8       d16, d16        @ encoding: [0xa0,0x00,0xf0,0xf3]
16         vrev32.8        d16, d16
17 @ CHECK: vrev32.16      d16, d16        @ encoding: [0xa0,0x00,0xf4,0xf3]
18         vrev32.16       d16, d16
19 @ CHECK: vrev32.8       q8, q8          @ encoding: [0xe0,0x00,0xf0,0xf3]
20         vrev32.8        q8, q8
21 @ CHECK: vrev32.16      q8, q8          @ encoding: [0xe0,0x00,0xf4,0xf3]
22         vrev32.16       q8, q8
23 @ CHECK: vrev16.8       d16, d16        @ encoding: [0x20,0x01,0xf0,0xf3]
24         vrev16.8        d16, d16
25 @ CHECK: vrev16.8       q8, q8          @ encoding: [0x60,0x01,0xf0,0xf3]
26         vrev16.8        q8, q8