Mark ARM subtarget features that are available for the assembler.
[oota-llvm.git] / test / MC / ARM / neon-neg-encoding.s
1 // RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
2
3 // CHECK: vneg.s8       d16, d16                @ encoding: [0xa0,0x03,0xf1,0xf3]
4         vneg.s8 d16, d16
5 // CHECK: vneg.s16      d16, d16        @ encoding: [0xa0,0x03,0xf5,0xf3]
6         vneg.s16        d16, d16
7 // CHECK: vneg.s32      d16, d16        @ encoding: [0xa0,0x03,0xf9,0xf3]
8         vneg.s32        d16, d16
9 // CHECK: vneg.f32      d16, d16        @ encoding: [0xa0,0x07,0xf9,0xf3]
10         vneg.f32        d16, d16
11 // CHECK: vneg.s8       q8, q8                  @ encoding: [0xe0,0x03,0xf1,0xf3]
12         vneg.s8 q8, q8
13 // CHECK: vneg.s16      q8, q8          @ encoding: [0xe0,0x03,0xf5,0xf3]
14         vneg.s16        q8, q8
15 // CHECK: vneg.s32      q8, q8          @ encoding: [0xe0,0x03,0xf9,0xf3]
16         vneg.s32        q8, q8
17 // CHECK: vneg.f32      q8, q8          @ encoding: [0xe0,0x07,0xf9,0xf3]
18         vneg.f32        q8, q8
19 // CHECK: vqneg.s8      d16, d16        @ encoding: [0xa0,0x07,0xf0,0xf3]
20         vqneg.s8        d16, d16
21 // CHECK: vqneg.s16     d16, d16        @ encoding: [0xa0,0x07,0xf4,0xf3]
22         vqneg.s16       d16, d16
23 // CHECK: vqneg.s32     d16, d16        @ encoding: [0xa0,0x07,0xf8,0xf3]
24         vqneg.s32       d16, d16
25 // CHECK: vqneg.s8      q8, q8          @ encoding: [0xe0,0x07,0xf0,0xf3]
26         vqneg.s8        q8, q8
27 // CHECK: vqneg.s16     q8, q8          @ encoding: [0xe0,0x07,0xf4,0xf3]
28         vqneg.s16       q8, q8
29 // CHECK: vqneg.s32     q8, q8          @ encoding: [0xe0,0x07,0xf8,0xf3]
30         vqneg.s32       q8, q8