Mark ARM subtarget features that are available for the assembler.
[oota-llvm.git] / test / MC / ARM / neon-add-encoding.s
1 // RUN: llvm-mc -mcpu=cortex-a8 -triple armv7-apple-darwin -show-encoding < %s | FileCheck %s
2
3
4 // CHECK: vadd.i8       d16, d17, d16           @ encoding: [0xa0,0x08,0x41,0xf2]
5         vadd.i8 d16, d17, d16
6 // CHECK: vadd.i16      d16, d17, d16   @ encoding: [0xa0,0x08,0x51,0xf2]
7         vadd.i16        d16, d17, d16
8 // CHECK: vadd.i64      d16, d17, d16   @ encoding: [0xa0,0x08,0x71,0xf2]
9         vadd.i64        d16, d17, d16
10 // CHECK: vadd.i32      d16, d17, d16   @ encoding: [0xa0,0x08,0x61,0xf2]
11         vadd.i32        d16, d17, d16
12 // CHECK: vadd.f32      d16, d16, d17   @ encoding: [0xa1,0x0d,0x40,0xf2]
13         vadd.f32        d16, d16, d17
14 // CHECK: vadd.f32      q8, q8, q9      @ encoding: [0xe2,0x0d,0x40,0xf2]
15         vadd.f32        q8, q8, q9
16
17 // CHECK: vaddl.s8      q8, d17, d16    @ encoding: [0xa0,0x00,0xc1,0xf2]
18         vaddl.s8        q8, d17, d16
19 // CHECK: vaddl.s16     q8, d17, d16    @ encoding: [0xa0,0x00,0xd1,0xf2]
20         vaddl.s16       q8, d17, d16
21 // CHECK: vaddl.s32     q8, d17, d16    @ encoding: [0xa0,0x00,0xe1,0xf2]
22         vaddl.s32       q8, d17, d16
23 // CHECK: vaddl.u8      q8, d17, d16    @ encoding: [0xa0,0x00,0xc1,0xf3]
24         vaddl.u8        q8, d17, d16
25 // CHECK: vaddl.u16     q8, d17, d16    @ encoding: [0xa0,0x00,0xd1,0xf3]
26         vaddl.u16       q8, d17, d16
27 // CHECK: vaddl.u32     q8, d17, d16    @ encoding: [0xa0,0x00,0xe1,0xf3]
28         vaddl.u32       q8, d17, d16
29
30 // CHECK: vaddw.s8      q8, q8, d18     @ encoding: [0xa2,0x01,0xc0,0xf2]
31         vaddw.s8        q8, q8, d18
32 // CHECK: vaddw.s16     q8, q8, d18     @ encoding: [0xa2,0x01,0xd0,0xf2]
33         vaddw.s16       q8, q8, d18
34 // CHECK: vaddw.s32     q8, q8, d18     @ encoding: [0xa2,0x01,0xe0,0xf2]
35         vaddw.s32       q8, q8, d18
36 // CHECK: vaddw.u8      q8, q8, d18     @ encoding: [0xa2,0x01,0xc0,0xf3]
37         vaddw.u8        q8, q8, d18
38 // CHECK: vaddw.u16     q8, q8, d18     @ encoding: [0xa2,0x01,0xd0,0xf3]
39         vaddw.u16       q8, q8, d18
40 // CHECK: vaddw.u32     q8, q8, d18     @ encoding: [0xa2,0x01,0xe0,0xf3]
41         vaddw.u32       q8, q8, d18
42
43 // CHECK: vhadd.s8      d16, d16, d17   @ encoding: [0xa1,0x00,0x40,0xf2]
44         vhadd.s8        d16, d16, d17
45 // CHECK: vhadd.s16     d16, d16, d17   @ encoding: [0xa1,0x00,0x50,0xf2]
46         vhadd.s16       d16, d16, d17
47 // CHECK: vhadd.s32     d16, d16, d17   @ encoding: [0xa1,0x00,0x60,0xf2]
48         vhadd.s32       d16, d16, d17
49 // CHECK: vhadd.u8      d16, d16, d17   @ encoding: [0xa1,0x00,0x40,0xf3]
50         vhadd.u8        d16, d16, d17
51 // CHECK: vhadd.u16     d16, d16, d17   @ encoding: [0xa1,0x00,0x50,0xf3]
52         vhadd.u16       d16, d16, d17
53 // CHECK: vhadd.u32     d16, d16, d17   @ encoding: [0xa1,0x00,0x60,0xf3]
54         vhadd.u32       d16, d16, d17
55 // CHECK: vhadd.s8      q8, q8, q9      @ encoding: [0xe2,0x00,0x40,0xf2]
56         vhadd.s8        q8, q8, q9
57 // CHECK: vhadd.s16     q8, q8, q9      @ encoding: [0xe2,0x00,0x50,0xf2]
58         vhadd.s16       q8, q8, q9
59 // CHECK: vhadd.s32     q8, q8, q9      @ encoding: [0xe2,0x00,0x60,0xf2]
60         vhadd.s32       q8, q8, q9
61   // CHECK: vhadd.u8    q8, q8, q9      @ encoding: [0xe2,0x00,0x40,0xf3]
62         vhadd.u8        q8, q8, q9
63 // CHECK: vhadd.u16     q8, q8, q9      @ encoding: [0xe2,0x00,0x50,0xf3]
64         vhadd.u16       q8, q8, q9
65 // CHECK: vhadd.u32     q8, q8, q9      @ encoding: [0xe2,0x00,0x60,0xf3]
66         vhadd.u32       q8, q8, q9
67         
68 // CHECK: vrhadd.s8     d16, d16, d17   @ encoding: [0xa1,0x01,0x40,0xf2]
69         vrhadd.s8       d16, d16, d17
70 // CHECK: vrhadd.s16    d16, d16, d17   @ encoding: [0xa1,0x01,0x50,0xf2]
71         vrhadd.s16      d16, d16, d17
72 // CHECK: vrhadd.s32    d16, d16, d17   @ encoding: [0xa1,0x01,0x60,0xf2]
73         vrhadd.s32      d16, d16, d17
74 // CHECK: vrhadd.u8     d16, d16, d17   @ encoding: [0xa1,0x01,0x40,0xf3]
75         vrhadd.u8       d16, d16, d17
76 // CHECK: vrhadd.u16    d16, d16, d17   @ encoding: [0xa1,0x01,0x50,0xf3]
77         vrhadd.u16      d16, d16, d17
78 // CHECK: vrhadd.u32    d16, d16, d17   @ encoding: [0xa1,0x01,0x60,0xf3]
79         vrhadd.u32      d16, d16, d17
80 // CHECK: vrhadd.s8     q8, q8, q9      @ encoding: [0xe2,0x01,0x40,0xf2]
81         vrhadd.s8       q8, q8, q9
82 // CHECK: vrhadd.s16    q8, q8, q9      @ encoding: [0xe2,0x01,0x50,0xf2]
83         vrhadd.s16      q8, q8, q9
84 // CHECK: vrhadd.s32    q8, q8, q9      @ encoding: [0xe2,0x01,0x60,0xf2]
85         vrhadd.s32      q8, q8, q9
86 // CHECK: vrhadd.u8     q8, q8, q9      @ encoding: [0xe2,0x01,0x40,0xf3]
87         vrhadd.u8       q8, q8, q9
88 // CHECK: vrhadd.u16    q8, q8, q9      @ encoding: [0xe2,0x01,0x50,0xf3]
89         vrhadd.u16      q8, q8, q9
90 // CHECK: vrhadd.u32    q8, q8, q9      @ encoding: [0xe2,0x01,0x60,0xf3]
91         vrhadd.u32      q8, q8, q9
92
93 // CHECK: vqadd.s8      d16, d16, d17   @ encoding: [0xb1,0x00,0x40,0xf2]
94         vqadd.s8        d16, d16, d17
95 // CHECK: vqadd.s16     d16, d16, d17   @ encoding: [0xb1,0x00,0x50,0xf2]
96         vqadd.s16       d16, d16, d17
97 // CHECK: vqadd.s32     d16, d16, d17   @ encoding: [0xb1,0x00,0x60,0xf2]
98         vqadd.s32       d16, d16, d17
99 // CHECK: vqadd.s64     d16, d16, d17   @ encoding: [0xb1,0x00,0x70,0xf2]
100         vqadd.s64       d16, d16, d17
101 // CHECK: vqadd.u8      d16, d16, d17   @ encoding: [0xb1,0x00,0x40,0xf3]
102         vqadd.u8        d16, d16, d17
103 // CHECK: vqadd.u16     d16, d16, d17   @ encoding: [0xb1,0x00,0x50,0xf3]
104         vqadd.u16       d16, d16, d17
105 // CHECK: vqadd.u32     d16, d16, d17   @ encoding: [0xb1,0x00,0x60,0xf3]
106         vqadd.u32       d16, d16, d17
107 // CHECK: vqadd.u64     d16, d16, d17   @ encoding: [0xb1,0x00,0x70,0xf3]
108         vqadd.u64       d16, d16, d17
109 // CHECK: vqadd.s8      q8, q8, q9      @ encoding: [0xf2,0x00,0x40,0xf2]
110         vqadd.s8        q8, q8, q9
111 // CHECK: vqadd.s16     q8, q8, q9      @ encoding: [0xf2,0x00,0x50,0xf2]
112         vqadd.s16       q8, q8, q9
113 // CHECK: vqadd.s32     q8, q8, q9      @ encoding: [0xf2,0x00,0x60,0xf2]
114         vqadd.s32       q8, q8, q9
115 // CHECK: vqadd.s64     q8, q8, q9      @ encoding: [0xf2,0x00,0x70,0xf2]
116         vqadd.s64       q8, q8, q9
117 // CHECK: vqadd.u8      q8, q8, q9      @ encoding: [0xf2,0x00,0x40,0xf3]
118         vqadd.u8        q8, q8, q9
119 // CHECK: vqadd.u16     q8, q8, q9      @ encoding: [0xf2,0x00,0x50,0xf3]
120         vqadd.u16       q8, q8, q9
121 // CHECK: vqadd.u32     q8, q8, q9      @ encoding: [0xf2,0x00,0x60,0xf3]
122         vqadd.u32       q8, q8, q9
123 // CHECK: vqadd.u64     q8, q8, q9      @ encoding: [0xf2,0x00,0x70,0xf3]
124         vqadd.u64       q8, q8, q9
125
126 // CHECK: vaddhn.i16    d16, q8, q9     @ encoding: [0xa2,0x04,0xc0,0xf2]
127         vaddhn.i16      d16, q8, q9
128 // CHECK: vaddhn.i32    d16, q8, q9     @ encoding: [0xa2,0x04,0xd0,0xf2]
129         vaddhn.i32      d16, q8, q9
130 // CHECK: vaddhn.i64    d16, q8, q9     @ encoding: [0xa2,0x04,0xe0,0xf2]
131         vaddhn.i64      d16, q8, q9
132 // CHECK: vraddhn.i16   d16, q8, q9     @ encoding: [0xa2,0x04,0xc0,0xf3]
133         vraddhn.i16     d16, q8, q9
134 // CHECK: vraddhn.i32   d16, q8, q9     @ encoding: [0xa2,0x04,0xd0,0xf3]
135         vraddhn.i32     d16, q8, q9
136 // CHECK: vraddhn.i64   d16, q8, q9     @ encoding: [0xa2,0x04,0xe0,0xf3]
137         vraddhn.i64     d16, q8, q9